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crypto/fsl: i.MX8M: Enable Job ring driver model.

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i.MX8MM/MN/MP/MQ - added support for JR driver model.
sec is initialized based on job ring information processed
from device tree.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
This commit is contained in:
Gaurav Jain 2022-03-24 11:50:27 +05:30 committed by Stefano Babic
parent ee51b2c767
commit 2cddfcbc75
7 changed files with 58 additions and 9 deletions
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2
arch/arm/Kconfig
View file

@ -865,7 +865,7 @@ config ARCH_IMX8M
select ARM64
select GPIO_EXTRA_HEADER
select MACH_IMX
select SYS_FSL_HAS_SEC if IMX_HAB
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
select SYS_I2C_MXC

13
arch/arm/mach-imx/imx8m/Kconfig
View file

@ -39,6 +39,9 @@ config TARGET_IMX8MQ_EVK
select BINMAN
select IMX8MQ
select IMX8M_LPDDR4
select FSL_CAAM
select ARCH_MISC_INIT
select SPL_CRYPTO if SPL
config TARGET_IMX8MQ_PHANBELL
bool "imx8mq_phanbell"
@ -52,6 +55,9 @@ config TARGET_IMX8MM_EVK
select IMX8MM
select SUPPORT_SPL
select IMX8M_LPDDR4
select FSL_CAAM
select ARCH_MISC_INIT
select SPL_CRYPTO if SPL
config TARGET_IMX8MM_ICORE_MX8MM
bool "Engicam i.Core MX8M Mini SOM"
@ -91,6 +97,8 @@ config TARGET_IMX8MN_EVK
select IMX8MN
select SUPPORT_SPL
select IMX8M_LPDDR4
select FSL_CAAM
select SPL_CRYPTO if SPL
config TARGET_IMX8MN_DDR4_EVK
bool "imx8mn DDR4 EVK board"
@ -98,6 +106,8 @@ config TARGET_IMX8MN_DDR4_EVK
select IMX8MN
select SUPPORT_SPL
select IMX8M_DDR4
select FSL_CAAM
select SPL_CRYPTO if SPL
config TARGET_IMX8MN_VENICE
bool "Support Gateworks Venice iMX8M Nano module"
@ -112,6 +122,9 @@ config TARGET_IMX8MP_EVK
select IMX8MP
select SUPPORT_SPL
select IMX8M_LPDDR4
select FSL_CAAM
select ARCH_MISC_INIT
select SPL_CRYPTO if SPL
config TARGET_PICO_IMX8MQ
bool "Support Technexion Pico iMX8MQ"

11
arch/arm/mach-imx/imx8m/soc.c
View file

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2017-2019 NXP
* Copyright 2017-2019, 2021 NXP
*
* Peng Fan <peng.fan@nxp.com>
*/
@ -21,6 +21,7 @@
#include <asm/ptrace.h>
#include <asm/armv8/mmu.h>
#include <dm/uclass.h>
#include <dm/device.h>
#include <efi_loader.h>
#include <env.h>
#include <env_internal.h>
@ -1212,6 +1213,14 @@ static void acquire_buildinfo(void)
int arch_misc_init(void)
{
if (IS_ENABLED(CONFIG_FSL_CAAM)) {
struct udevice *dev;
int ret;
ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev);
if (ret)
printf("Failed to initialize %s: %d\n", dev->name, ret);
}
acquire_buildinfo();
return 0;

10
board/freescale/imx8mm_evk/spl.c
View file

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2019 NXP
* Copyright 2019, 2021 NXP
*/
#include <common.h>
@ -51,6 +51,14 @@ static void spl_dram_init(void)
void spl_board_init(void)
{
if (IS_ENABLED(CONFIG_FSL_CAAM)) {
struct udevice *dev;
int ret;
ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev);
if (ret)
printf("Failed to initialize %s: %d\n", dev->name, ret);
}
puts("Normal Boot\n");
}

9
board/freescale/imx8mn_evk/spl.c
View file

@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2018-2019 NXP
* Copyright 2018-2019, 2021 NXP
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
@ -49,6 +49,11 @@ void spl_board_init(void)
struct udevice *dev;
int ret;
if (IS_ENABLED(CONFIG_FSL_CAAM)) {
ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev);
if (ret)
printf("Failed to initialize %s: %d\n", dev->name, ret);
}
puts("Normal Boot\n");
ret = uclass_get_device_by_name(UCLASS_CLK,

14
board/freescale/imx8mp_evk/spl.c
View file

@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2018-2019 NXP
* Copyright 2018-2019, 2021 NXP
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
@ -20,6 +20,8 @@
#include <asm/arch/ddr.h>
#include <power/pmic.h>
#include <power/pca9450.h>
#include <dm/uclass.h>
#include <dm/device.h>
DECLARE_GLOBAL_DATA_PTR;
@ -35,6 +37,14 @@ void spl_dram_init(void)
void spl_board_init(void)
{
if (IS_ENABLED(CONFIG_FSL_CAAM)) {
struct udevice *dev;
int ret;
ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev);
if (ret)
printf("Failed to initialize %s: %d\n", dev->name, ret);
}
/*
* Set GIC clock to 500Mhz for OD VDD_SOC. Kernel driver does
* not allow to change it. Should set the clock after PMIC

8
board/freescale/imx8mq_evk/spl.c
View file

@ -1,8 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2018 NXP
* Copyright 2018, 2021 NXP
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
@ -22,6 +21,7 @@
#include <asm/mach-imx/gpio.h>
#include <asm/mach-imx/mxc_i2c.h>
#include <fsl_esdhc_imx.h>
#include <fsl_sec.h>
#include <mmc.h>
#include <linux/delay.h>
#include <power/pmic.h>
@ -199,6 +199,10 @@ int power_init_board(void)
void spl_board_init(void)
{
if (IS_ENABLED(CONFIG_FSL_CAAM)) {
if (sec_init())
printf("\nsec_init failed!\n");
}
puts("Normal Boot\n");
}