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pci: gt64120: Use PCI_CONF1_ADDRESS() macro
PCI gt64120 driver uses standard format of Config Address for PCI Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_ADDRESS() and remove old custom driver address macros. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
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2a8d4025c3
commit
2b29d79be8
2 changed files with 2 additions and 17 deletions
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@ -48,7 +48,7 @@ static int gt_config_access(struct gt64120_pci_controller *gt,
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{
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unsigned int bus = PCI_BUS(bdf);
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unsigned int dev = PCI_DEV(bdf);
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unsigned int devfn = PCI_DEV(bdf) << 3 | PCI_FUNC(bdf);
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unsigned int func = PCI_FUNC(bdf);
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u32 intr;
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u32 addr;
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u32 val;
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@ -65,10 +65,7 @@ static int gt_config_access(struct gt64120_pci_controller *gt,
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/* Clear cause register bits */
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writel(~GT_INTRCAUSE_ABORT_BITS, >->regs->intrcause);
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addr = GT_PCI0_CFGADDR_CONFIGEN_BIT;
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addr |= bus << GT_PCI0_CFGADDR_BUSNUM_SHF;
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addr |= devfn << GT_PCI0_CFGADDR_FUNCTNUM_SHF;
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addr |= (where / 4) << GT_PCI0_CFGADDR_REGNUM_SHF;
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addr = PCI_CONF1_ADDRESS(bus, dev, func, where);
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/* Setup address */
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writel(addr, >->regs->pci0_cfgaddr);
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@ -491,18 +491,6 @@
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#define GT_INTRCAUSE_TARABORT0_BIT GT_INTRCAUSE_TARABORT0_MSK
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#define GT_PCI0_CFGADDR_REGNUM_SHF 2
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#define GT_PCI0_CFGADDR_REGNUM_MSK (MSK(6) << GT_PCI0_CFGADDR_REGNUM_SHF)
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#define GT_PCI0_CFGADDR_FUNCTNUM_SHF 8
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#define GT_PCI0_CFGADDR_FUNCTNUM_MSK (MSK(3) << GT_PCI0_CFGADDR_FUNCTNUM_SHF)
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#define GT_PCI0_CFGADDR_DEVNUM_SHF 11
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#define GT_PCI0_CFGADDR_DEVNUM_MSK (MSK(5) << GT_PCI0_CFGADDR_DEVNUM_SHF)
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#define GT_PCI0_CFGADDR_BUSNUM_SHF 16
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#define GT_PCI0_CFGADDR_BUSNUM_MSK (MSK(8) << GT_PCI0_CFGADDR_BUSNUM_SHF)
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#define GT_PCI0_CFGADDR_CONFIGEN_SHF 31
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#define GT_PCI0_CFGADDR_CONFIGEN_MSK (MSK(1) << GT_PCI0_CFGADDR_CONFIGEN_SHF)
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#define GT_PCI0_CFGADDR_CONFIGEN_BIT GT_PCI0_CFGADDR_CONFIGEN_MSK
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#define GT_PCI0_CMD_MBYTESWAP_SHF 0
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#define GT_PCI0_CMD_MBYTESWAP_MSK (MSK(1) << GT_PCI0_CMD_MBYTESWAP_SHF)
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#define GT_PCI0_CMD_MBYTESWAP_BIT GT_PCI0_CMD_MBYTESWAP_MSK
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