armv8: ls1088aqds: Change phy mode to PHY_INTERFACE_MODE_RGMII_ID

Since TX delay is now enabled only in PHY_INTERFACE_MODE_RGMII_ID
PHY_INTERFACE_MODE_RGMII_TXID.

These change where introduced in phy driver in commit 05b29aa0cb
("net: phy: realtek: fix enabling of the TX-delay for RTL8211F").

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Ashish Kumar 2017-10-12 15:21:54 +05:30 committed by York Sun
parent b584510f07
commit 2af1b08a1a
2 changed files with 3 additions and 2 deletions

View file

@ -634,6 +634,7 @@ int board_eth_init(bd_t *bis)
for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) {
switch (wriop_get_enet_if(i)) {
case PHY_INTERFACE_MODE_RGMII:
case PHY_INTERFACE_MODE_RGMII_ID:
ls1088a_handle_phy_interface_rgmii(i);
break;
case PHY_INTERFACE_MODE_QSGMII:

View file

@ -99,7 +99,7 @@ void fsl_rgmii_init(void)
ec >>= FSL_CHASSIS3_RCWSR25_EC1_PRTCL_SHIFT;
if (!ec)
wriop_init_dpmac_enet_if(4, PHY_INTERFACE_MODE_RGMII);
wriop_init_dpmac_enet_if(4, PHY_INTERFACE_MODE_RGMII_ID);
#endif
#ifdef CONFIG_SYS_FSL_EC2
@ -108,7 +108,7 @@ void fsl_rgmii_init(void)
ec >>= FSL_CHASSIS3_RCWSR25_EC2_PRTCL_SHIFT;
if (!ec)
wriop_init_dpmac_enet_if(5, PHY_INTERFACE_MODE_RGMII);
wriop_init_dpmac_enet_if(5, PHY_INTERFACE_MODE_RGMII_ID);
#endif
}
#endif