ARM: dts: k2g: Add DT support

Add basic DT support for k2g evm.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
This commit is contained in:
Lokesh Vutla 2015-09-19 16:26:55 +05:30 committed by Tom Rini
parent 83b9bf11fe
commit 2a9a842ebe
3 changed files with 95 additions and 1 deletions

View file

@ -171,7 +171,8 @@ dtb-$(CONFIG_VF610) += vf500-colibri.dtb \
dtb-$(CONFIG_SOC_KEYSTONE) += k2hk-evm.dtb \
k2l-evm.dtb \
k2e-evm.dtb
k2e-evm.dtb \
k2g-evm.dtb
targets += $(dtb-y)

21
arch/arm/dts/k2g-evm.dts Normal file
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@ -0,0 +1,21 @@
/*
* Copyright 2014 Texas Instruments, Inc.
*
* Keystone 2 Galileo EVM device tree
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "k2g.dtsi"
/ {
compatible = "ti,k2g-evm","ti,keystone";
model = "Texas Instruments Keystone 2 Galileo EVM";
chosen {
stdout-path = &uart0;
};
};

72
arch/arm/dts/k2g.dtsi Normal file
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@ -0,0 +1,72 @@
/*
* Copyright 2014 Texas Instruments, Inc.
*
* Keystone 2 Galileo soc device tree
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi"
/ {
model = "Texas Instruments Keystone 2 SoC";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&gic>;
aliases {
serial0 = &uart0;
};
memory {
device_type = "memory";
reg = <0x80000000 0x80000000>;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&gic>;
cpu@0 {
compatible = "arm,cortex-a15";
device_type = "cpu";
reg = <0>;
};
};
gic: interrupt-controller {
compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x0 0x02561000 0x0 0x1000>,
<0x0 0x02562000 0x0 0x2000>,
<0x0 0x02564000 0x0 0x1000>,
<0x0 0x02566000 0x0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_HIGH)>;
};
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "ti,keystone","simple-bus";
interrupt-parent = <&gic>;
ranges;
uart0: serial@02530c00 {
compatible = "ns16550a";
current-speed = <115200>;
reg-shift = <2>;
reg-io-width = <4>;
reg = <0x02530c00 0x100>;
clock-names = "uart";
interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>;
};
};
};