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clk: zynqmp: Add gem rx and tsu clocks to return register
Add gem_tsu and gem0_rx till gem3_rx to return proper register from zynqmp_clk_get_register. Otherwise firmware won't be able to set clock for these due to incorrect register address. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230720072859.3724-1-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
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@ -270,17 +270,22 @@ static u32 zynqmp_clk_get_register(enum zynqmp_clk id)
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case usb3_dual_ref:
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return CRL_APB_USB3_DUAL_REF_CTRL;
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case gem_tsu_ref:
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case gem_tsu:
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return CRL_APB_GEM_TSU_REF_CTRL;
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case gem0_tx:
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case gem0_rx:
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case gem0_ref:
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return CRL_APB_GEM0_REF_CTRL;
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case gem1_tx:
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case gem1_rx:
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case gem1_ref:
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return CRL_APB_GEM1_REF_CTRL;
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case gem2_tx:
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case gem2_rx:
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case gem2_ref:
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return CRL_APB_GEM2_REF_CTRL;
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case gem3_tx:
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case gem3_rx:
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case gem3_ref:
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return CRL_APB_GEM3_REF_CTRL;
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case usb0_bus_ref:
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