ppc4xx: AMCC Luan uses the new boardspecific DDR2 controller setup

Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Stefan Roese 2007-07-16 10:01:38 +02:00
parent df3f17422a
commit 2a49fc17d0
2 changed files with 7 additions and 1 deletions

View file

@ -104,6 +104,13 @@ int checkboard(void)
return 0; return 0;
} }
/*
* Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with
* board specific values.
*/
u32 ddr_clktr(u32 default_val) {
return (SDRAM_CLKTR_CLKP_180_DEG_ADV);
}
/************************************************************************* /*************************************************************************
* int testdram() * int testdram()

View file

@ -136,7 +136,6 @@
#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */ #define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */
#define SPD_EEPROM_ADDRESS {0x53, 0x52} /* SPD i2c spd addresses*/ #define SPD_EEPROM_ADDRESS {0x53, 0x52} /* SPD i2c spd addresses*/
#define CONFIG_DDR_ECC 1 /* with ECC support */ #define CONFIG_DDR_ECC 1 /* with ECC support */
#define CFG_44x_DDR2_CKTR_180 1 /* use 180 deg advance */
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* I2C * I2C