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https://github.com/AsahiLinux/u-boot
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QE/U-QE: Add U-QE support
Modify code to adapt to both u-qe and qe. U_QE is a kind of cutted QE. the differences between U_QE and QE 1. UCC: U_QE supports 2 UCCs while QE supports up to 8 UCCs. 2. IMMR: have different immr base addr. 3. iopin: U_QE doesn't need to config iopin. Signed-off-by: Zhao Qiang <B45475@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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8 changed files with 32 additions and 5 deletions
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@ -33,6 +33,9 @@
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#endif
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#include "../../../../drivers/block/fsl_sata.h"
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#ifdef CONFIG_U_QE
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#include "../../../../drivers/qe/qe.h"
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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@ -84,7 +87,7 @@ void fsl_erratum_a006261_workaround(struct ccsr_usb_phy __iomem *usb_phy)
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#endif
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#ifdef CONFIG_QE
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#if defined(CONFIG_QE) && !defined(CONFIG_U_QE)
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extern qe_iop_conf_t qe_iop_conf_tab[];
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extern void qe_config_iopin(u8 port, u8 pin, int dir,
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int open_drain, int assign);
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@ -323,10 +326,12 @@ void cpu_init_f (void)
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#if defined(CONFIG_CPM2)
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m8560_cpm_reset();
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#endif
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#ifdef CONFIG_QE
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#if defined(CONFIG_QE) && !defined(CONFIG_U_QE)
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/* Config QE ioports */
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config_qe_ioports();
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#endif
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#if defined(CONFIG_FSL_DMA)
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dma_init();
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#endif
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@ -810,8 +815,13 @@ int sata_initialize(void)
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void cpu_secondary_init_r(void)
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{
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#ifdef CONFIG_QE
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#ifdef CONFIG_U_QE
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uint qe_base = CONFIG_SYS_IMMR + 0x00140000; /* QE immr base */
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#elif defined CONFIG_QE
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uint qe_base = CONFIG_SYS_IMMR + 0x00080000; /* QE immr base */
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#endif
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#ifdef CONFIG_QE
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#ifdef CONFIG_SYS_QE_FMAN_FW_IN_NAND
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int ret;
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size_t fw_length = CONFIG_SYS_QE_FMAN_FW_LENGTH;
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@ -12,7 +12,7 @@
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#include "asm/io.h"
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#include "asm/immap_85xx.h"
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#if defined(CONFIG_QE)
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#if defined(CONFIG_QE) && !defined(CONFIG_U_QE)
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#define NUM_OF_PINS 32
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void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign)
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{
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@ -336,6 +336,10 @@ void get_sys_info(sys_info_t *sys_info)
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#endif /* CONFIG_SYS_FSL_QORIQ_CHASSIS2 */
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#ifdef CONFIG_U_QE
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sys_info->freq_qe = sys_info->freq_systembus / 2;
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#endif
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#else /* CONFIG_FSL_CORENET */
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uint plat_ratio, e500_ratio, half_freq_systembus;
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int i;
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@ -46,6 +46,7 @@ struct liodn_id_table liodn_tbl[] = {
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SET_DMA_LIODN(2, 227),
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/* SET_NEXUS_LIODN(557), -- not yet implemented */
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SET_QE_LIODN(559),
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};
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int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);
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@ -736,6 +736,9 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
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#define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000
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#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
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#define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE
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#define QE_MURAM_SIZE 0x6000UL
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#define MAX_QE_RISC 1
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#define QE_NUM_OF_SNUM 28
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#elif defined(CONFIG_PPC_T2080) || defined(CONFIG_PPC_T2081)
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#define CONFIG_E6500
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@ -99,6 +99,10 @@ extern void fdt_fixup_liodn(void *blob);
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SET_GUTS_LIODN("fsl,esdhc", liodn, sdmmc##sdhcNum##liodnr,\
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CONFIG_SYS_MPC85xx_ESDHC_OFFSET)
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#define SET_QE_LIODN(liodn) \
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SET_GUTS_LIODN("fsl,qe", liodn, qeliodnr,\
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CONFIG_SYS_MPC85xx_QE_OFFSET)
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#define SET_QMAN_LIODN(liodn) \
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SET_LIODN_ENTRY_1("fsl,qman", liodn, offsetof(ccsr_qman_t, liodnr) + \
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CONFIG_SYS_FSL_QMAN_OFFSET, \
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@ -1889,7 +1889,9 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
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u32 sata2liodnr; /* SATA 2 LIODN */
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u32 sata3liodnr; /* SATA 3 LIODN */
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u32 sata4liodnr; /* SATA 4 LIODN */
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u8 res22[32];
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u8 res22[24];
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u32 qeliodnr; /* QE LIODN */
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u8 res_57c[4];
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u32 dma1liodnr; /* DMA 1 LIODN */
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u32 dma2liodnr; /* DMA 2 LIODN */
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u32 dma3liodnr; /* DMA 3 LIODN */
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@ -2877,6 +2879,7 @@ struct ccsr_pman {
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#define CONFIG_SYS_MPC85xx_LBC_OFFSET 0x124000
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#define CONFIG_SYS_MPC85xx_IFC_OFFSET 0x124000
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#define CONFIG_SYS_MPC85xx_GPIO_OFFSET 0x130000
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#define CONFIG_SYS_MPC85xx_QE_OFFSET 0x140000
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#define CONFIG_SYS_FSL_CORENET_RMAN_OFFSET 0x1e0000
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#if defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) && !defined(CONFIG_PPC_B4860)\
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&& !defined(CONFIG_PPC_B4420)
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@ -282,5 +282,7 @@ int qe_set_mii_clk_src(int ucc_num);
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int qe_upload_firmware(const struct qe_firmware *firmware);
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struct qe_firmware_info *qe_get_firmware_info(void);
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void ft_qe_setup(void *blob);
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void qe_init(uint qe_base);
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void qe_reset(void);
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#endif /* __QE_H__ */
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