mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 23:24:38 +00:00
Move DECLARE_GLOBAL_DATA_PTR to file scope
It can be optimised out by the compiler otherwise resulting in obscure errors like a board not booting. This has been documented in README since 2006 when these were first fixed up for GCC 4.x. Signed-off-by: John Rigby <john.rigby@linaro.org> Fix some additional places. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-By: Albert ARIBAUD <albert.aribaud@free.fr>
This commit is contained in:
parent
71aab09b2c
commit
2956532625
32 changed files with 65 additions and 63 deletions
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@ -28,10 +28,12 @@
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/clock.h>
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#ifdef CONFIG_FSL_ESDHC
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DECLARE_GLOBAL_DATA_PTR;
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#endif
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int get_clocks(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_FSL_ESDHC
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gd->sdhc_clk = mxc_get_clock(MXC_IPG_PERCLK);
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#endif
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@ -42,6 +42,8 @@
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#include <asm/blackfin.h>
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#include <asm/mach-common/bits/uart.h>
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_UART_CONSOLE
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#include "serial.h"
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@ -95,7 +97,6 @@ void serial_set_baud(uint32_t baud)
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*/
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void serial_setbrg(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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serial_set_baud(gd->baudrate);
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}
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@ -74,8 +74,7 @@ int watchdog_disable(void)
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{
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volatile wdog_t *wdt = (volatile wdog_t *)(MMAP_WDOG);
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wdt->sr = 0x5555; /* reset watchdog counteDECLARE_GLOBAL_DATA_PTR;
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r */
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wdt->sr = 0x5555; /* reset watchdog counter */
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wdt->sr = 0xAAAA;
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wdt->cr = 0; /* disable watchdog timer */
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@ -30,13 +30,13 @@
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#include <asm/immap.h>
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* get_clocks() fills in gd->cpu_clock and gd->bus_clk
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*/
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int get_clocks(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gd->bus_clk = CONFIG_SYS_CLK;
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gd->cpu_clk = (gd->bus_clk * 2);
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@ -32,6 +32,8 @@
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#include <miiphy.h>
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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extern int cpu_init(void);
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extern int board_init(void);
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extern int dram_init(void);
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@ -43,8 +45,6 @@ unsigned long monitor_flash_len = CONFIG_SYS_MONITOR_LEN;
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static int sh_flash_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gd->bd->bi_flashsize = flash_init();
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printf("FLASH: %ldMB\n", gd->bd->bi_flashsize / (1024*1024));
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@ -99,7 +99,6 @@ static int sh_mem_env_init(void)
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#if defined(CONFIG_CMD_NET)
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static int sh_net_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gd->bd->bi_ip_addr = getenv_IPaddr("ipaddr");
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return 0;
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}
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@ -139,8 +138,6 @@ init_fnc_t *init_sequence[] =
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void sh_generic_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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bd_t *bd;
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init_fnc_t **init_fnc_ptr;
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@ -24,6 +24,8 @@
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#include <asm/io.h>
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#include <asm/processor.h>
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DECLARE_GLOBAL_DATA_PTR;
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int checkboard(void)
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{
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puts("BOARD: ESPT-GIGA\n");
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@ -37,8 +39,6 @@ int board_init(void)
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int dram_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
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printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
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@ -32,6 +32,8 @@
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#include <asm/mach-types.h>
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#include "igep0020.h"
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DECLARE_GLOBAL_DATA_PTR;
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/* GPMC definitions for LAN9221 chips */
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static const u32 gpmc_lan_config[] = {
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NET_LAN9221_GPMC_CONFIG1,
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@ -48,8 +50,6 @@ static const u32 gpmc_lan_config[] = {
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*/
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int board_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
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/* board id for Linux */
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gd->bd->bi_arch_number = MACH_TYPE_IGEP0020;
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@ -30,14 +30,14 @@
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#include <asm/mach-types.h>
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#include "igep0030.h"
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* Routine: board_init
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* Description: Early hardware init.
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*/
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int board_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
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/* board id for Linux */
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gd->bd->bi_arch_number = MACH_TYPE_IGEP0030;
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@ -32,11 +32,12 @@
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#include <pci.h>
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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extern void init_AVR_DUART(void);
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int checkboard (void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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char *p;
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bd_t *bd = gd->bd;
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@ -39,14 +39,14 @@
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#include <asm/mach-types.h>
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#include "zoom1.h"
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* Routine: board_init
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* Description: Early hardware init.
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*/
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int board_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
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/* board id for Linux */
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gd->bd->bi_arch_number = MACH_TYPE_OMAP_LDP;
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@ -43,6 +43,8 @@
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#include "zoom2.h"
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#include "zoom2_serial.h"
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* This the the zoom2, board specific, gpmc configuration for the
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* quad uart on the debug board. The more general gpmc configurations
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@ -120,7 +122,6 @@ void zoom2_identify(void)
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*/
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int board_init (void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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u32 *gpmc_config;
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gpmc_init (); /* in SRAM or SDRAM, finish GPMC */
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@ -24,6 +24,8 @@
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#include <asm/io.h>
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#include <asm/processor.h>
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DECLARE_GLOBAL_DATA_PTR;
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int checkboard(void)
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{
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puts("BOARD: MPR2\n");
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@ -152,8 +154,6 @@ int board_init(void)
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int dram_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
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printf("SDRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
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@ -30,6 +30,8 @@
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#include <asm/io.h>
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#include <asm/processor.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define LED_BASE 0xB0800000
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int checkboard(void)
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@ -45,8 +47,6 @@ int board_init(void)
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int dram_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
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printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
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@ -28,6 +28,8 @@
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#include <asm/io.h>
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#include <asm/processor.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define LED_BASE 0xB0800000
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int checkboard(void)
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int dram_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
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printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
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@ -24,6 +24,8 @@
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#include <common.h>
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#include <asm/processor.h>
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DECLARE_GLOBAL_DATA_PTR;
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int checkboard(void)
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{
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puts("BOARD: SH7750/SH7750S/SH7750R Solution Engine\n");
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int dram_init (void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
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printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
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@ -40,6 +40,8 @@
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#include <asm/mach-types.h>
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#include "overo.h"
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DECLARE_GLOBAL_DATA_PTR;
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#define TWL4030_I2C_BUS 0
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#define EXPANSION_EEPROM_I2C_BUS 2
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#define EXPANSION_EEPROM_I2C_ADDRESS 0x51
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*/
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int board_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
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/* board id for Linux */
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gd->bd->bi_arch_number = MACH_TYPE_OVERO;
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@ -37,6 +37,8 @@
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#include <asm/mach-types.h>
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#include "pandora.h"
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DECLARE_GLOBAL_DATA_PTR;
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#define TWL4030_BB_CFG_BBCHEN (1 << 4)
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#define TWL4030_BB_CFG_BBSEL_3200MV (3 << 2)
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#define TWL4030_BB_CFG_BBISEL_500UA 2
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*/
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int board_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
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/* board id for Linux */
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gd->bd->bi_arch_number = MACH_TYPE_OMAP3_PANDORA;
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@ -28,6 +28,8 @@
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#include <asm/io.h>
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#include <asm/processor.h>
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DECLARE_GLOBAL_DATA_PTR;
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int checkboard(void)
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{
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puts("BOARD: Renesas MigoR\n");
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int dram_init (void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
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printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
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#include <asm/io.h>
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#include <asm/processor.h>
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DECLARE_GLOBAL_DATA_PTR;
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/* PRI control register */
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#define PRPRICR5 0xFF800048 /* LMB */
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#define PRPRICR5_D 0x2a
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int dram_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
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printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
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@ -28,6 +28,8 @@
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#include <asm/io.h>
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#include <asm/pci.h>
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DECLARE_GLOBAL_DATA_PTR;
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int checkboard(void)
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{
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puts("BOARD: Renesas Solutions R2D Plus\n");
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int dram_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
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printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
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@ -26,6 +26,8 @@
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#include <netdev.h>
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#include "r7780mp.h"
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DECLARE_GLOBAL_DATA_PTR;
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int checkboard(void)
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{
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#if defined(CONFIG_R7780MP)
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int dram_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
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printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
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#include <asm/io.h>
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#include <asm/processor.h>
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DECLARE_GLOBAL_DATA_PTR;
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int checkboard(void)
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{
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puts("BOARD: Renesas Technology RSK7203\n");
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int dram_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
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printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
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#include <asm/io.h>
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#include <asm/processor.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define CPU_CMDREG 0xB1000006
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#define PDCR 0xffef0006
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#define PECR 0xffef0008
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int dram_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
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printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
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#include <asm/pci.h>
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#include <netdev.h>
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DECLARE_GLOBAL_DATA_PTR;
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int checkboard(void)
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{
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puts("BOARD: Renesas Technology Corp. R0P7785LC0011RL\n");
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@ -36,8 +38,6 @@ int board_init(void)
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int dram_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
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printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
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@ -32,6 +32,8 @@
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#include <netdev.h>
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#include <asm/arch/s3c6400.h>
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DECLARE_GLOBAL_DATA_PTR;
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/* ------------------------------------------------------------------------- */
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#define CS8900_Tacs 0x0 /* 0clk address set-up */
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#define CS8900_Tcos 0x4 /* 4clk chip selection set-up */
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@ -63,8 +65,6 @@ static void cs8900_pre_init(void)
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int board_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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cs8900_pre_init();
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/* NOR-flash in SROM0 */
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@ -80,8 +80,6 @@ int board_init(void)
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int dram_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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@ -51,6 +51,8 @@
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#define BEAGLE_NO_EEPROM 0xffffffff
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
static struct {
|
||||
unsigned int device_vendor;
|
||||
unsigned char revision;
|
||||
|
@ -66,8 +68,6 @@ static struct {
|
|||
*/
|
||||
int board_init(void)
|
||||
{
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
|
||||
/* board id for Linux */
|
||||
gd->bd->bi_arch_number = MACH_TYPE_OMAP3_BEAGLE;
|
||||
|
|
|
@ -37,6 +37,8 @@
|
|||
#include <asm/mach-types.h>
|
||||
#include "evm.h"
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
static u32 omap3_evm_version;
|
||||
|
||||
u32 get_omap3_evm_rev(void)
|
||||
|
@ -103,8 +105,6 @@ u8 omap3_evm_need_extvbus(void)
|
|||
*/
|
||||
int board_init(void)
|
||||
{
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
|
||||
/* board id for Linux */
|
||||
gd->bd->bi_arch_number = MACH_TYPE_OMAP3EVM;
|
||||
|
|
|
@ -31,6 +31,8 @@
|
|||
#include <asm/mach-types.h>
|
||||
#include "sdp.h"
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
const omap3_sysinfo sysinfo = {
|
||||
DDR_DISCRETE,
|
||||
"OMAP3 SDP3430 board",
|
||||
|
@ -101,8 +103,6 @@ extern struct gpmc *gpmc_cfg;
|
|||
*/
|
||||
int board_init(void)
|
||||
{
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
|
||||
/* TODO: Dynamically pop out CS mapping and program accordingly */
|
||||
/* Configure devices for default ON ON ON settings */
|
||||
|
|
|
@ -27,6 +27,8 @@
|
|||
|
||||
#include "omap24xx_i2c.h"
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
#define I2C_TIMEOUT 1000
|
||||
|
||||
static void wait_for_bb (void);
|
||||
|
@ -40,7 +42,6 @@ static unsigned int current_bus;
|
|||
|
||||
void i2c_init (int speed, int slaveadd)
|
||||
{
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
int psc, fsscll, fssclh;
|
||||
int hsscll = 0, hssclh = 0;
|
||||
u32 scll, sclh;
|
||||
|
|
|
@ -25,6 +25,8 @@
|
|||
|
||||
#include <asm/arch/s3c6400.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
#ifdef CONFIG_SERIAL1
|
||||
#define UART_NR S3C64XX_UART0
|
||||
|
||||
|
@ -68,7 +70,6 @@ static const int udivslot[] = {
|
|||
|
||||
void serial_setbrg(void)
|
||||
{
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
|
||||
u32 pclk = get_PCLK();
|
||||
u32 baudrate = gd->baudrate;
|
||||
|
|
|
@ -27,6 +27,8 @@
|
|||
#include <asm/arch/clk.h>
|
||||
#include <serial.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
static inline struct s5p_uart *s5p_get_base_uart(int dev_index)
|
||||
{
|
||||
u32 offset = dev_index * sizeof(struct s5p_uart);
|
||||
|
@ -61,7 +63,6 @@ static const int udivslot[] = {
|
|||
|
||||
void serial_setbrg_dev(const int dev_index)
|
||||
{
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
|
||||
u32 uclk = get_uart_clk(dev_index);
|
||||
u32 baudrate = gd->baudrate;
|
||||
|
|
|
@ -21,6 +21,8 @@
|
|||
#include <asm/io.h>
|
||||
#include <asm/processor.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
#if defined(CONFIG_CONS_SCIF0)
|
||||
# define SCIF_BASE SCIF0_BASE
|
||||
#elif defined(CONFIG_CONS_SCIF1)
|
||||
|
@ -131,8 +133,6 @@
|
|||
|
||||
void serial_setbrg(void)
|
||||
{
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
writeb(SCBRR_VALUE(gd->baudrate, CONFIG_SYS_CLK_FREQ), SCBRR);
|
||||
}
|
||||
|
||||
|
|
Loading…
Reference in a new issue