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- Solve warning for stih410-b2260

Browse source 
- Device tree alignment on v5.4-rc4 for all stm32 boards
 - Correct the eMMC pin configuration on stm32mp157c-ev1
 - Add DFU and SPI-NAND support for stm32mp1 board
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Merge tag 'u-boot-stm32-20191126' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- Solve warning for stih410-b2260
- Device tree alignment on v5.4-rc4 for all stm32 boards
- Correct the eMMC pin configuration on stm32mp157c-ev1
- Add DFU and SPI-NAND support for stm32mp1 board
This commit is contained in:
Tom Rini 2019-11-28 07:33:16 -05:00
commit 29061447a0
38 changed files with 1014 additions and 538 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
arch/arm/dts/st-pincfg.h
View file

@ -1,3 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ST_PINCFG_H_
#define _ST_PINCFG_H_

29
arch/arm/dts/stm32429i-eval.dts
View file

@ -20,6 +20,7 @@
};
memory {
device_type = "memory";
reg = <0x00000000 0x2000000>;
};
@ -39,18 +40,18 @@
dma-ranges = <0xc0000000 0x0 0x10000000>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
vdda: regulator-vdda {
compatible = "regulator-fixed";
regulator-name = "vdda";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
reg_vref: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "vref";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vref: regulator-vref {
compatible = "regulator-fixed";
regulator-name = "vref";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
leds {
@ -72,6 +73,7 @@
gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
button@0 {
@ -114,7 +116,8 @@
&adc {
pinctrl-names = "default";
pinctrl-0 = <&adc3_in8_pin>;
vref-supply = <&reg_vref>;
vdda-supply = <&vdda>;
vref-supply = <&vref>;
status = "okay";
adc3: adc@200 {
st,adc-channels = <8>;
@ -227,7 +230,7 @@
pinctrl-0 = <&sdio_pins>;
pinctrl-1 = <&sdio_pins_od>;
bus-width = <4>;
max-frequency = <14000000>;
max-frequency = <12500000>;
};
&timers1 {

105
arch/arm/dts/stm32746g-eval.dts
View file

@ -1,49 +1,14 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "stm32f746.dtsi"
#include "stm32f746-pinctrl.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "STMicroelectronics STM32746g-EVAL board";
@ -55,6 +20,7 @@
};
memory {
device_type = "memory";
reg = <0xc0000000 0x2000000>;
};
@ -68,9 +34,15 @@
gpios = <&gpiof 10 1>;
linux,default-trigger = "heartbeat";
};
orange {
gpios = <&stmfx_pinctrl 17 1>;
};
red {
gpios = <&gpiob 7 1>;
};
blue {
gpios = <&stmfx_pinctrl 19 1>;
};
};
gpio_keys {
@ -85,6 +57,43 @@
};
};
joystick {
compatible = "gpio-keys";
#size-cells = <0>;
pinctrl-0 = <&joystick_pins>;
pinctrl-names = "default";
button-0 {
label = "JoySel";
linux,code = <KEY_ENTER>;
interrupt-parent = <&stmfx_pinctrl>;
interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
};
button-1 {
label = "JoyDown";
linux,code = <KEY_DOWN>;
interrupt-parent = <&stmfx_pinctrl>;
interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
};
button-2 {
label = "JoyLeft";
linux,code = <KEY_LEFT>;
interrupt-parent = <&stmfx_pinctrl>;
interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
};
button-3 {
label = "JoyRight";
linux,code = <KEY_RIGHT>;
interrupt-parent = <&stmfx_pinctrl>;
interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
};
button-4 {
label = "JoyUp";
linux,code = <KEY_UP>;
interrupt-parent = <&stmfx_pinctrl>;
interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
};
};
usbotg_hs_phy: usb-phy {
#phy-cells = <0>;
compatible = "usb-nop-xceiv";
@ -114,6 +123,28 @@
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
status = "okay";
stmfx: stmfx@42 {
compatible = "st,stmfx-0300";
reg = <0x42>;
interrupts = <8 IRQ_TYPE_EDGE_RISING>;
interrupt-parent = <&gpioi>;
stmfx_pinctrl: stmfx-pin-controller {
compatible = "st,stmfx-0300-pinctrl";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
gpio-ranges = <&stmfx_pinctrl 0 0 24>;
joystick_pins: joystick {
pins = "gpio0", "gpio1", "gpio2", "gpio3", "gpio4";
drive-push-pull;
bias-pull-up;
};
};
};
};
&rtc {

38
arch/arm/dts/stm32f4-pinctrl.dtsi
View file

@ -1,43 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include <dt-bindings/pinctrl/stm32-pinfunc.h>

40
arch/arm/dts/stm32f429-disco.dts
View file

@ -1,43 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
@ -55,6 +18,7 @@
};
memory {
device_type = "memory";
reg = <0x90000000 0x800000>;
};

38
arch/arm/dts/stm32f429-pinctrl.dtsi
View file

@ -1,43 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "stm32f4-pinctrl.dtsi"

127
arch/arm/dts/stm32f429.dtsi
View file

@ -1,51 +1,17 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "skeleton.dtsi"
#include "armv7-m.dtsi"
#include <dt-bindings/clock/stm32fx-clock.h>
#include <dt-bindings/mfd/stm32f4-rcc.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
clocks {
clk_hse: clk-hse {
#clock-cells = <0>;
@ -73,6 +39,19 @@
};
soc {
romem: nvmem@1fff7800 {
compatible = "st,stm32f4-otp";
reg = <0x1fff7800 0x400>;
#address-cells = <1>;
#size-cells = <1>;
ts_cal1: calib@22c {
reg = <0x22c 0x2>;
};
ts_cal2: calib@22e {
reg = <0x22e 0x2>;
};
};
timer2: timer@40000000 {
compatible = "st,stm32-timer";
reg = <0x40000000 0x400>;
@ -92,6 +71,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
@ -121,6 +101,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
@ -150,6 +131,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
@ -178,6 +160,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
@ -247,6 +230,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
@ -268,6 +252,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
};
@ -283,6 +268,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
};
@ -309,6 +295,26 @@
status = "disabled";
};
spi2: spi@40003800 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32f4-spi";
reg = <0x40003800 0x400>;
interrupts = <36>;
clocks = <&rcc 0 STM32F4_APB1_CLOCK(SPI2)>;
status = "disabled";
};
spi3: spi@40003c00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32f4-spi";
reg = <0x40003c00 0x400>;
interrupts = <51>;
clocks = <&rcc 0 STM32F4_APB1_CLOCK(SPI3)>;
status = "disabled";
};
usart2: serial@40004400 {
compatible = "st,stm32-uart";
reg = <0x40004400 0x400>;
@ -408,6 +414,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
@ -429,6 +436,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
@ -518,6 +526,26 @@
status = "disabled";
};
spi1: spi@40013000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32f4-spi";
reg = <0x40013000 0x400>;
interrupts = <35>;
clocks = <&rcc 0 STM32F4_APB2_CLOCK(SPI1)>;
status = "disabled";
};
spi4: spi@40013400 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32f4-spi";
reg = <0x40013400 0x400>;
interrupts = <84>;
clocks = <&rcc 0 STM32F4_APB2_CLOCK(SPI4)>;
status = "disabled";
};
syscfg: system-config@40013800 {
compatible = "syscon";
reg = <0x40013800 0x400>;
@ -542,6 +570,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
@ -563,6 +592,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
};
@ -578,10 +608,31 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
};
spi5: spi@40015000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32f4-spi";
reg = <0x40015000 0x400>;
interrupts = <85>;
clocks = <&rcc 0 STM32F4_APB2_CLOCK(SPI5)>;
status = "disabled";
};
spi6: spi@40015400 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32f4-spi";
reg = <0x40015400 0x400>;
interrupts = <86>;
clocks = <&rcc 0 STM32F4_APB2_CLOCK(SPI6)>;
status = "disabled";
};
pwrcfg: power-config@40007000 {
compatible = "syscon";
reg = <0x40007000 0x400>;

39
arch/arm/dts/stm32f469-disco.dts
View file

@ -1,43 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* Copyright 2016 - Lee Jones <lee.jones@linaro.org>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
@ -56,6 +20,7 @@
};
memory {
device_type = "memory";
reg = <0x00000000 0x1000000>;
};

39
arch/arm/dts/stm32f469-pinctrl.dtsi
View file

@ -1,43 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "stm32f4-pinctrl.dtsi"

2
arch/arm/dts/stm32f469.dtsi
View file

@ -1,4 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/* Copyright (C) STMicroelectronics 2017 - All Rights Reserved */
#include "stm32f429.dtsi"

39
arch/arm/dts/stm32f746-disco.dts
View file

@ -1,43 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* Copyright 2017 - Vikas MANOCHA <vikas.manocha@st.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
@ -56,6 +20,7 @@
};
memory {
device_type = "memory";
reg = <0xC0000000 0x800000>;
};

54
arch/arm/dts/stm32f746.dtsi
View file

@ -1,51 +1,17 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "skeleton.dtsi"
#include "armv7-m.dtsi"
#include <dt-bindings/clock/stm32fx-clock.h>
#include <dt-bindings/mfd/stm32f7-rcc.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
clocks {
clk_hse: clk-hse {
#clock-cells = <0>;
@ -92,6 +58,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
@ -121,6 +88,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
@ -150,6 +118,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
@ -178,6 +147,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
@ -247,6 +217,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
@ -268,6 +239,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
};
@ -283,6 +255,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
};
@ -417,6 +390,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
@ -438,6 +412,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
@ -510,6 +485,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
@ -531,6 +507,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
};
@ -546,6 +523,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
};

43
arch/arm/dts/stm32f769-disco.dts
View file

@ -1,43 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* Copyright 2017 - Vikas MANOCHA <vikas.manocha@st.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
@ -56,6 +20,7 @@
};
memory {
device_type = "memory";
reg = <0xC0000000 0x1000000>;
};
@ -101,6 +66,10 @@
};
};
&rcc {
compatible = "st,stm32f769-rcc", "st,stm32f746-rcc", "st,stm32-rcc";
};
&cec {
pinctrl-0 = <&cec_pins_a>;
pinctrl-names = "default";

41
arch/arm/dts/stm32h7-u-boot.dtsi
View file

@ -61,17 +61,6 @@
st,sdram-refcount = <1539>;
};
};
sdmmc1: sdmmc@52007000 {
compatible = "st,stm32-sdmmc2";
reg = <0x52007000 0x1000>;
interrupts = <49>;
clocks = <&rcc SDMMC1_CK>;
resets = <&rcc STM32H7_AHB3_RESET(SDMMC1)>;
st,idma = <1>;
cap-sd-highspeed;
cap-mmc-highspeed;
};
};
};
@ -216,32 +205,6 @@
slew-rate = <3>;
};
};
pinctrl_sdmmc1_level_shifter: sdmmc0_ls@0 {
pins {
pinmux = <STM32_PINMUX('B', 8, AF7)>,
<STM32_PINMUX('B', 9, AF7)>,
<STM32_PINMUX('C', 6, AF8)>,
<STM32_PINMUX('C', 7, AF8)>;
drive-push-pull;
slew-rate = <3>;
};
};
sdmmc1_pins: sdmmc@0 {
pins {
pinmux = <STM32_PINMUX('C', 8, AF12)>,
<STM32_PINMUX('C', 9, AF12)>,
<STM32_PINMUX('C',10, AF12)>,
<STM32_PINMUX('C',11, AF12)>,
<STM32_PINMUX('C',12, AF12)>,
<STM32_PINMUX('D', 2, AF12)>;
slew-rate = <3>;
drive-push-pull;
bias-disable;
};
};
};
&pwrcfg {
@ -251,3 +214,7 @@
&rcc {
u-boot,dm-pre-reloc;
};
&sdmmc1 {
compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
};

83
arch/arm/dts/stm32h743-pinctrl.dtsi
View file

@ -173,6 +173,89 @@
};
};
ethernet_rmii: rmii@0 {
pins {
pinmux = <STM32_PINMUX('G', 11, AF11)>,
<STM32_PINMUX('G', 13, AF11)>,
<STM32_PINMUX('G', 12, AF11)>,
<STM32_PINMUX('C', 4, AF11)>,
<STM32_PINMUX('C', 5, AF11)>,
<STM32_PINMUX('A', 7, AF11)>,
<STM32_PINMUX('C', 1, AF11)>,
<STM32_PINMUX('A', 2, AF11)>,
<STM32_PINMUX('A', 1, AF11)>;
slew-rate = <2>;
};
};
sdmmc1_b4_pins_a: sdmmc1-b4-0 {
pins {
pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
<STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
<STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
<STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
<STM32_PINMUX('C', 12, AF12)>, /* SDMMC1_CK */
<STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
slew-rate = <3>;
drive-push-pull;
bias-disable;
};
};
sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
pins1 {
pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
<STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
<STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
<STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
<STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
slew-rate = <3>;
drive-push-pull;
bias-disable;
};
pins2{
pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
slew-rate = <3>;
drive-open-drain;
bias-disable;
};
};
sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
pins {
pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
<STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
<STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
<STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
<STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
<STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
};
};
sdmmc1_dir_pins_a: sdmmc1-dir-0 {
pins1 {
pinmux = <STM32_PINMUX('C', 6, AF8)>, /* SDMMC1_D0DIR */
<STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
<STM32_PINMUX('B', 9, AF7)>; /* SDMMC1_CDIR */
slew-rate = <3>;
drive-push-pull;
bias-pull-up;
};
pins2{
pinmux = <STM32_PINMUX('B', 8, AF7)>; /* SDMMC1_CKIN */
bias-pull-up;
};
};
sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
pins {
pinmux = <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC1_D0DIR */
<STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */
<STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
<STM32_PINMUX('B', 8, ANALOG)>; /* SDMMC1_CKIN */
};
};
usart1_pins: usart1@0 {
pins1 {
pinmux = <STM32_PINMUX('B', 14, AF4)>; /* USART1_TX */

69
arch/arm/dts/stm32h743.dtsi
View file

@ -1,52 +1,18 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "skeleton.dtsi"
#include "armv7-m.dtsi"
#include <dt-bindings/clock/stm32h7-clks.h>
#include <dt-bindings/mfd/stm32h7-rcc.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
clocks {
clk_hse: clk-hse {
#clock-cells = <0>;
@ -337,6 +303,20 @@
dma-requests = <32>;
};
sdmmc1: sdmmc@52007000 {
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x10153180>;
reg = <0x52007000 0x1000>;
interrupts = <49>;
interrupt-names = "cmd_irq";
clocks = <&rcc SDMMC1_CK>;
clock-names = "apb_pclk";
resets = <&rcc STM32H7_AHB3_RESET(SDMMC1)>;
cap-sd-highspeed;
cap-mmc-highspeed;
max-frequency = <120000000>;
};
exti: interrupt-controller@58000000 {
compatible = "st,stm32h7-exti";
interrupt-controller;
@ -511,6 +491,19 @@
status = "disabled";
};
};
mac: ethernet@40028000 {
compatible = "st,stm32-dwmac", "snps,dwmac-4.10a";
reg = <0x40028000 0x8000>;
reg-names = "stmmaceth";
interrupts = <61>;
interrupt-names = "macirq";
clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
clocks = <&rcc ETH1MAC_CK>, <&rcc ETH1TX_CK>, <&rcc ETH1RX_CK>;
st,syscon = <&syscfg 0x4>;
snps,pbl = <8>;
status = "disabled";
};
};
};

8
arch/arm/dts/stm32h743i-disco-u-boot.dtsi
View file

@ -1,11 +1,3 @@
// SPDX-License-Identifier: GPL-2.0+
#include <stm32h7-u-boot.dtsi>
&sdmmc1 {
status = "okay";
pinctrl-0 = <&sdmmc1_pins>;
pinctrl-names = "default";
bus-width = <4>;
cd-gpios = <&gpioi 8 1>;
};

76
arch/arm/dts/stm32h743i-disco.dts
View file

@ -1,43 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* Copyright 2017 - Patrice Chotard <patrice.chotard@st.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
@ -54,18 +18,56 @@
};
memory {
device_type = "memory";
reg = <0xd0000000 0x2000000>;
};
aliases {
serial0 = &usart2;
};
v3v3: regulator-v3v3 {
compatible = "regulator-fixed";
regulator-name = "v3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
&clk_hse {
clock-frequency = <25000000>;
};
&mac {
status = "disabled";
pinctrl-0 = <&ethernet_rmii>;
pinctrl-names = "default";
phy-mode = "rmii";
phy-handle = <&phy0>;
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy0: ethernet-phy@0 {
reg = <0>;
};
};
};
&sdmmc1 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc1_b4_pins_a>;
pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
broken-cd;
st,neg-edge;
bus-width = <4>;
vmmc-supply = <&v3v3>;
status = "okay";
};
&usart2 {
pinctrl-0 = <&usart2_pins>;
pinctrl-names = "default";

9
arch/arm/dts/stm32h743i-eval-u-boot.dtsi
View file

@ -1,12 +1,3 @@
// SPDX-License-Identifier: GPL-2.0+
#include <stm32h7-u-boot.dtsi>
&sdmmc1 {
status = "okay";
pinctrl-0 = <&sdmmc1_pins>,
<&pinctrl_sdmmc1_level_shifter>;
pinctrl-names = "default";
bus-width = <4>;
st,sig-dir;
};

42
arch/arm/dts/stm32h743i-eval.dts
View file

@ -54,6 +54,7 @@
};
memory {
device_type = "memory";
reg = <0xd0000000 0x2000000>;
};
@ -69,16 +70,24 @@
regulator-always-on;
};
v2v9_sd: regulator-v2v9_sd {
compatible = "regulator-fixed";
regulator-name = "v2v9_sd";
regulator-min-microvolt = <2900000>;
regulator-max-microvolt = <2900000>;
regulator-always-on;
};
usbotg_hs_phy: usb-phy {
#phy-cells = <0>;
compatible = "usb-nop-xceiv";
clocks = <&rcc USB1ULPI_CK>;
clock-names = "main_clk";
};
};
&adc_12 {
vdda-supply = <&vdda>;
vref-supply = <&vdda>;
status = "okay";
adc1: adc@0 {
@ -104,6 +113,37 @@
status = "okay";
};
&mac {
status = "disabled";
pinctrl-0 = <&ethernet_rmii>;
pinctrl-names = "default";
phy-mode = "rmii";
phy-handle = <&phy0>;
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy0: ethernet-phy@0 {
reg = <0>;
};
};
};
&sdmmc1 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
broken-cd;
st,sig-dir;
st,neg-edge;
st,use-ckin;
bus-width = <4>;
vmmc-supply = <&v2v9_sd>;
status = "okay";
};
&usart1 {
pinctrl-0 = <&usart1_pins>;
pinctrl-names = "default";

59
arch/arm/dts/stm32mp157-pinctrl.dtsi
View file

@ -565,7 +565,7 @@
};
};
m_can1_sleep_pins_a: m_can1-sleep@0 {
m_can1_sleep_pins_a: m_can1-sleep-0 {
pins {
pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
<STM32_PINMUX('I', 9, ANALOG)>; /* CAN1_RX */
@ -812,17 +812,57 @@
};
sdmmc2_b4_pins_a: sdmmc2-b4-0 {
pins {
pins1 {
pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
<STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
<STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
<STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
<STM32_PINMUX('E', 3, AF9)>, /* SDMMC2_CK */
<STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
slew-rate = <3>;
slew-rate = <1>;
drive-push-pull;
bias-pull-up;
};
pins2 {
pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
slew-rate = <2>;
drive-push-pull;
bias-pull-up;
};
};
sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
pins1 {
pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
<STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
<STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
<STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
slew-rate = <1>;
drive-push-pull;
bias-pull-up;
};
pins2 {
pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
slew-rate = <2>;
drive-push-pull;
bias-pull-up;
};
pins3 {
pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
slew-rate = <1>;
drive-open-drain;
bias-pull-up;
};
};
sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
pins {
pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
<STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */
<STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
<STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */
<STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
<STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
};
};
sdmmc2_d47_pins_a: sdmmc2-d47-0 {
@ -831,12 +871,21 @@
<STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
<STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
<STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */
slew-rate = <3>;
slew-rate = <1>;
drive-push-pull;
bias-pull-up;
};
};
sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 {
pins {
pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
<STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
<STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */
<STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */
};
};
spdifrx_pins_a: spdifrx-0 {
pins {
pinmux = <STM32_PINMUX('G', 12, AF8)>; /* SPDIF_IN1 */

5
arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
View file

@ -155,7 +155,10 @@
&sdmmc2_b4_pins_a {
u-boot,dm-spl;
pins {
pins1 {
u-boot,dm-spl;
};
pins2 {
u-boot,dm-spl;
};
};

129
arch/arm/dts/stm32mp157a-dk1.dts
View file

@ -33,6 +33,42 @@
#size-cells = <1>;
ranges;
mcuram2: mcuram2@10000000 {
compatible = "shared-dma-pool";
reg = <0x10000000 0x40000>;
no-map;
};
vdev0vring0: vdev0vring0@10040000 {
compatible = "shared-dma-pool";
reg = <0x10040000 0x1000>;
no-map;
};
vdev0vring1: vdev0vring1@10041000 {
compatible = "shared-dma-pool";
reg = <0x10041000 0x1000>;
no-map;
};
vdev0buffer: vdev0buffer@10042000 {
compatible = "shared-dma-pool";
reg = <0x10042000 0x4000>;
no-map;
};
mcuram: mcuram@30000000 {
compatible = "shared-dma-pool";
reg = <0x30000000 0x40000>;
no-map;
};
retram: retram@38000000 {
compatible = "shared-dma-pool";
reg = <0x38000000 0x10000>;
no-map;
};
gpu_reserved: gpu@d4000000 {
reg = <0xd4000000 0x4000000>;
no-map;
@ -48,6 +84,17 @@
default-state = "off";
};
};
sound {
compatible = "audio-graph-card";
label = "STM32MP1-DK";
routing =
"Playback" , "MCLK",
"Capture" , "MCLK",
"MICL" , "Mic Bias";
dais = <&sai2a_port &sai2b_port>;
status = "okay";
};
};
&cec {
@ -116,6 +163,39 @@
};
};
};
cs42l51: cs42l51@4a {
compatible = "cirrus,cs42l51";
reg = <0x4a>;
#sound-dai-cells = <0>;
VL-supply = <&v3v3>;
VD-supply = <&v1v8_audio>;
VA-supply = <&v1v8_audio>;
VAHP-supply = <&v1v8_audio>;
reset-gpios = <&gpiog 9 GPIO_ACTIVE_LOW>;
clocks = <&sai2a>;
clock-names = "MCLK";
status = "okay";
cs42l51_port: port {
#address-cells = <1>;
#size-cells = <0>;
cs42l51_tx_endpoint: endpoint@0 {
reg = <0>;
remote-endpoint = <&sai2a_endpoint>;
frame-master;
bitclock-master;
};
cs42l51_rx_endpoint: endpoint@1 {
reg = <1>;
remote-endpoint = <&sai2b_endpoint>;
frame-master;
bitclock-master;
};
};
};
};
&i2c4 {
@ -308,8 +388,12 @@
};
&m4_rproc {
memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
<&vdev0vring1>, <&vdev0buffer>;
mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
mbox-names = "vq0", "vq1", "shutdown";
interrupt-parent = <&exti>;
interrupts = <68 1>;
status = "okay";
};
@ -328,6 +412,51 @@
status = "okay";
};
&sai2 {
clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
clock-names = "pclk", "x8k", "x11k";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sai2a_pins_a>, <&sai2b_pins_b>;
pinctrl-1 = <&sai2a_sleep_pins_a>, <&sai2b_sleep_pins_b>;
status = "okay";
sai2a: audio-controller@4400b004 {
#clock-cells = <0>;
dma-names = "tx";
clocks = <&rcc SAI2_K>;
clock-names = "sai_ck";
status = "okay";
sai2a_port: port {
sai2a_endpoint: endpoint {
remote-endpoint = <&cs42l51_tx_endpoint>;
format = "i2s";
mclk-fs = <256>;
dai-tdm-slot-num = <2>;
dai-tdm-slot-width = <32>;
};
};
};
sai2b: audio-controller@4400b024 {
dma-names = "rx";
st,sync = <&sai2a 2>;
clocks = <&rcc SAI2_K>, <&sai2a>;
clock-names = "sai_ck", "MCLK";
status = "okay";
sai2b_port: port {
sai2b_endpoint: endpoint {
remote-endpoint = <&cs42l51_rx_endpoint>;
format = "i2s";
mclk-fs = <256>;
dai-tdm-slot-num = <2>;
dai-tdm-slot-width = <32>;
};
};
};
};
&sdmmc1 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc1_b4_pins_a>;

5
arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
View file

@ -174,7 +174,10 @@
&sdmmc2_b4_pins_a {
u-boot,dm-spl;
pins {
pins1 {
u-boot,dm-spl;
};
pins2 {
u-boot,dm-spl;
};
};

51
arch/arm/dts/stm32mp157c-ed1.dts
View file

@ -28,6 +28,42 @@
#size-cells = <1>;
ranges;
mcuram2: mcuram2@10000000 {
compatible = "shared-dma-pool";
reg = <0x10000000 0x40000>;
no-map;
};
vdev0vring0: vdev0vring0@10040000 {
compatible = "shared-dma-pool";
reg = <0x10040000 0x1000>;
no-map;
};
vdev0vring1: vdev0vring1@10041000 {
compatible = "shared-dma-pool";
reg = <0x10041000 0x1000>;
no-map;
};
vdev0buffer: vdev0buffer@10042000 {
compatible = "shared-dma-pool";
reg = <0x10042000 0x4000>;
no-map;
};
mcuram: mcuram@30000000 {
compatible = "shared-dma-pool";
reg = <0x30000000 0x40000>;
no-map;
};
retram: retram@38000000 {
compatible = "shared-dma-pool";
reg = <0x38000000 0x10000>;
no-map;
};
gpu_reserved: gpu@e8000000 {
reg = <0xe8000000 0x8000000>;
no-map;
@ -176,10 +212,10 @@
regulator-over-current-protection;
};
bst_out: boost {
bst_out: boost {
regulator-name = "bst_out";
interrupts = <IT_OCP_BOOST 0>;
};
};
vbus_otg: pwr_sw1 {
regulator-name = "vbus_otg";
@ -218,8 +254,12 @@
};
&m4_rproc {
memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
<&vdev0vring1>, <&vdev0buffer>;
mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
mbox-names = "vq0", "vq1", "shutdown";
interrupt-parent = <&exti>;
interrupts = <68 1>;
status = "okay";
};
@ -254,15 +294,18 @@
};
&sdmmc2 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;
pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
non-removable;
no-sd;
no-sdio;
st,sig-dir;
st,neg-edge;
bus-width = <8>;
vmmc-supply = <&v3v3>;
vqmmc-supply = <&vdd>;
vqmmc-supply = <&v3v3>;
mmc-ddr-3_3v;
status = "okay";
};

3
arch/arm/dts/stm32mp157c-ev1.dts
View file

@ -101,6 +101,7 @@
&dsi {
#address-cells = <1>;
#size-cells = <0>;
phy-dsi-supply = <&reg18>;
status = "okay";
ports {
@ -165,7 +166,7 @@
#address-cells = <1>;
#size-cells = <0>;
nand: nand@0 {
nand@0 {
reg = <0>;
nand-on-flash-bbt;
#address-cells = <1>;

26
arch/arm/dts/stm32mp157c.dtsi
View file

@ -109,6 +109,12 @@
};
};
booster: regulator-booster {
compatible = "st,stm32mp1-booster";
st,syscfg = <&syscfg>;
status = "disabled";
};
reboot {
compatible = "syscon-reboot";
regmap = <&rcc>;
@ -140,6 +146,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
@ -168,6 +175,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
@ -194,6 +202,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
@ -222,6 +231,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
@ -279,6 +289,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
@ -300,6 +311,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
@ -321,6 +333,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
@ -574,6 +587,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
@ -604,6 +618,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
@ -677,6 +692,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
@ -701,6 +717,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
timer@15 {
@ -724,6 +741,7 @@
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
@ -990,6 +1008,7 @@
clocks = <&rcc ADC12>, <&rcc ADC12_K>;
clock-names = "bus", "adc";
interrupt-controller;
st,syscfg = <&syscfg>;
#interrupt-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
@ -1313,6 +1332,10 @@
<0x89010000 0x1000>,
<0x89020000 0x1000>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&mdma1 20 0x10 0x12000a02 0x0 0x0>,
<&mdma1 20 0x10 0x12000a08 0x0 0x0>,
<&mdma1 21 0x10 0x12000a0a 0x0 0x0>;
dma-names = "tx", "rx", "ecc";
clocks = <&rcc FMC_K>;
resets = <&rcc FMC_R>;
status = "disabled";
@ -1323,6 +1346,9 @@
reg = <0x58003000 0x1000>, <0x70000000 0x10000000>;
reg-names = "qspi", "qspi_mm";
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&mdma1 22 0x10 0x100002 0x0 0x0>,
<&mdma1 22 0x10 0x100008 0x0 0x0>;
dma-names = "tx", "rx";
clocks = <&rcc QSPI_K>;
resets = <&rcc QSPI_R>;
status = "disabled";

111
board/st/stm32mp1/README
View file

@ -390,3 +390,114 @@ B/ Automatically by using FIT feature and generic DISTRO bootcmd
the correct configuration
=> stm32mp157c-ev1-m4
=> stm32mp157c-dk2-m4
11. DFU support
===============
The DFU is supported on ST board.
The env variable dfu_alt_info is automatically build, and all
the memory present on the ST boards are exported.
The mode is started by
STM32MP> dfu 0
On EV1 board:
STM32MP> dfu 0 list
DFU alt settings list:
dev: RAM alt: 0 name: uImage layout: RAM_ADDR
dev: RAM alt: 1 name: devicetree.dtb layout: RAM_ADDR
dev: RAM alt: 2 name: uramdisk.image.gz layout: RAM_ADDR
dev: eMMC alt: 3 name: sdcard_fsbl1 layout: RAW_ADDR
dev: eMMC alt: 4 name: sdcard_fsbl2 layout: RAW_ADDR
dev: eMMC alt: 5 name: sdcard_ssbl layout: RAW_ADDR
dev: eMMC alt: 6 name: sdcard_bootfs layout: RAW_ADDR
dev: eMMC alt: 7 name: sdcard_vendorfs layout: RAW_ADDR
dev: eMMC alt: 8 name: sdcard_rootfs layout: RAW_ADDR
dev: eMMC alt: 9 name: sdcard_userfs layout: RAW_ADDR
dev: eMMC alt: 10 name: emmc_fsbl1 layout: RAW_ADDR
dev: eMMC alt: 11 name: emmc_fsbl2 layout: RAW_ADDR
dev: eMMC alt: 12 name: emmc_ssbl layout: RAW_ADDR
dev: eMMC alt: 13 name: emmc_bootfs layout: RAW_ADDR
dev: eMMC alt: 14 name: emmc_vendorfs layout: RAW_ADDR
dev: eMMC alt: 15 name: emmc_rootfs layout: RAW_ADDR
dev: eMMC alt: 16 name: emmc_userfs layout: RAW_ADDR
dev: MTD alt: 17 name: nor_fsbl1 layout: RAW_ADDR
dev: MTD alt: 18 name: nor_fsbl2 layout: RAW_ADDR
dev: MTD alt: 19 name: nor_ssbl layout: RAW_ADDR
dev: MTD alt: 20 name: nor_env layout: RAW_ADDR
dev: MTD alt: 21 name: nand_fsbl layout: RAW_ADDR
dev: MTD alt: 22 name: nand_ssbl1 layout: RAW_ADDR
dev: MTD alt: 23 name: nand_ssbl2 layout: RAW_ADDR
dev: MTD alt: 24 name: nand_UBI layout: RAW_ADDR
dev: VIRT alt: 25 name: OTP layout: RAW_ADDR
dev: VIRT alt: 26 name: PMIC layout: RAW_ADDR
All the supported device are exported for dfu-util tool:
$> dfu-util -l
Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=26, name="PMIC", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=25, name="OTP", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=24, name="nand_UBI", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=23, name="nand_ssbl2", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=22, name="nand_ssbl1", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=21, name="nand_fsbl", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=20, name="nor_env", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=19, name="nor_ssbl", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=18, name="nor_fsbl2", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=17, name="nor_fsbl1", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=16, name="emmc_userfs", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=15, name="emmc_rootfs", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=14, name="emmc_vendorfs", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=13, name="emmc_bootfs", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=12, name="emmc_ssbl", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=11, name="emmc_fsbl2", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=10, name="emmc_fsbl1", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=9, name="sdcard_userfs", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=8, name="sdcard_rootfs", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=7, name="sdcard_vendorfs", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=6, name="sdcard_bootfs", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=5, name="sdcard_ssbl", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=4, name="sdcard_fsbl2", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=3, name="sdcard_fsbl1", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=2, name="uramdisk.image.gz", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=1, name="devicetree.dtb", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=0, name="uImage", serial="002700333338511934383330"
You can update the boot device:
#SDCARD
$> dfu-util -d 0483:5720 -a 3 -D tf-a-stm32mp157c-ev1-trusted.stm32
$> dfu-util -d 0483:5720 -a 4 -D tf-a-stm32mp157c-ev1-trusted.stm32
$> dfu-util -d 0483:5720 -a 5 -D u-boot-stm32mp157c-ev1-trusted.img
$> dfu-util -d 0483:5720 -a 6 -D st-image-bootfs-openstlinux-weston-stm32mp1.ext4
$> dfu-util -d 0483:5720 -a 7 -D st-image-vendorfs-openstlinux-weston-stm32mp1.ext4
$> dfu-util -d 0483:5720 -a 8 -D st-image-weston-openstlinux-weston-stm32mp1.ext4
$> dfu-util -d 0483:5720 -a 9 -D st-image-userfs-openstlinux-weston-stm32mp1.ext4
#EMMC
$> dfu-util -d 0483:5720 -a 10 -D tf-a-stm32mp157c-ev1-trusted.stm32
$> dfu-util -d 0483:5720 -a 11 -D tf-a-stm32mp157c-ev1-trusted.stm32
$> dfu-util -d 0483:5720 -a 12 -D u-boot-stm32mp157c-ev1-trusted.img
$> dfu-util -d 0483:5720 -a 13 -D st-image-bootfs-openstlinux-weston-stm32mp1.ext4
$> dfu-util -d 0483:5720 -a 14 -D st-image-vendorfs-openstlinux-weston-stm32mp1.ext4
$> dfu-util -d 0483:5720 -a 15 -D st-image-weston-openstlinux-weston-stm32mp1.ext4
$> dfu-util -d 0483:5720 -a 16 -D st-image-userfs-openstlinux-weston-stm32mp1.ext4
#NOR
$> dfu-util -d 0483:5720 -a 17 -D tf-a-stm32mp157c-ev1-trusted.stm32
$> dfu-util -d 0483:5720 -a 18 -D tf-a-stm32mp157c-ev1-trusted.stm32
$> dfu-util -d 0483:5720 -a 19 -D u-boot-stm32mp157c-ev1-trusted.img
#NAND (UBI partition used for NAND only boot or NOR + NAND boot)
$> dfu-util -d 0483:5720 -a 21 -D tf-a-stm32mp157c-ev1-trusted.stm32
$> dfu-util -d 0483:5720 -a 22 -D u-boot-stm32mp157c-ev1-trusted.img
$> dfu-util -d 0483:5720 -a 23 -D u-boot-stm32mp157c-ev1-trusted.img
$> dfu-util -d 0483:5720 -a 24 -D st-image-weston-openstlinux-weston-stm32mp1_nand_4_256_multivolume.ubi
And you can also dump the OTP and the PMIC NVM with:
$> dfu-util -d 0483:5720 -a 25 -U otp.bin
$> dfu-util -d 0483:5720 -a 26 -U pmic.bin

164
board/st/stm32mp1/stm32mp1.c
View file

@ -14,6 +14,7 @@
#include <generic-phy.h>
#include <i2c.h>
#include <led.h>
#include <memalign.h>
#include <misc.h>
#include <mtd.h>
#include <mtd_node.h>
@ -878,8 +879,9 @@ static void board_get_mtdparts(const char *dev,
void board_mtdparts_default(const char **mtdids, const char **mtdparts)
{
struct mtd_info *mtd;
struct udevice *dev;
static char parts[2 * MTDPARTS_LEN + 1];
static char parts[3 * MTDPARTS_LEN + 1];
static char ids[MTDIDS_LEN + 1];
static bool mtd_initialized;
@ -892,8 +894,24 @@ void board_mtdparts_default(const char **mtdids, const char **mtdparts)
memset(parts, 0, sizeof(parts));
memset(ids, 0, sizeof(ids));
if (!uclass_get_device(UCLASS_MTD, 0, &dev))
/* probe all MTD devices */
for (uclass_first_device(UCLASS_MTD, &dev);
dev;
uclass_next_device(&dev)) {
pr_debug("mtd device = %s\n", dev->name);
}
mtd = get_mtd_device_nm("nand0");
if (!IS_ERR_OR_NULL(mtd)) {
board_get_mtdparts("nand0", ids, parts);
put_mtd_device(mtd);
}
mtd = get_mtd_device_nm("spi-nand0");
if (!IS_ERR_OR_NULL(mtd)) {
board_get_mtdparts("spi-nand0", ids, parts);
put_mtd_device(mtd);
}
if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev))
board_get_mtdparts("nor0", ids, parts);
@ -920,6 +938,148 @@ int ft_board_setup(void *blob, bd_t *bd)
}
#endif
#ifdef CONFIG_SET_DFU_ALT_INFO
#define DFU_ALT_BUF_LEN SZ_1K
static void board_get_alt_info(const char *dev, char *buff)
{
char var_name[32] = "dfu_alt_info_";
int ret;
ALLOC_CACHE_ALIGN_BUFFER(char, tmp_alt, DFU_ALT_BUF_LEN);
/* name of env variable to read = dfu_alt_info_<dev> */
strcat(var_name, dev);
ret = env_get_f(var_name, tmp_alt, DFU_ALT_BUF_LEN);
if (ret) {
if (buff[0] != '\0')
strcat(buff, "&");
strncat(buff, tmp_alt, DFU_ALT_BUF_LEN);
}
}
void set_dfu_alt_info(char *interface, char *devstr)
{
struct udevice *dev;
struct mtd_info *mtd;
ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN);
if (env_get("dfu_alt_info"))
return;
memset(buf, 0, sizeof(buf));
/* probe all MTD devices */
mtd_probe_devices();
board_get_alt_info("ram", buf);
if (!uclass_get_device(UCLASS_MMC, 0, &dev))
board_get_alt_info("mmc0", buf);
if (!uclass_get_device(UCLASS_MMC, 1, &dev))
board_get_alt_info("mmc1", buf);
if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev))
board_get_alt_info("nor0", buf);
mtd = get_mtd_device_nm("nand0");
if (!IS_ERR_OR_NULL(mtd))
board_get_alt_info("nand0", buf);
mtd = get_mtd_device_nm("spi-nand0");
if (!IS_ERR_OR_NULL(mtd))
board_get_alt_info("spi-nand0", buf);
#ifdef CONFIG_DFU_VIRT
strncat(buf, "&virt 0=OTP", DFU_ALT_BUF_LEN);
if (IS_ENABLED(CONFIG_PMIC_STPMIC1))
strncat(buf, "&virt 1=PMIC", DFU_ALT_BUF_LEN);
#endif
env_set("dfu_alt_info", buf);
puts("DFU alt info setting: done\n");
}
#if CONFIG_IS_ENABLED(DFU_VIRT)
#include <dfu.h>
#include <power/stpmic1.h>
int dfu_otp_read(u64 offset, u8 *buffer, long *size)
{
struct udevice *dev;
int ret;
ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_GET_DRIVER(stm32mp_bsec),
&dev);
if (ret)
return ret;
ret = misc_read(dev, offset + STM32_BSEC_OTP_OFFSET, buffer, *size);
if (ret >= 0) {
*size = ret;
ret = 0;
}
return 0;
}
int dfu_pmic_read(u64 offset, u8 *buffer, long *size)
{
int ret;
#ifdef CONFIG_PMIC_STPMIC1
struct udevice *dev;
ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_GET_DRIVER(stpmic1_nvm),
&dev);
if (ret)
return ret;
ret = misc_read(dev, 0xF8 + offset, buffer, *size);
if (ret >= 0) {
*size = ret;
ret = 0;
}
if (ret == -EACCES) {
*size = 0;
ret = 0;
}
#else
pr_err("PMIC update not supported");
ret = -EOPNOTSUPP;
#endif
return ret;
}
int dfu_read_medium_virt(struct dfu_entity *dfu, u64 offset,
void *buf, long *len)
{
switch (dfu->data.virt.dev_num) {
case 0x0:
return dfu_otp_read(offset, buf, len);
case 0x1:
return dfu_pmic_read(offset, buf, len);
}
*len = 0;
return 0;
}
int __weak dfu_get_medium_size_virt(struct dfu_entity *dfu, u64 *size)
{
*size = SZ_1K;
return 0;
}
#endif
#endif
static void board_copro_image_process(ulong fw_image, size_t fw_size)
{
int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */

1
configs/stih410-b2260_defconfig
View file

@ -33,6 +33,7 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_MISC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_STI=y
CONFIG_DM_ETH=y
CONFIG_PHY=y
CONFIG_STI_USB_PHY=y
CONFIG_PINCTRL=y

6
configs/stm32mp15_basic_defconfig
View file

@ -34,6 +34,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MTD=y
CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
@ -64,6 +65,10 @@ CONFIG_ENV_UBI_VOLUME="uboot_config"
CONFIG_ENV_UBI_VOLUME_REDUND="uboot_config_r"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_STM32_ADC=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_MTD=y
CONFIG_DFU_VIRT=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0xC0000000
CONFIG_FASTBOOT_BUF_SIZE=0x02000000
@ -84,6 +89,7 @@ CONFIG_STM32_SDMMC2=y
CONFIG_MTD=y
CONFIG_NAND=y
CONFIG_NAND_STM32_FMC2=y
CONFIG_MTD_SPI_NAND=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y

6
configs/stm32mp15_optee_defconfig
View file

@ -23,6 +23,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MTD=y
CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
@ -51,6 +52,10 @@ CONFIG_ENV_UBI_VOLUME="uboot_config"
CONFIG_ENV_UBI_VOLUME_REDUND="uboot_config_r"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_STM32_ADC=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_MTD=y
CONFIG_DFU_VIRT=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0xC0000000
CONFIG_FASTBOOT_BUF_SIZE=0x02000000
@ -71,6 +76,7 @@ CONFIG_STM32_SDMMC2=y
CONFIG_MTD=y
CONFIG_NAND=y
CONFIG_NAND_STM32_FMC2=y
CONFIG_MTD_SPI_NAND=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y

6
configs/stm32mp15_trusted_defconfig
View file

@ -22,6 +22,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MTD=y
CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
@ -50,6 +51,10 @@ CONFIG_ENV_UBI_VOLUME="uboot_config"
CONFIG_ENV_UBI_VOLUME_REDUND="uboot_config_r"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_STM32_ADC=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_MTD=y
CONFIG_DFU_VIRT=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0xC0000000
CONFIG_FASTBOOT_BUF_SIZE=0x02000000
@ -70,6 +75,7 @@ CONFIG_STM32_SDMMC2=y
CONFIG_MTD=y
CONFIG_NAND=y
CONFIG_NAND_STM32_FMC2=y
CONFIG_MTD_SPI_NAND=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y

42
include/configs/stm32mp1.h
View file

@ -83,6 +83,8 @@
#define CONFIG_SYS_MTDPARTS_RUNTIME
#endif
#define CONFIG_SET_DFU_ALT_INFO
#ifdef CONFIG_DM_VIDEO
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_BMP_16BPP
@ -129,12 +131,15 @@
/* with OPTEE: define specific MTD partitions = teeh, teed, teex */
#define STM32MP_MTDPARTS \
"mtdparts_nor0=256k(fsbl1),256k(fsbl2),2m(ssbl),256k(u-boot-env),256k(teeh),256k(teed),256k(teex),-(nor_user)\0" \
"mtdparts_nand0=2m(fsbl),2m(ssbl1),2m(ssbl2),512k(teeh),512k(teed),512k(teex),-(UBI)\0"
"mtdparts_nand0=2m(fsbl),2m(ssbl1),2m(ssbl2),512k(teeh),512k(teed),512k(teex),-(UBI)\0" \
"mtdparts_spi-nand0=2m(fsbl),2m(ssbl1),2m(ssbl2),"\
"512k(teeh),512k(teed),512k(teex),-(UBI)\0"
#else /* CONFIG_STM32MP1_OPTEE */
#define STM32MP_MTDPARTS \
"mtdparts_nor0=256k(fsbl1),256k(fsbl2),2m(ssbl),256k(u-boot-env),-(nor_user)\0" \
"mtdparts_nand0=2m(fsbl),2m(ssbl1),2m(ssbl2),-(UBI)\0"
"mtdparts_nand0=2m(fsbl),2m(ssbl1),2m(ssbl2),-(UBI)\0" \
"mtdparts_spi-nand0=2m(fsbl),2m(ssbl1),2m(ssbl2),-(UBI)\0"
#endif /* CONFIG_STM32MP1_OPTEE */
@ -143,6 +148,37 @@
#define STM32MP_MTDPARTS
#endif
#define STM32MP_DFU_ALT_RAM \
"dfu_alt_info_ram=ram 0=" \
"uImage ram ${kernel_addr_r} 0x2000000;" \
"devicetree.dtb ram ${fdt_addr_r} 0x100000;" \
"uramdisk.image.gz ram ${ramdisk_addr_r} 0x10000000\0"
#ifdef CONFIG_SET_DFU_ALT_INFO
#define STM32MP_DFU_ALT_INFO \
"dfu_alt_info_nor0=mtd nor0=" \
"nor_fsbl1 part 1;nor_fsbl2 part 2;" \
"nor_ssbl part 3;nor_env part 4\0" \
"dfu_alt_info_nand0=mtd nand0="\
"nand_fsbl part 1;nand_ssbl1 part 2;" \
"nand_ssbl2 part 3;nand_UBI partubi 4\0" \
"dfu_alt_info_spi-nand0=mtd spi-nand0="\
"spi-nand_fsbl part 1;spi-nand_ssbl1 part 2;" \
"spi-nand_ssbl2 part 3;spi-nand_UBI partubi 4\0" \
"dfu_alt_info_mmc0=mmc 0=" \
"sdcard_fsbl1 part 0 1;sdcard_fsbl2 part 0 2;" \
"sdcard_ssbl part 0 3;sdcard_bootfs part 0 4;" \
"sdcard_vendorfs part 0 5;sdcard_rootfs part 0 6;" \
"sdcard_userfs part 0 7\0" \
"dfu_alt_info_mmc1=mmc 1=" \
"emmc_fsbl1 raw 0x0 0x200 mmcpart 1;" \
"emmc_fsbl2 raw 0x0 0x200 mmcpart 2;emmc_ssbl part 1 1;" \
"emmc_bootfs part 1 2;emmc_vendorfs part 1 3;" \
"emmc_rootfs part 1 4;emmc_userfs part 1 5\0"
#else
#define STM32MP_DFU_ALT_INFO
#endif
/*
* memory layout for 32M uncompressed/compressed kernel,
* 1M fdt, 1M script, 1M pxe and 1M for splashimage
@ -164,6 +200,8 @@
" then env set env_default 0;env save;fi\0" \
STM32MP_BOOTCMD \
STM32MP_MTDPARTS \
STM32MP_DFU_ALT_RAM \
STM32MP_DFU_ALT_INFO \
BOOTENV \
"boot_net_usb_start=true\0"

9
include/dt-bindings/clock/stm32fx-clock.h
View file

@ -1,9 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* stm32fx-clock.h
*
* Copyright (C) 2016 STMicroelectronics
* Author: Gabriel Fernandez for STMicroelectronics.
* License terms: GNU General Public License (GPL), version 2
*/
/*
@ -54,7 +54,10 @@
#define CLK_I2C3 28
#define CLK_I2C4 29
#define CLK_LPTIMER 30
#define END_PRIMARY_CLK_F7 31
#define CLK_PLL_SRC 31
#define CLK_DFSDM1 32
#define CLK_ADFSDM1 33
#define CLK_F769_DSI 34
#define END_PRIMARY_CLK_F7 35
#endif

4
include/dt-bindings/mfd/st,stpmic1.h
View file

@ -43,4 +43,8 @@
#define IT_SWIN_F 30
#define IT_SWIN_R 31
/* BUCK MODES definitions */
#define STPMIC1_BUCK_MODE_NORMAL 0
#define STPMIC1_BUCK_MODE_LP 2
#endif /* __DT_BINDINGS_STPMIC1_H__ */

1
include/dt-bindings/mfd/stm32f7-rcc.h
View file

@ -1,3 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* This header provides constants for the STM32F7 RCC IP
*/

2
include/dt-bindings/mfd/stm32h7-rcc.h
View file

@ -12,6 +12,7 @@
#define STM32H7_RCC_AHB3_FMC 12
#define STM32H7_RCC_AHB3_QUADSPI 14
#define STM32H7_RCC_AHB3_SDMMC1 16
#define STM32H7_RCC_AHB3_CPU 31
#define STM32H7_RCC_AHB3_CPU1 31
#define STM32H7_AHB3_RESET(bit) (STM32H7_RCC_AHB3_##bit + (0x7C * 8))
@ -56,7 +57,6 @@
#define STM32H7_AHB4_RESET(bit) (STM32H7_RCC_AHB4_##bit + (0x88 * 8))
/* APB3 */
#define STM32H7_RCC_APB3_LTDC 3
#define STM32H7_RCC_APB3_DSI 4