Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2024-09-22 15:42:04 +00:00
Code Issues Projects Releases Packages Wiki Activity

Merge branch '2019-06-21-master-imports'

Browse source 
- Assorted small fixes
- Bugfix RSA handling code to reject images with unknown padding.
- Some boards disabled unused features to turn off DM warnings.
This commit is contained in:
Tom Rini 2019-06-21 14:11:11 -04:00
commit 271dc9ce7f
77 changed files with 461 additions and 284 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
.travis.yml
View file

@ -183,6 +183,9 @@ matrix:
- name: "buildman NXP AArch64 LS101x"
env:
- BUILDMAN="freescale&aarch64&ls101"
- name: "buildman NXP AArch64 LS102x"
env:
- BUILDMAN="freescale&aarch64&ls102"
- name: "buildman NXP AArch64 LS104x"
env:
- BUILDMAN="freescale&aarch64&ls104"
@ -192,6 +195,9 @@ matrix:
- name: "buildman NXP AArch64 LS20xx"
env:
- BUILDMAN="freescale&aarch64&&ls20"
- name: "buildman NXP AArch64 LX216x"
env:
- BUILDMAN="freescale&aarch64&lx216"
- name: "buildman i.MX6 (non-NXP)"
env:
- BUILDMAN="mx6 -x freescale,toradex,boundary,engicam"

438
board/Arcturus/ucp1020/cmd_arc.c
View file

@ -2,8 +2,8 @@
/*
* Command for accessing Arcturus factory environment.
*
* Copyright 2013-2015 Arcturus Networks Inc.
* http://www.arcturusnetworks.com/products/ucp1020/
* Copyright 2013-2019 Arcturus Networks Inc.
* https://www.arcturusnetworks.com/products/
* by Oleksandr G Zhadan et al.
*
*/
@ -12,19 +12,13 @@
#include <div64.h>
#include <malloc.h>
#include <spi_flash.h>
#include <mmc.h>
#include <version.h>
#include <environment.h>
#include <asm/io.h>
#define MAX_SERIAL_SIZE 15
#define MAX_HWADDR_SIZE 17
#define FIRM_ADDR1 (0x200 - sizeof(smac))
#define FIRM_ADDR2 (0x400 - sizeof(smac))
#define FIRM_ADDR3 (CONFIG_ENV_SECT_SIZE + 0x200 - sizeof(smac))
#define FIRM_ADDR4 (CONFIG_ENV_SECT_SIZE + 0x400 - sizeof(smac))
static struct spi_flash *flash;
char smac[4][18];
static ulong fwenv_addr[MAX_FWENV_ADDR];
const char mystrerr[] = "ERROR: Failed to save factory info";
static int ishwaddr(char *hwaddr)
{
@ -38,11 +32,181 @@ static int ishwaddr(char *hwaddr)
return -1;
}
static int set_arc_product(int argc, char *const argv[])
{
int err = 0;
char *mystrerr = "ERROR: Failed to save factory info in spi location";
#if (FWENV_TYPE == FWENV_MMC)
static char smac[29][18] __attribute__ ((aligned(0x200))); /* 1 MMC block is 512 bytes */
int set_mmc_arc_product(int argc, char *const argv[])
{
struct mmc *mmc;
u32 blk, cnt, n;
int i, err = 1;
void *addr;
const u8 mmc_dev_num = CONFIG_SYS_MMC_ENV_DEV;
mmc = find_mmc_device(mmc_dev_num);
if (!mmc) {
printf("No SD/MMC/eMMC card found\n");
return 0;
}
if (mmc_init(mmc)) {
printf("%s(%d) init failed\n", IS_SD(mmc) ? "SD" : "MMC",
mmc_dev_num);
return 0;
}
if (mmc_getwp(mmc) == 1) {
printf("Error: card is write protected!\n");
return CMD_RET_FAILURE;
}
/* Save factory defaults */
addr = (void *)smac;
cnt = 1; /* One 512 bytes block */
for (i = 0; i < MAX_FWENV_ADDR; i++)
if (fwenv_addr[i] != -1) {
blk = fwenv_addr[i] / 512;
n = blk_dwrite(mmc_get_blk_desc(mmc), blk, cnt, addr);
if (n != cnt)
printf("%s: %s [%d]\n", __func__, mystrerr, i);
else
err = 0;
}
if (err)
return -2;
return err;
}
static int read_mmc_arc_info(void)
{
struct mmc *mmc;
u32 blk, cnt, n;
int i;
void *addr;
const u8 mmc_dev_num = CONFIG_SYS_MMC_ENV_DEV;
mmc = find_mmc_device(mmc_dev_num);
if (!mmc) {
printf("No SD/MMC/eMMC card found\n");
return 0;
}
if (mmc_init(mmc)) {
printf("%s(%d) init failed\n", IS_SD(mmc) ? "SD" : "MMC",
mmc_dev_num);
return 0;
}
addr = (void *)smac;
cnt = 1; /* One 512 bytes block */
for (i = 0; i < MAX_FWENV_ADDR; i++)
if (fwenv_addr[i] != -1) {
blk = fwenv_addr[i] / 512;
n = blk_dread(mmc_get_blk_desc(mmc), blk, cnt, addr);
flush_cache((ulong) addr, 512);
if (n == cnt)
return (i + 1);
}
return 0;
}
#endif
#if (FWENV_TYPE == FWENV_SPI_FLASH)
static struct spi_flash *flash;
static char smac[4][18];
int set_spi_arc_product(int argc, char *const argv[])
{
int i, err = 1;
flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);
if (!flash) {
printf("Failed to initialize SPI flash at %u:%u\n",
CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS);
return -1;
}
/* Save factory defaults */
for (i = 0; i < MAX_FWENV_ADDR; i++)
if (fwenv_addr[i] != -1)
if (spi_flash_write
(flash, fwenv_addr[i], sizeof(smac), smac))
printf("%s: %s [%d]\n", __func__, mystrerr, i);
else
err = 0;
if (err)
return -2;
return err;
}
static int read_spi_arc_info(void)
{
int i;
flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);
if (!flash) {
printf("Failed to initialize SPI flash at %u:%u\n",
CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS);
return 0;
}
for (i = 0; i < MAX_FWENV_ADDR; i++)
if (fwenv_addr[i] != -1)
if (!spi_flash_read
(flash, fwenv_addr[i], sizeof(smac), smac))
return (i + 1);
return 0;
}
#endif
#if (FWENV_TYPE == FWENV_NOR_FLASH)
static char smac[4][18];
int set_nor_arc_product(int argc, char *const argv[])
{
int i, err = 1;
/* Save factory defaults */
for (i = 0; i < MAX_FWENV_ADDR; i++)
if (fwenv_addr[i] != -1) {
ulong fwenv_end = fwenv_addr[i] + 4;
flash_sect_roundb(&fwenv_end);
flash_sect_protect(0, fwenv_addr[i], fwenv_end);
if (flash_write
((char *)smac, fwenv_addr[i], sizeof(smac)))
printf("%s: %s [%d]\n", __func__, mystrerr, i);
else
err = 0;
flash_sect_protect(1, fwenv_addr[i], fwenv_end);
}
if (err)
return -2;
return err;
}
static int read_nor_arc_info(void)
{
int i;
for (i = 0; i < MAX_FWENV_ADDR; i++)
if (fwenv_addr[i] != -1) {
memcpy(smac, (void *)fwenv_addr[i], sizeof(smac));
return (i + 1);
}
return 0;
}
#endif
int set_arc_product(int argc, char *const argv[])
{
if (argc != 5)
return -1;
@ -54,140 +218,163 @@ static int set_arc_product(int argc, char *const argv[])
if (ishwaddr(argv[2]) || ishwaddr(argv[3]) || ishwaddr(argv[4]))
return -1;
strcpy(smac[3], argv[1]);
strcpy(smac[2], argv[2]);
strcpy(smac[1], argv[3]);
strcpy(smac[0], argv[4]);
strcpy(smac[0], argv[1]);
strcpy(smac[1], argv[2]);
strcpy(smac[2], argv[3]);
strcpy(smac[3], argv[4]);
flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);
#if (FWENV_TYPE == FWENV_NOR_FLASH)
return set_nor_arc_product(argc, argv);
#endif
#if (FWENV_TYPE == FWENV_SPI_FLASH)
return set_spi_arc_product(argc, argv);
#endif
#if (FWENV_TYPE == FWENV_MMC)
return set_mmc_arc_product(argc, argv);
#endif
return -2;
}
/*
* Save factory defaults
*/
static int read_arc_info(void)
{
#if (FWENV_TYPE == FWENV_NOR_FLASH)
return read_nor_arc_info();
#endif
#if (FWENV_TYPE == FWENV_SPI_FLASH)
return read_spi_arc_info();
#endif
#if (FWENV_TYPE == FWENV_MMC)
return read_mmc_arc_info();
#endif
return 0;
}
if (spi_flash_write(flash, FIRM_ADDR1, sizeof(smac), smac)) {
printf("%s: %s [1]\n", __func__, mystrerr);
err++;
}
if (spi_flash_write(flash, FIRM_ADDR2, sizeof(smac), smac)) {
printf("%s: %s [2]\n", __func__, mystrerr);
err++;
}
static int do_get_arc_info(void)
{
int l = read_arc_info();
char *oldserial = env_get("SERIAL");
char *oldversion = env_get("VERSION");
if (spi_flash_write(flash, FIRM_ADDR3, sizeof(smac), smac)) {
printf("%s: %s [3]\n", __func__, mystrerr);
err++;
}
if (oldversion != NULL)
if (strcmp(oldversion, U_BOOT_VERSION) != 0)
oldversion = NULL;
if (spi_flash_write(flash, FIRM_ADDR4, sizeof(smac), smac)) {
printf("%s: %s [4]\n", __func__, mystrerr);
err++;
}
if (err == 4) {
printf("%s: %s [ALL]\n", __func__, mystrerr);
if (l == 0) {
printf("%s: failed to read factory info\n", __func__);
return -2;
}
return 0;
}
int get_arc_info(void)
{
int location = 1;
char *myerr = "ERROR: Failed to read all 4 factory info spi locations";
flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);
if (spi_flash_read(flash, FIRM_ADDR1, sizeof(smac), smac)) {
location++;
if (spi_flash_read(flash, FIRM_ADDR2, sizeof(smac), smac)) {
location++;
if (spi_flash_read(flash, FIRM_ADDR3, sizeof(smac),
smac)) {
location++;
if (spi_flash_read(flash, FIRM_ADDR4,
sizeof(smac), smac)) {
printf("%s: %s\n", __func__, myerr);
return -2;
}
}
}
}
if (smac[3][0] != 0) {
if (location > 1)
printf("Using region %d\n", location);
printf("SERIAL: ");
if (smac[3][0] == 0xFF) {
printf("\t<not found>\n");
} else {
printf("\t%s\n", smac[3]);
env_set("SERIAL", smac[3]);
}
}
if (strcmp(smac[2], "00:00:00:00:00:00") == 0)
return 0;
printf("HWADDR0:");
if (smac[2][0] == 0xFF) {
printf("\t<not found>\n");
printf("\rSERIAL: ");
if (smac[0][0] == EMPY_CHAR) {
printf("<not found>\n");
} else {
char *ret = env_get("ethaddr");
if (strcmp(ret, __stringify(CONFIG_ETHADDR)) == 0) {
env_set("ethaddr", smac[2]);
printf("\t%s (factory)\n", smac[2]);
} else {
printf("\t%s\n", ret);
}
printf("%s\n", smac[0]);
env_set("SERIAL", smac[0]);
}
if (strcmp(smac[1], "00:00:00:00:00:00") == 0) {
env_set("eth1addr", smac[2]);
env_set("eth2addr", smac[2]);
return 0;
env_set("ethaddr", NULL);
env_set("eth1addr", NULL);
env_set("eth2addr", NULL);
goto done;
}
printf("HWADDR1:");
if (smac[1][0] == 0xFF) {
printf("\t<not found>\n");
printf("HWADDR0: ");
if (smac[1][0] == EMPY_CHAR) {
printf("<not found>\n");
} else {
char *ret = env_get("ethaddr");
if (ret == NULL) {
env_set("ethaddr", smac[1]);
printf("%s\n", smac[1]);
} else if (strcmp(ret, __stringify(CONFIG_ETHADDR)) == 0) {
env_set("ethaddr", smac[1]);
printf("%s (factory)\n", smac[1]);
} else {
printf("%s\n", ret);
}
}
if (strcmp(smac[2], "00:00:00:00:00:00") == 0) {
env_set("eth1addr", NULL);
env_set("eth2addr", NULL);
goto done;
}
printf("HWADDR1: ");
if (smac[2][0] == EMPY_CHAR) {
printf("<not found>\n");
} else {
char *ret = env_get("eth1addr");
if (strcmp(ret, __stringify(CONFIG_ETH1ADDR)) == 0) {
env_set("eth1addr", smac[1]);
printf("\t%s (factory)\n", smac[1]);
if (ret == NULL) {
env_set("ethaddr", smac[2]);
printf("%s\n", smac[2]);
} else if (strcmp(ret, __stringify(CONFIG_ETH1ADDR)) == 0) {
env_set("eth1addr", smac[2]);
printf("%s (factory)\n", smac[2]);
} else {
printf("\t%s\n", ret);
printf("%s\n", ret);
}
}
if (strcmp(smac[0], "00:00:00:00:00:00") == 0) {
env_set("eth2addr", smac[1]);
return 0;
if (strcmp(smac[3], "00:00:00:00:00:00") == 0) {
env_set("eth2addr", NULL);
goto done;
}
printf("HWADDR2:");
if (smac[0][0] == 0xFF) {
printf("\t<not found>\n");
printf("HWADDR2: ");
if (smac[3][0] == EMPY_CHAR) {
printf("<not found>\n");
} else {
char *ret = env_get("eth2addr");
if (strcmp(ret, __stringify(CONFIG_ETH2ADDR)) == 0) {
env_set("eth2addr", smac[0]);
printf("\t%s (factory)\n", smac[0]);
if (ret == NULL) {
env_set("ethaddr", smac[3]);
printf("%s\n", smac[3]);
} else if (strcmp(ret, __stringify(CONFIG_ETH2ADDR)) == 0) {
env_set("eth2addr", smac[3]);
printf("%s (factory)\n", smac[3]);
} else {
printf("\t%s\n", ret);
printf("%s\n", ret);
}
}
done:
if (oldserial == NULL || oldversion == NULL) {
if (oldversion == NULL)
env_set("VERSION", U_BOOT_VERSION);
env_save();
}
return 0;
}
static int do_arc_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
static int init_fwenv(void)
{
int i, ret = -1;
fwenv_addr[0] = FWENV_ADDR1;
fwenv_addr[1] = FWENV_ADDR2;
fwenv_addr[2] = FWENV_ADDR3;
fwenv_addr[3] = FWENV_ADDR4;
for (i = 0; i < MAX_FWENV_ADDR; i++)
if (fwenv_addr[i] != -1)
ret = 0;
if (ret)
printf("%s: No firmfare info storage address is defined\n",
__func__);
return ret;
}
void get_arc_info(void)
{
if (!init_fwenv())
do_get_arc_info();
}
static int do_arc_cmd(cmd_tbl_t * cmdtp, int flag, int argc, char *const argv[])
{
const char *cmd;
int ret = -1;
@ -196,15 +383,14 @@ static int do_arc_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
--argc;
++argv;
if (strcmp(cmd, "product") == 0) {
if (init_fwenv())
return ret;
if (strcmp(cmd, "product") == 0)
ret = set_arc_product(argc, argv);
goto done;
}
if (strcmp(cmd, "info") == 0) {
ret = get_arc_info();
goto done;
}
done:
else if (strcmp(cmd, "info") == 0)
ret = do_get_arc_info();
if (ret == -1)
return CMD_RET_USAGE;

10
board/Arcturus/ucp1020/ucp1020.c
View file

@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2013-2015 Arcturus Networks, Inc.
* http://www.arcturusnetworks.com/products/ucp1020/
* Copyright 2013-2019 Arcturus Networks, Inc.
* https://www.arcturusnetworks.com/products/ucp1020/
* by Oleksandr G Zhadan et al.
* based on board/freescale/p1_p2_rdb_pc/spl.c
* original copyright follows:
@ -108,7 +108,9 @@ int checkboard(void)
{
printf("Board: %s\n", CONFIG_BOARDNAME_LOCAL);
board_gpio_init();
#ifdef CONFIG_MMC
printf("SD/MMC: 4-bit Mode\n");
#endif
return 0;
}
@ -193,7 +195,9 @@ int last_stage_init(void)
static char newkernelargs[256];
static u8 id1[16];
static u8 id2;
#ifdef CONFIG_MMC
struct mmc *mmc;
#endif
char *sval, *kval;
if (i2c_read(CONFIG_SYS_I2C_IDT6V49205B, 7, 1, &id1[0], 2) < 0) {
@ -215,6 +219,7 @@ int last_stage_init(void)
kval = env_get("kernelargs");
#ifdef CONFIG_MMC
mmc = find_mmc_device(0);
if (mmc)
if (!mmc_init(mmc)) {
@ -234,6 +239,7 @@ int last_stage_init(void)
env_set("kernelargs", mmckargs);
}
}
#endif
get_arc_info();
if (kval) {

6
board/Arcturus/ucp1020/ucp1020.h
View file

@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2013-2015 Arcturus Networks, Inc.
* http://www.arcturusnetworks.com/products/ucp1020/
* Copyright 2013-2019 Arcturus Networks, Inc.
* https://www.arcturusnetworks.com/products/ucp1020/
* by Oleksandr G Zhadan et al.
*/
@ -35,8 +35,10 @@
#define GPIO_WD GPIO15
#ifdef CONFIG_MMC
static char *defkargs = "root=/dev/mtdblock1 rootfstype=cramfs ro";
static char *mmckargs = "root=/dev/mmcblk0p1 rootwait rw";
#endif
int get_arc_info(void);

3
board/armltd/vexpress64/pcie.c
View file

@ -1,9 +1,8 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) ARM Ltd 2015
*
* Author: Liviu Dudau <Liviu.Dudau@arm.com>
*
* SPDX-Licence-Identifier: GPL-2.0+
*/
#include <common.h>

2
board/bosch/guardian/MAINTAINERS
View file

@ -1,5 +1,7 @@
Guardian BOARD
M: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
M: Govindaraji Sivanantham <Govindaraji.Sivanantham@in.bosch.com>
M: Moses Christopher Bollavarapu <BollavarapuMoses.Christopher@in.bosch.com>
S: Maintained
F: board/bosch/guardian/
F: include/configs/am335x_guardian.h

1
board/xilinx/zynqmp/MAINTAINERS
View file

@ -2,6 +2,7 @@ XILINX_ZYNQMP BOARDS
M: Michal Simek <michal.simek@xilinx.com>
S: Maintained
F: arch/arm/dts/zynqmp-*
F: arch/arm/dts/avnet-ultra96*
F: board/xilinx/zynqmp/
F: include/configs/xilinx_zynqmp*
F: configs/xilinx_zynqmp*

2
cmd/led.c
View file

@ -137,6 +137,6 @@ U_BOOT_CMD(
led, 4, 1, do_led,
"manage LEDs",
"<led_label> on|off|toggle" BLINK "\tChange LED state\n"
"led [<led_label>]\tGet LED state\n"
"led <led_label>\tGet LED state\n"
"led list\t\tshow a list of LEDs"
);

2
common/image-sig.c
View file

@ -211,7 +211,7 @@ static int fit_image_setup_verify(struct image_sign_info *info,
info->required_keynode = required_keynode;
printf("%s:%s", algo_name, info->keyname);
if (!info->checksum || !info->crypto) {
if (!info->checksum || !info->crypto || !info->padding) {
*err_msgp = "Unknown signature algorithm";
return -1;
}

1
configs/MPC8349EMDS_SDRAM_defconfig
View file

@ -112,5 +112,4 @@ CONFIG_TSEC_ENET=y
# CONFIG_PCI is not set
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_MPC8XXX_SPI=y
CONFIG_OF_LIBFDT=y

1
configs/MPC8349EMDS_defconfig
View file

@ -102,5 +102,4 @@ CONFIG_TSEC_ENET=y
# CONFIG_PCI is not set
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_MPC8XXX_SPI=y
CONFIG_OF_LIBFDT=y

21
configs/UCP1020_defconfig
View file

@ -19,12 +19,9 @@ CONFIG_AUTOBOOT_STOP_STR="\x1b"
CONFIG_CMD_IMLS=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_NAND is not set
CONFIG_CMD_MMC_SPI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_PCI is not set
# CONFIG_CMD_SATA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@ -35,26 +32,18 @@ CONFIG_CMD_CRAMFS=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_FSL_ESDHC=y
# CONFIG_SATA_SIL is not set
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_TSEC_ENET=y
# CONFIG_PCI is not set
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_FS_CRAMFS=y
CONFIG_OF_LIBFDT=y

2
configs/am335x_pdu001_defconfig
View file

@ -17,7 +17,6 @@ CONFIG_BOOTDELAY=1
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
@ -50,5 +49,6 @@ CONFIG_SPL_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_TPS65910=y
CONFIG_CONS_INDEX=4
# CONFIG_OMAP_WATCHDOG is not set
# CONFIG_USE_TINY_PRINTF is not set
# CONFIG_EFI_LOADER is not set

1
configs/apalis-imx8qm_defconfig
View file

@ -54,5 +54,4 @@ CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
CONFIG_DM_THERMAL=y
CONFIG_IMX_SCU_THERMAL=y
# CONFIG_EFI_LOADER is not set

1
configs/apalis_imx6_defconfig
View file

@ -1,7 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y

1
configs/bayleybay_defconfig
View file

@ -25,7 +25,6 @@ CONFIG_CMD_CPU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set

1
configs/cherryhill_defconfig
View file

@ -15,7 +15,6 @@ CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set

1
configs/chromebook_link64_defconfig
View file

@ -34,7 +34,6 @@ CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set

1
configs/chromebook_link_defconfig
View file

@ -25,7 +25,6 @@ CONFIG_CMD_CPU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set

1
configs/chromebook_samus_defconfig
View file

@ -28,7 +28,6 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_PART=y
CONFIG_CMD_SATA=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set

1
configs/chromebook_samus_tpl_defconfig
View file

@ -38,7 +38,6 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_PART=y
CONFIG_CMD_SATA=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set

1
configs/chromebox_panther_defconfig
View file

@ -18,7 +18,6 @@ CONFIG_HUSH_PARSER=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set

1
configs/colibri-imx6ull_defconfig
View file

@ -2,7 +2,6 @@ CONFIG_ARM=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_COLIBRI_IMX6ULL=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_DISTRO_DEFAULTS=y

3
configs/colibri-imx8qxp_defconfig
View file

@ -3,8 +3,8 @@ CONFIG_ARCH_IMX8=y
CONFIG_SYS_TEXT_BASE=0x80020000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_TARGET_COLIBRI_IMX8X=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_NR_DRAM_BANKS=3
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri-imx8x/colibri-imx8qxp-imximage.cfg"
CONFIG_LOG=y
@ -52,5 +52,4 @@ CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
CONFIG_DM_THERMAL=y
CONFIG_IMX_SCU_THERMAL=y
# CONFIG_EFI_LOADER is not set

3
configs/colibri_imx6_defconfig
View file

@ -1,7 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
@ -85,7 +84,7 @@ CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_HOST_ETHER=y
CONFIG_DM_VIDEO=y
CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_VIDEO_IPUV3=y
CONFIG_FAT_WRITE=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_WHITE_ON_BLACK=y

3
configs/colibri_imx7_defconfig
View file

@ -2,7 +2,6 @@ CONFIG_ARM=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_MX7=y
CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SECURE_BOOT=y
CONFIG_TARGET_COLIBRI_IMX7=y
CONFIG_NR_DRAM_BANKS=1
@ -66,8 +65,8 @@ CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX7=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RN5T567=y
CONFIG_DM_USB=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Toradex"

18
configs/colibri_imx7_emmc_defconfig
View file

@ -2,7 +2,6 @@ CONFIG_ARM=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_MX7=y
CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SECURE_BOOT=y
CONFIG_TARGET_COLIBRI_IMX7=y
CONFIG_TARGET_COLIBRI_IMX7_EMMC=y
@ -45,6 +44,12 @@ CONFIG_IP_DEFRAG=y
CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_FSL_CAAM=y
CONFIG_DFU_MMC=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x82000000
CONFIG_FASTBOOT_BUF_SIZE=0x10000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
@ -59,22 +64,13 @@ CONFIG_PINCTRL_IMX7=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RN5T567=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Toradex"
CONFIG_USB_GADGET_VENDOR_NUM=0x1b67
CONFIG_USB_GADGET_PRODUCT_NUM=0x4000
CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_DM_VIDEO=y
CONFIG_FAT_WRITE=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_USB=y
CONFIG_FASTBOOT=y
CONFIG_FASTBOOT_USB_DEV=0
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x82000000
CONFIG_FASTBOOT_BUF_SIZE=0x10000000

1
configs/colibri_t20_defconfig
View file

@ -67,4 +67,3 @@ CONFIG_DM_VIDEO=y
CONFIG_VIDEO_TEGRA20=y
CONFIG_CONSOLE_SCROLL_LINES=10
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_WHITE_ON_BLACK=y

1
configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
View file

@ -31,7 +31,6 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set

1
configs/conga-qeval20-qa3-e3845_defconfig
View file

@ -27,7 +27,6 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set

1
configs/cougarcanyon2_defconfig
View file

@ -18,7 +18,6 @@ CONFIG_CMD_CPU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set

1
configs/crownbay_defconfig
View file

@ -20,7 +20,6 @@ CONFIG_CMD_CPU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set

1
configs/dfi-bt700-q7x-151_defconfig
View file

@ -25,7 +25,6 @@ CONFIG_CMD_CPU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set

4
configs/dh_imx6_defconfig
View file

@ -10,8 +10,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL=y
CONFIG_SYS_BOOTCOUNT_ADDR=0x00900000
CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_AHCI=y
@ -46,6 +44,8 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6q-dhcom-pdk2"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_DWC_AHSATA=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y

1
configs/efi-x86_app_defconfig
View file

@ -14,7 +14,6 @@ CONFIG_LAST_STAGE_INIT=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_BOOTM is not set
CONFIG_CMD_PART=y
# CONFIG_CMD_SF_TEST is not set
# CONFIG_CMD_NET is not set
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y

1
configs/galileo_defconfig
View file

@ -18,7 +18,6 @@ CONFIG_CMD_CPU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set

1
configs/imx6dl_icore_nand_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_SYS_TEXT_BASE=0x17800000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_MX6Q_ENGICAM=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1

1
configs/imx6dl_mamoj_defconfig
View file

@ -1,7 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SECURE_BOOT=y
CONFIG_TARGET_MX6DL_MAMOJ=y
CONFIG_NR_DRAM_BANKS=1

1
configs/imx6q_icore_nand_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_SYS_TEXT_BASE=0x17800000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_MX6Q_ENGICAM=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1

1
configs/imx6qdl_icore_mipi_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_SYS_TEXT_BASE=0x17800000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_MX6Q_ENGICAM=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1

1
configs/imx6qdl_icore_mmc_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_SYS_TEXT_BASE=0x17800000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_MX6Q_ENGICAM=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1

1
configs/imx6qdl_icore_rqs_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_SYS_TEXT_BASE=0x17800000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_MX6Q_ENGICAM=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1

1
configs/imx6ul_geam_mmc_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_MX6UL_ENGICAM=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1

1
configs/imx6ul_isiot_emmc_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_MX6UL_ENGICAM=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1

1
configs/imx8mq_evk_defconfig
View file

@ -3,7 +3,6 @@ CONFIG_SPL_SYS_ICACHE_OFF=y
CONFIG_SPL_SYS_DCACHE_OFF=y
CONFIG_ARCH_IMX8M=y
CONFIG_SYS_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_IMX8MQ_EVK=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL=y

1
configs/imx8qm_mek_defconfig
View file

@ -6,7 +6,6 @@ CONFIG_SYS_TEXT_BASE=0x80020000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_IMX8QM_MEK=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y

4
configs/microchip_mpfs_icicle_defconfig
View file

@ -1,8 +1,8 @@
CONFIG_RISCV=y
CONFIG_TARGET_MICROCHIP_ICICLE=y
CONFIG_ARCH_RV64I=y
CONFIG_NR_CPUS=5
CONFIG_TARGET_MICROCHIP_ICICLE=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_PROMPT="RISC-V # "
CONFIG_FIT=y
CONFIG_OF_PRIOR_STAGE=y

1
configs/minnowmax_defconfig
View file

@ -31,7 +31,6 @@ CONFIG_CMD_CPU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set

3
configs/mx6sabresd_defconfig
View file

@ -82,16 +82,15 @@ CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
CONFIG_MII=y
CONFIG_PCI=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
CONFIG_PCI=y
CONFIG_DM_REGULATOR=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MXC_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
# CONFIG_SPL_DM_USB is not set
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="FSL"
CONFIG_USB_GADGET_VENDOR_NUM=0x0525

6
configs/nanopi-neo4-rk3399_defconfig
View file

@ -6,16 +6,17 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_ROCKCHIP_RK3399=y
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEBUG_UART=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-neo4.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
CONFIG_TPL=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
@ -26,7 +27,6 @@ CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-neo4"
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_TPL=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y

1
configs/novena_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_SYS_TEXT_BASE=0x17800000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_MX6_DDRCAL=y
CONFIG_TARGET_KOSAGI_NOVENA=y
CONFIG_SPL_MMC_SUPPORT=y

1
configs/opos6uldev_defconfig
View file

@ -4,7 +4,6 @@ CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_OPOS6ULDEV=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y

2
configs/p2371-2180_defconfig
View file

@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x80080000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TEGRA210=y
CONFIG_TARGET_P2371_2180=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_SYS_PROMPT="Tegra210 (P2371-2180) # "

2
configs/p2771-0000-000_defconfig
View file

@ -3,8 +3,8 @@ CONFIG_TEGRA=y
CONFIG_SYS_TEXT_BASE=0x80080000
CONFIG_NR_DRAM_BANKS=1026
CONFIG_TEGRA186=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-000) # "

2
configs/p2771-0000-500_defconfig
View file

@ -3,8 +3,8 @@ CONFIG_TEGRA=y
CONFIG_SYS_TEXT_BASE=0x80080000
CONFIG_NR_DRAM_BANKS=1026
CONFIG_TEGRA186=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-500) # "

5
configs/phycore_pcl063_ull_defconfig
View file

@ -6,10 +6,9 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_PCL063_ULL=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL=y
# CONFIG_CMD_DEKBLOB is not set
CONFIG_DISTRO_DEFAULTS=y
CONFIG_NR_DRAM_BANKS=8
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTDELAY=3

1
configs/qemu-x86_64_defconfig
View file

@ -35,7 +35,6 @@ CONFIG_CMD_CPU=y
CONFIG_CMD_BOOTEFI_SELFTEST=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_IDE=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set

1
configs/qemu-x86_defconfig
View file

@ -21,7 +21,6 @@ CONFIG_CMD_BOOTEFI_SELFTEST=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_IDE=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set

6
configs/rock-pi-4-rk3399_defconfig
View file

@ -6,16 +6,17 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_ROCKCHIP_RK3399=y
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEBUG_UART=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
CONFIG_TPL=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
@ -26,7 +27,6 @@ CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4"
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_TPL=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y

6
configs/rockpro64-rk3399_defconfig
View file

@ -6,16 +6,17 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_ROCKCHIP_RK3399=y
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEBUG_UART=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
CONFIG_TPL=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
@ -26,7 +27,6 @@ CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="rk3399-rockpro64"
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_TPL=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y

1
configs/sandbox64_defconfig
View file

@ -41,7 +41,6 @@ CONFIG_CMD_OSD=y
CONFIG_CMD_PCI=y
CONFIG_CMD_READ=y
CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_TFTPPUT=y

1
configs/sandbox_defconfig
View file

@ -44,7 +44,6 @@ CONFIG_CMD_OSD=y
CONFIG_CMD_PCI=y
CONFIG_CMD_READ=y
CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_AXI=y

1
configs/sandbox_flattree_defconfig
View file

@ -33,7 +33,6 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_OSD=y
CONFIG_CMD_PCI=y
CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_TFTPPUT=y

1
configs/sandbox_noblk_defconfig
View file

@ -37,7 +37,6 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_OSD=y
CONFIG_CMD_PCI=y
CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_TFTPPUT=y

1
configs/sandbox_spl_defconfig
View file

@ -45,7 +45,6 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_OSD=y
CONFIG_CMD_PCI=y
CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_TFTPPUT=y

1
configs/som-db5800-som-6867_defconfig
View file

@ -26,7 +26,6 @@ CONFIG_CMD_CPU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set

1
configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig
View file

@ -27,7 +27,6 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y

1
configs/theadorable-x86-conga-qa3-e3845_defconfig
View file

@ -26,7 +26,6 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y

1
configs/theadorable-x86-dfi-bt700_defconfig
View file

@ -24,7 +24,6 @@ CONFIG_CMD_CPU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y

2
configs/tinker-rk3288_defconfig
View file

@ -3,10 +3,10 @@ CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
CONFIG_SPL_SIZE_LIMIT=30720
CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_TINKER_RK3288=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_SIZE_LIMIT=30720
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000

18
configs/u200_defconfig
View file

@ -15,6 +15,8 @@ CONFIG_MISC_INIT_R=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_REGULATOR=y
CONFIG_OF_CONTROL=y
@ -27,6 +29,7 @@ CONFIG_PHY_ADDR_ENABLE=y
CONFIG_PHY_ADDR=8
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MESON_G12A_USB_PHY=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_MESON_G12A=y
CONFIG_DM_REGULATOR=y
@ -36,21 +39,16 @@ CONFIG_DEBUG_UART_MESON=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_DEBUG_UART_SKIP_INIT=y
CONFIG_MESON_SERIAL=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_USB=y
CONFIG_USB_HOST=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_PHY=y
CONFIG_MESON_G12A_USB_PHY=y
CONFIG_DM_USB=y
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_MESON_G12A=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e
CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_OF_LIBFDT_OVERLAY=y

7
disk/part.c
View file

@ -414,11 +414,10 @@ int blk_get_device_by_str(const char *ifname, const char *dev_hwpart_str,
#ifdef CONFIG_HAVE_BLOCK_DEVICE
/*
* Updates the partition table for the specified hw partition.
* Does not need to be done for hwpart 0 since it is default and
* already loaded.
* Always should be done, otherwise hw partition 0 will return stale
* data after displaying a non-zero hw partition.
*/
if(hwpart != 0)
part_init(*dev_desc);
part_init(*dev_desc);
#endif
cleanup:

5
drivers/pci/pci_auto_common.c
View file

@ -21,9 +21,10 @@ void pciauto_region_init(struct pci_region *res)
/*
* Avoid allocating PCI resources from address 0 -- this is illegal
* according to PCI 2.1 and moreover, this is known to cause Linux IDE
* drivers to fail. Use a reasonable starting value of 0x1000 instead.
* drivers to fail. Use a reasonable starting value of 0x1000 instead
* if the bus start address is below 0x1000.
*/
res->bus_lower = res->bus_start ? res->bus_start : 0x1000;
res->bus_lower = res->bus_start < 0x1000 ? 0x1000 : res->bus_start;
}
void pciauto_region_align(struct pci_region *res, pci_size_t size)

16
include/config_distro_bootcmd.h
View file

@ -229,10 +229,23 @@
#endif
#ifdef CONFIG_IDE
#define BOOTENV_SHARED_IDE BOOTENV_SHARED_BLKDEV(ide)
#define BOOTENV_RUN_IDE_INIT "run ide_init; "
#define BOOTENV_SET_IDE_NEED_INIT "setenv ide_need_init; "
#define BOOTENV_SHARED_IDE \
"ide_init=" \
"if ${ide_need_init}; then " \
"setenv ide_need_init false; " \
"ide reset; " \
"fi\0" \
\
"ide_boot=" \
BOOTENV_RUN_IDE_INIT \
BOOTENV_SHARED_BLKDEV_BODY(ide)
#define BOOTENV_DEV_IDE BOOTENV_DEV_BLKDEV
#define BOOTENV_DEV_NAME_IDE BOOTENV_DEV_NAME_BLKDEV
#else
#define BOOTENV_RUN_IDE_INIT
#define BOOTENV_SET_IDE_NEED_INIT
#define BOOTENV_SHARED_IDE
#define BOOTENV_DEV_IDE \
BOOT_TARGET_DEVICES_references_IDE_without_CONFIG_IDE
@ -451,6 +464,7 @@
\
"distro_bootcmd=" BOOTENV_SET_SCSI_NEED_INIT \
BOOTENV_SET_NVME_NEED_INIT \
BOOTENV_SET_IDE_NEED_INIT \
"for target in ${boot_targets}; do " \
"run bootcmd_${target}; " \
"done\0"

65
include/configs/UCP1020.h
View file

@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2013-2015 Arcturus Networks, Inc.
* http://www.arcturusnetworks.com/products/ucp1020/
* Copyright 2013-2019 Arcturus Networks, Inc.
* https://www.arcturusnetworks.com/products/ucp1020/
* based on include/configs/p1_p2_rdb_pc.h
* original copyright follows:
* Copyright 2009-2011 Freescale Semiconductor, Inc.
@ -13,6 +13,62 @@
#ifndef __CONFIG_H
#define __CONFIG_H
/*** Arcturus FirmWare Environment */
#define MAX_SERIAL_SIZE 15
#define MAX_HWADDR_SIZE 17
#define MAX_FWENV_ADDR 4
#define FWENV_MMC 1
#define FWENV_SPI_FLASH 2
#define FWENV_NOR_FLASH 3
/*
#define FWENV_TYPE FWENV_MMC
#define FWENV_TYPE FWENV_SPI_FLASH
*/
#define FWENV_TYPE FWENV_NOR_FLASH
#if (FWENV_TYPE == FWENV_MMC)
#ifndef CONFIG_SYS_MMC_ENV_DEV
#define CONFIG_SYS_MMC_ENV_DEV 1
#endif
#define FWENV_ADDR1 -1
#define FWENV_ADDR2 -1
#define FWENV_ADDR3 -1
#define FWENV_ADDR4 -1
#define EMPY_CHAR 0
#endif
#if (FWENV_TYPE == FWENV_SPI_FLASH)
#ifndef CONFIG_SF_DEFAULT_SPEED
#define CONFIG_SF_DEFAULT_SPEED 1000000
#endif
#ifndef CONFIG_SF_DEFAULT_MODE
#define CONFIG_SF_DEFAULT_MODE SPI_MODE0
#endif
#ifndef CONFIG_SF_DEFAULT_CS
#define CONFIG_SF_DEFAULT_CS 0
#endif
#ifndef CONFIG_SF_DEFAULT_BUS
#define CONFIG_SF_DEFAULT_BUS 0
#endif
#define FWENV_ADDR1 (0x200 - sizeof(smac))
#define FWENV_ADDR2 (0x400 - sizeof(smac))
#define FWENV_ADDR3 (CONFIG_ENV_SECT_SIZE + 0x200 - sizeof(smac))
#define FWENV_ADDR4 (CONFIG_ENV_SECT_SIZE + 0x400 - sizeof(smac))
#define EMPY_CHAR 0xff
#endif
#if (FWENV_TYPE == FWENV_NOR_FLASH)
#define FWENV_ADDR1 0xEC080000
#define FWENV_ADDR2 -1
#define FWENV_ADDR3 -1
#define FWENV_ADDR4 -1
#define EMPY_CHAR 0xff
#endif
/***********************************/
#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */
#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */
#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
@ -37,8 +93,6 @@
#define CONFIG_NETMASK 255.255.252.0
#define CONFIG_ETHPRIME "eTSEC3"
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_SYS_L2_SIZE (256 << 10)
#endif
@ -51,7 +105,6 @@
#define CONFIG_BOARDNAME_LOCAL "uCP1020-64EEE512-OU1-XR"
#define CONFIG_TSEC1
#define CONFIG_TSEC2
#define CONFIG_TSEC3
#define CONFIG_HAS_ETH0
#define CONFIG_HAS_ETH1
@ -67,7 +120,7 @@
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_ETHPRIME "eTSEC1"
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#undef CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_SYS_L2_SIZE (256 << 10)

2
lib/Makefile
View file

@ -88,7 +88,7 @@ obj-y += crc32.o
obj-$(CONFIG_CRC32C) += crc32c.o
obj-y += ctype.o
obj-y += div64.o
obj-$(CONFIG_OF_LIBFDT) += fdtdec.o
obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += fdtdec.o fdtdec_common.o
obj-y += hang.o
obj-y += linux_compat.o
obj-y += linux_string.o

26
scripts/config_whitelist.txt
View file

@ -1,6 +1,5 @@
CONFIG_16BIT
CONFIG_33
CONFIG_400MHZ_MODE
CONFIG_64BIT_PHYS_ADDR
CONFIG_66
CONFIG_8349_CLKIN
@ -238,9 +237,7 @@ CONFIG_CONS_ON_SCC
CONFIG_CONS_SCIF0
CONFIG_CONS_SCIF1
CONFIG_CONS_SCIF2
CONFIG_CONS_SCIF3
CONFIG_CONS_SCIF4
CONFIG_CONS_SCIF5
CONFIG_CONTROL
CONFIG_CONTROLCENTERD
CONFIG_CON_ROT
@ -268,9 +265,6 @@ CONFIG_CPU_PXA27X
CONFIG_CPU_PXA300
CONFIG_CPU_R8000
CONFIG_CPU_SH7722
CONFIG_CPU_SH7723
CONFIG_CPU_SH7734
CONFIG_CPU_SH7750
CONFIG_CPU_SH7751
CONFIG_CPU_SH7752
CONFIG_CPU_SH7753
@ -372,7 +366,6 @@ CONFIG_DRIVER_NE2000_BASE
CONFIG_DRIVER_NE2000_CCR
CONFIG_DRIVER_NE2000_VAL
CONFIG_DRIVER_SMC911X_BASE
CONFIG_DRIVER_TI_EMAC_RMII_NO_NEGOTIATE
CONFIG_DRIVER_TI_EMAC_USE_RMII
CONFIG_DSP_CLUSTER_START
CONFIG_DUOVERO
@ -614,8 +607,6 @@ CONFIG_FSL_LBC
CONFIG_FSL_MC9SDZ60
CONFIG_FSL_MEMAC
CONFIG_FSL_NGPIXIS
CONFIG_FSL_PCIE_DISABLE_ASPM
CONFIG_FSL_PCIE_RESET
CONFIG_FSL_PCI_INIT
CONFIG_FSL_PIXIS
CONFIG_FSL_PMIC_BITLEN
@ -685,7 +676,6 @@ CONFIG_GICV2
CONFIG_GLOBAL_DATA_NOT_REG10
CONFIG_GLOBAL_TIMER
CONFIG_GMII
CONFIG_GOOD_SESH4
CONFIG_GPCNTRL
CONFIG_GPIO_ENABLE_SPI_FLASH
CONFIG_GPIO_LED_INVERTED_TABLE
@ -923,9 +913,6 @@ CONFIG_IO_TRACE
CONFIG_IPADDR
CONFIG_IPADDR1
CONFIG_IPADDR2
CONFIG_IPAM390_GPIO_BOOTMODE
CONFIG_IPAM390_GPIO_LED_GREEN
CONFIG_IPAM390_GPIO_LED_RED
CONFIG_IPROC
CONFIG_IRAM_BASE
CONFIG_IRAM_END
@ -1072,7 +1059,6 @@ CONFIG_LCD_INFO_BELOW_LOGO
CONFIG_LCD_IN_PSRAM
CONFIG_LCD_LOGO
CONFIG_LCD_MENU
CONFIG_LCD_ROTATION
CONFIG_LD9040
CONFIG_LEGACY
CONFIG_LEGACY_BOOTCMD_ENV
@ -1135,7 +1121,6 @@ CONFIG_MACRESET_TIMEOUT
CONFIG_MALLOC_F_ADDR
CONFIG_MALTA
CONFIG_MARCO_MEMSET
CONFIG_MARUBUN_PCCARD
CONFIG_MARVELL_GPIO
CONFIG_MARVELL_MFP
CONFIG_MASK_AER_AO
@ -1601,7 +1586,6 @@ CONFIG_SATA1
CONFIG_SATA2
CONFIG_SATA_ULI5288
CONFIG_SCF0403_LCD
CONFIG_SCIF
CONFIG_SCIF_A
CONFIG_SCIF_USE_EXT_CLK
CONFIG_SCSI_AHCI_PLAT
@ -1701,7 +1685,6 @@ CONFIG_SMSTP7_ENA
CONFIG_SMSTP8_ENA
CONFIG_SMSTP9_ENA
CONFIG_SOCRATES
CONFIG_SOC_DM644X
CONFIG_SOC_K2E
CONFIG_SOC_K2G
CONFIG_SOC_K2HK
@ -1858,7 +1841,6 @@ CONFIG_STRIDER_CON_DP
CONFIG_STRIDER_CPU
CONFIG_STRIDER_CPU_DP
CONFIG_STRIDER_FANS
CONFIG_STUART
CONFIG_STV0991
CONFIG_STV0991_HZ
CONFIG_STV0991_HZ_CLOCK
@ -2135,8 +2117,6 @@ CONFIG_SYS_CSPR6
CONFIG_SYS_CSPR6_EXT
CONFIG_SYS_CSPR7
CONFIG_SYS_CSPR7_EXT
CONFIG_SYS_DA850_CS2CFG
CONFIG_SYS_DA850_CS3CFG
CONFIG_SYS_DA850_DDR2_DDRPHYCR
CONFIG_SYS_DA850_DDR2_PBBPR
CONFIG_SYS_DA850_DDR2_SDBCR
@ -3402,7 +3382,6 @@ CONFIG_SYS_NAND_MASK_CLE
CONFIG_SYS_NAND_MAX_ECCPOS
CONFIG_SYS_NAND_MAX_OOBFREE
CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES
CONFIG_SYS_NAND_NO_SUBPAGE
CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
CONFIG_SYS_NAND_ONFI_DETECTION
CONFIG_SYS_NAND_OR_PRELIM
@ -4209,9 +4188,6 @@ CONFIG_SYS_VXWORKS_MAC_PTR
CONFIG_SYS_WATCHDOG_FREQ
CONFIG_SYS_WATCHDOG_VALUE
CONFIG_SYS_WDTC_WDMR_VAL
CONFIG_SYS_WDTTIMERBASE
CONFIG_SYS_WDT_PERIOD_HIGH
CONFIG_SYS_WDT_PERIOD_LOW
CONFIG_SYS_WINDOW1_BASE
CONFIG_SYS_WRITE_SWAPPED_DATA
CONFIG_SYS_XHCI_USB1_ADDR
@ -4222,7 +4198,6 @@ CONFIG_SYS_ZYNQ_QSPI_WAIT
CONFIG_SYS_ZYNQ_SPI_WAIT
CONFIG_SYS_i2C_FSL
CONFIG_TAM3517_SETTINGS
CONFIG_TAM3517_SW3_SETTINGS
CONFIG_TCA642X
CONFIG_TEGRA_BOARD_STRING
CONFIG_TEGRA_CLOCK_SCALING
@ -4454,7 +4429,6 @@ CONFIG_X86_REFCODE_ADDR
CONFIG_X86_REFCODE_RUN_ADDR
CONFIG_XGI_XG22_BASE
CONFIG_XILINX_SPI_IDLE_VAL
CONFIG_XR16L2751
CONFIG_XSENGINE
CONFIG_XTFPGA
CONFIG_YAFFSFS_PROVIDE_VALUES