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nand_spl: store ecc data on the stack
Adapt the following patch from spl to nand_spl: Author: Stefano Babic <sbabic@denx.de> Date: Thu Dec 15 10:55:37 2011 +0100 nand_spl_simple: store ecc data on the stack Currently nand_spl_simple puts it's temp data at 0x10000 offset in SDRAM which is likely to contain already loaded data. The patch saves the oob data and the ecc on the stack replacing the fixed address in RAM. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Ilya Yanok <yanok@emcraft.com> CC: Scott Wood <scottwood@freescale.com> CC: Tom Rini <tom.rini@gmail.com> CC: Simon Schwarz <simonschwarzcor@googlemail.com> CC: Wolfgang Denk <wd@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com> While nand_spl is on its way out, in favor of spl, there are still many boards using it, and conversions are gradual. This allows us to get rid of CONFIG_SYS_NAND_ECCSTEPS and CONFIG_SYS_NAND_ECCTOTAL now, which would otherwise be likely to linger unreferenced after a conversion. It also eliminates a temporary error in the hawkboard_nand build, since the spl version of the patch removed ECCSTEPS/TOTAL from hawkboard.h, but the spl conversion is pending (and may be merged via a different tree). Signed-off-by: Scott Wood <scottwood@freescale.com>
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80519c8334
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25efd99dbb
11 changed files with 16 additions and 54 deletions
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@ -200,9 +200,7 @@
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#define CONFIG_SYS_NAND_ECCSIZE 256
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#define CONFIG_SYS_NAND_ECCBYTES 3
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#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE)
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#define CONFIG_SYS_NAND_OOBSIZE 16
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#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS_NAND_ECCSTEPS)
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#define CONFIG_SYS_NAND_ECCPOS {0, 1, 2, 3, 6, 7}
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#endif
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@ -185,9 +185,7 @@
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#define CONFIG_SYS_NAND_ECCSIZE 256
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#define CONFIG_SYS_NAND_ECCBYTES 3
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#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE)
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#define CONFIG_SYS_NAND_OOBSIZE 16
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#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS_NAND_ECCSTEPS)
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#define CONFIG_SYS_NAND_ECCPOS {0, 1, 2, 3, 6, 7}
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#ifdef CONFIG_ENV_IS_IN_NAND
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@ -179,9 +179,7 @@
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#define CONFIG_SYS_NAND_ECCSIZE 256
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#define CONFIG_SYS_NAND_ECCBYTES 3
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#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE)
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#define CONFIG_SYS_NAND_OOBSIZE 16
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#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS_NAND_ECCSTEPS)
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#define CONFIG_SYS_NAND_ECCPOS {0, 1, 2, 3, 6, 7}
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#ifdef CONFIG_ENV_IS_IN_NAND
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@ -235,9 +235,6 @@
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#define CONFIG_SYS_NAND_ECCBYTES 10
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#define CONFIG_SYS_NAND_OOBSIZE 64
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
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CONFIG_SYS_NAND_ECCSIZE)
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#define CONFIG_SYS_NAND_ECCTOTAL (40)
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/*
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* RBL searches from Block n (n = 1..24)
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@ -197,9 +197,7 @@
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#define CONFIG_SYS_NAND_ECCSIZE 256
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#define CONFIG_SYS_NAND_ECCBYTES 3
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#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE)
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#define CONFIG_SYS_NAND_OOBSIZE 64
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#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS_NAND_ECCSTEPS)
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#define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47, \
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48, 49, 50, 51, 52, 53, 54, 55, \
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56, 57, 58, 59, 60, 61, 62, 63}
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@ -210,9 +210,7 @@
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#define CONFIG_SYS_NAND_ECCSIZE 256
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#define CONFIG_SYS_NAND_ECCBYTES 3
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#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE)
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#define CONFIG_SYS_NAND_OOBSIZE 16
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#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS_NAND_ECCSTEPS)
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#define CONFIG_SYS_NAND_ECCPOS {0, 1, 2, 3, 6, 7}
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#ifdef CONFIG_ENV_IS_IN_NAND
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@ -99,10 +99,6 @@
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#define CONFIG_SYS_NAND_ECC_POS (6 * NANONOTE_NAND_SIZE)
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#define CONFIG_SYS_NAND_ECCSIZE 512
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#define CONFIG_SYS_NAND_ECCBYTES 9
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#define CONFIG_SYS_NAND_ECCSTEPS \
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(CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE)
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#define CONFIG_SYS_NAND_ECCTOTAL \
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(CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS_NAND_ECCSTEPS)
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#define CONFIG_SYS_NAND_ECCPOS \
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{12, 13, 14, 15, 16, 17, 18, 19,\
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20, 21, 22, 23, 24, 25, 26, 27, \
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@ -205,9 +205,7 @@
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#define CONFIG_SYS_NAND_ECCSIZE 256
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#define CONFIG_SYS_NAND_ECCBYTES 3
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#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE)
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#define CONFIG_SYS_NAND_OOBSIZE 16
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#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS_NAND_ECCSTEPS)
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#define CONFIG_SYS_NAND_ECCPOS {0, 1, 2, 3, 6, 7}
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#ifdef CONFIG_ENV_IS_IN_NAND
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@ -262,12 +262,8 @@
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#define CONFIG_SYS_NAND_ECCSIZE CONFIG_SYS_NAND_PAGE_SIZE
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/* Number of ECC bytes per OOB - S3C6400 calculates 4 bytes ECC in 1-bit mode */
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#define CONFIG_SYS_NAND_ECCBYTES 4
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/* Number of ECC-blocks per NAND page */
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#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE)
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/* Size of a single OOB region */
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#define CONFIG_SYS_NAND_OOBSIZE 64
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/* Number of ECC bytes per page */
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#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS_NAND_ECCSTEPS)
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/* ECC byte positions */
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#define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47, \
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48, 49, 50, 51, 52, 53, 54, 55, \
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@ -278,11 +278,6 @@
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#define CONFIG_SYS_NAND_ECCSIZE 256
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#define CONFIG_SYS_NAND_ECCBYTES 3
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#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
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CONFIG_SYS_NAND_ECCSIZE)
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#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
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CONFIG_SYS_NAND_ECCSTEPS)
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#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
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@ -24,6 +24,11 @@
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static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
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#define ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
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CONFIG_SYS_NAND_ECCSIZE)
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#define ECCTOTAL (ECCSTEPS * CONFIG_SYS_NAND_ECCBYTES)
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#if (CONFIG_SYS_NAND_PAGE_SIZE <= 512)
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/*
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* NAND command for small page NAND devices (512)
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@ -139,29 +144,21 @@ static int nand_is_bad_block(struct mtd_info *mtd, int block)
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static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst)
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{
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struct nand_chip *this = mtd->priv;
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u_char *ecc_calc;
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u_char *ecc_code;
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u_char *oob_data;
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u_char ecc_calc[ECCTOTAL];
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u_char ecc_code[ECCTOTAL];
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u_char oob_data[CONFIG_SYS_NAND_OOBSIZE];
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int i;
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int eccsize = CONFIG_SYS_NAND_ECCSIZE;
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int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
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int eccsteps = CONFIG_SYS_NAND_ECCSTEPS;
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int eccsteps = ECCSTEPS;
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uint8_t *p = dst;
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/*
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* No malloc available for now, just use some temporary locations
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* in SDRAM
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*/
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ecc_calc = (u_char *)(CONFIG_SYS_SDRAM_BASE + 0x10000);
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ecc_code = ecc_calc + 0x100;
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oob_data = ecc_calc + 0x200;
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nand_command(mtd, block, page, 0, NAND_CMD_READOOB);
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this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
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nand_command(mtd, block, page, 0, NAND_CMD_READ0);
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/* Pick the ECC bytes out of the oob data */
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for (i = 0; i < CONFIG_SYS_NAND_ECCTOTAL; i++)
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for (i = 0; i < ECCTOTAL; i++)
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ecc_code[i] = oob_data[nand_ecc_pos[i]];
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static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst)
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{
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struct nand_chip *this = mtd->priv;
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u_char *ecc_calc;
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u_char *ecc_code;
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u_char *oob_data;
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u_char ecc_calc[ECCTOTAL];
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u_char ecc_code[ECCTOTAL];
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u_char oob_data[CONFIG_SYS_NAND_OOBSIZE];
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int i;
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int eccsize = CONFIG_SYS_NAND_ECCSIZE;
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int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
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int eccsteps = CONFIG_SYS_NAND_ECCSTEPS;
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int eccsteps = ECCSTEPS;
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uint8_t *p = dst;
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nand_command(mtd, block, page, 0, NAND_CMD_READ0);
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/* No malloc available for now, just use some temporary locations
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* in SDRAM
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*/
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ecc_calc = (u_char *)(CONFIG_SYS_SDRAM_BASE + 0x10000);
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ecc_code = ecc_calc + 0x100;
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oob_data = ecc_calc + 0x200;
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for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
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this->ecc.hwctl(mtd, NAND_ECC_READ);
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this->read_buf(mtd, p, eccsize);
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this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
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/* Pick the ECC bytes out of the oob data */
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for (i = 0; i < CONFIG_SYS_NAND_ECCTOTAL; i++)
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for (i = 0; i < ECCTOTAL; i++)
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ecc_code[i] = oob_data[nand_ecc_pos[i]];
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eccsteps = CONFIG_SYS_NAND_ECCSTEPS;
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eccsteps = ECCSTEPS;
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p = dst;
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for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
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