Merge branch '2022-12-12-assorted-improvements' into next

- A number of PXE / sysboot related improvements
- Nuvoton updates
- Small updates to omap4, ARCH_OMAP2PLUS itself, mediatek
  pcie_designware.
This commit is contained in:
Tom Rini 2022-12-12 16:32:37 -05:00
commit 259420703b
23 changed files with 3161 additions and 109 deletions

View file

@ -4,6 +4,7 @@
#include <dt-bindings/clock/nuvoton,npcm845-clk.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
/ {
#address-cells = <2>;
@ -60,6 +61,70 @@
reg = <0x0 0xf0801000 0x0 0x1000>;
};
sdhci0: sdhci@f0842000 {
compatible = "nuvoton,npcm845-sdhci";
reg = <0x0 0xf0842000 0x0 0x100>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk NPCM8XX_CLK_AHB>;
clock-names = "clk_mmc";
pinctrl-names = "default";
pinctrl-0 = <&mmc8_pins
&mmc_pins>;
status = "disabled";
};
fiu0: spi@fb000000 {
compatible = "nuvoton,npcm845-fiu";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0xfb000000 0x0 0x1000>,
<0x0 0x80000000 0x0 0x10000000>;
reg-names = "control", "memory";
clocks = <&clk NPCM8XX_CLK_SPI0>;
clock-names = "clk_ahb";
status = "disabled";
};
fiu1: spi@fb002000 {
compatible = "nuvoton,npcm845-fiu";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0xfb002000 0x0 0x1000>,
<0x0 0x90000000 0x0 0x4000000>;
reg-names = "control", "memory";
clocks = <&clk NPCM8XX_CLK_SPI1>;
clock-names = "clk_spi1";
pinctrl-names = "default";
pinctrl-0 = <&spi1_pins>;
status = "disabled";
};
fiu3: spi@c0000000 {
compatible = "nuvoton,npcm845-fiu";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0xc0000000 0x0 0x1000>,
<0x0 0xA0000000 0x0 0x20000000>;
reg-names = "control", "memory";
clocks = <&clk NPCM8XX_CLK_SPI3>;
clock-names = "clk_spi3";
pinctrl-names = "default";
pinctrl-0 = <&spi3_pins>;
status = "disabled";
};
fiux: spi@fb001000 {
compatible = "nuvoton,npcm845-fiu";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0xfb001000 0x0 0x1000>,
<0x0 0xf8000000 0x0 0x2000000>;
reg-names = "control", "memory";
clocks = <&clk NPCM8XX_CLK_SPIX>;
clock-names = "clk_ahb";
status = "disabled";
};
apb {
#address-cells = <1>;
#size-cells = <1>;
@ -68,6 +133,19 @@
ranges = <0x0 0x0 0xf0000000 0x00300000>,
<0xfff00000 0x0 0xfff00000 0x00016000>;
spi1: spi@201000 {
compatible = "nuvoton,npcm845-pspi";
reg = <0x201000 0x1000>;
pinctrl-names = "default";
pinctrl-0 = <&pspi_pins>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk NPCM8XX_CLK_APB5>;
clock-names = "clk_apb5";
status = "disabled";
};
timer0: timer@8000 {
compatible = "nuvoton,npcm845-timer";
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
@ -165,6 +243,20 @@
clocks = <&clk NPCM8XX_CLK_REFCLK>;
syscon = <&gcr>;
};
i2c0: i2c@80000 {
compatible = "nuvoton,npcm845-i2c";
reg = <0x80000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clk NPCM8XX_CLK_APB2>;
clock-frequency = <100000>;
interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb0_pins>;
syscon = <&gcr>;
status = "disabled";
};
};
};
};

View file

@ -220,7 +220,7 @@
clocks = <&clk NPCM7XX_CLK_APB1>;
};
gpio_0: gpio0@10000 {
compatible = "nuvoton,npcm-gpio";
compatible = "nuvoton,npcm-gpio", "nuvoton,npcm750-gpio";
reg = <0x10000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
@ -228,7 +228,7 @@
};
gpio_1: gpio1@11000 {
compatible = "nuvoton,npcm-gpio";
compatible = "nuvoton,npcm-gpio", "nuvoton,npcm750-gpio";
reg = <0x11000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
@ -236,14 +236,14 @@
};
gpio_2: gpio2@12000 {
compatible = "nuvoton,npcm-gpio";
compatible = "nuvoton,npcm-gpio", "nuvoton,npcm750-gpio";
reg = <0x12000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
gpio-bank-name = "gpio2";
};
gpio_3: gpio3@13000 {
compatible = "nuvoton,npcm-gpio";
compatible = "nuvoton,npcm-gpio", "nuvoton,npcm750-gpio";
reg = <0x13000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
@ -251,7 +251,7 @@
};
gpio_4: gpio4@14000 {
compatible = "nuvoton,npcm-gpio";
compatible = "nuvoton,npcm-gpio", "nuvoton,npcm750-gpio";
reg = <0x14000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
@ -259,7 +259,7 @@
};
gpio_5: gpio5@15000 {
compatible = "nuvoton,npcm-gpio";
compatible = "nuvoton,npcm-gpio", "nuvoton,npcm750-gpio";
reg = <0x15000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
@ -267,14 +267,14 @@
};
gpio_6: gpio6@16000 {
compatible = "nuvoton,npcm-gpio";
compatible = "nuvoton,npcm-gpio", "nuvoton,npcm750-gpio";
reg = <0x16000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
gpio-bank-name = "gpio6";
};
gpio_7: gpio7@17000 {
compatible = "nuvoton,npcm-gpio";
compatible = "nuvoton,npcm-gpio", "nuvoton,npcm750-gpio";
reg = <0x17000 0xB0>;
#gpio-cells = <2>;
gpio-controller;

View file

@ -3,6 +3,7 @@
/dts-v1/;
#include "nuvoton-npcm845.dtsi"
#include "nuvoton-npcm845-pincfg.dtsi"
/ {
model = "Nuvoton npcm845 Development Board (Device Tree)";
@ -10,6 +11,15 @@
aliases {
serial0 = &serial0;
i2c0 = &i2c0;
spi0 = &fiu0;
spi1 = &fiu1;
spi3 = &fiu3;
spi4 = &fiux;
spi5 = &spi1;
usb0 = &udc0;
usb1 = &ehci1;
usb2 = &ehci2;
};
chosen {
@ -19,6 +29,31 @@
memory {
reg = <0x0 0x0 0x0 0x40000000>;
};
vsbr2: vsbr2 {
compatible = "regulator-npcm845";
regulator-name = "vr2";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vsbv8: vsbv8 {
compatible = "regulator-npcm845";
regulator-name = "v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vsbv5: vsbv5 {
compatible = "regulator-npcm845";
regulator-name = "v5";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
&serial0 {
@ -28,3 +63,97 @@
&watchdog1 {
status = "okay";
};
&fiu0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi0cs1_pins>;
spi-nor@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
};
spi_flash@1 {
compatible = "jedec,spi-nor";
reg = <1>;
spi-max-frequency = <25000000>;
};
};
&fiu1 {
status = "okay";
spi-nor@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
};
};
&fiu3 {
pinctrl-0 = <&spi3_pins>, <&spi3quad_pins>;
status = "okay";
vqspi-supply = <&vsbv5>;
vqspi-microvolt = <3300000>;
spi-nor@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
};
};
&fiux {
nuvoton,spix-mode;
status = "okay";
};
&spi1 {
status = "okay";
};
&usbphy1 {
status = "okay";
};
&usbphy2 {
status = "okay";
};
&usbphy3 {
status = "okay";
};
&udc0 {
status = "okay";
phys = <&usbphy1 0>;
};
&sdhci0 {
bus-width = <0x8>;
status = "okay";
};
&ehci1 {
status = "okay";
phys = <&usbphy2 3>;
};
&ehci2 {
status = "okay";
phys = <&usbphy3 4>;
};
&i2c0 {
status = "okay";
};
&pinctrl {
pinctrl-names = "default";
pinctrl-0 = <
&gspi_pins
&vgadig_pins
&spix_pins
&r1_pins
&r1en_pins
&r1oen_pins
>;
};

File diff suppressed because it is too large Load diff

View file

@ -59,6 +59,174 @@
clocks = <&clk_refclk>;
};
ehci1: usb@f0828100 {
compatible = "nuvoton,npcm845-ehci";
reg = <0x0 0xf0828100 0x0 0x1000>;
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
resets = <&rstc2 NPCM8XX_RESET_USBH1>;
status = "disabled";
};
ehci2: usb@f082a100 {
compatible = "nuvoton,npcm845-ehci";
reg = <0x0 0xf082a100 0x0 0x1000>;
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
resets = <&rstc4 NPCM8XX_RESET_USBH2>;
status = "disabled";
};
ohci1: usb@f0829000 {
compatible = "nuvoton,npcm845-ohci";
reg = <0x0 0xF0829000 0x0 0x1000>;
resets = <&rstc2 NPCM8XX_RESET_USBH1>;
status = "disabled";
};
ohci2: usb@f082b000 {
compatible = "nuvoton,npcm845-ohci";
reg = <0x0 0xF082B000 0x0 0x1000>;
resets = <&rstc4 NPCM8XX_RESET_USBH2>;
status = "disabled";
};
usbphy {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
syscon = <&gcr>;
usbphy1: usbphy@1 {
compatible = "nuvoton,npcm845-usb-phy";
#phy-cells = <1>;
reg = <1>;
resets = <&rstc3 NPCM8XX_RESET_USBPHY1>;
status = "disabled";
};
usbphy2: usbphy@2 {
compatible = "nuvoton,npcm845-usb-phy";
#phy-cells = <1>;
reg = <2>;
resets = <&rstc3 NPCM8XX_RESET_USBPHY2>;
status = "disabled";
};
usbphy3: usbphy@3 {
compatible = "nuvoton,npcm845-usb-phy";
#phy-cells = <1>;
reg = <3>;
resets = <&rstc3 NPCM8XX_RESET_USBPHY3>;
status = "disabled";
};
};
udc0:udc@f0830100 {
compatible = "nuvoton,npcm845-udc";
reg = <0x0 0xf0830100 0x0 0x100
0x0 0xfffb0000 0x0 0x800>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk NPCM8XX_CLK_SU>;
clock-names = "clk_usb_bridge";
resets = <&rstc3 NPCM8XX_RESET_UDC0>;
status = "disable";
};
udc1:udc@f0831100 {
compatible = "nuvoton,npcm845-udc";
reg = <0x0 0xf0831100 0x0 0x100
0x0 0xfffb0800 0x0 0x800>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk NPCM8XX_CLK_SU>;
clock-names = "clk_usb_bridge";
resets = <&rstc1 NPCM8XX_RESET_UDC1>;
status = "disable";
};
udc2:udc@f0832100 {
compatible = "nuvoton,npcm845-udc";
reg = <0x0 0xf0832100 0x0 0x100
0x0 0xfffb1000 0x0 0x800>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk NPCM8XX_CLK_SU>;
clock-names = "clk_usb_bridge";
resets = <&rstc1 NPCM8XX_RESET_UDC2>;
status = "disable";
};
udc3:udc@f0833100 {
compatible = "nuvoton,npcm845-udc";
reg = <0x0 0xf0833100 0x0 0x100
0x0 0xfffb1800 0x0 0x800>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk NPCM8XX_CLK_SU>;
clock-names = "clk_usb_bridge";
resets = <&rstc1 NPCM8XX_RESET_UDC3>;
status = "disable";
};
udc4:udc@f0834100 {
compatible = "nuvoton,npcm845-udc";
reg = <0x0 0xf0834100 0x0 0x100
0x0 0xfffb2000 0x0 0x800>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk NPCM8XX_CLK_SU>;
clock-names = "clk_usb_bridge";
resets = <&rstc1 NPCM8XX_RESET_UDC4>;
status = "disable";
};
udc5:udc@f0835100 {
compatible = "nuvoton,npcm845-udc";
reg = <0x0 0xf0835100 0x0 0x100
0x0 0xfffb2800 0x0 0x800>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk NPCM8XX_CLK_SU>;
clock-names = "clk_usb_bridge";
resets = <&rstc1 NPCM8XX_RESET_UDC5>;
status = "disable";
};
udc6:udc@f0836100 {
compatible = "nuvoton,npcm845-udc";
reg = <0x0 0xf0836100 0x0 0x100
0x0 0xfffb3000 0x0 0x800>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk NPCM8XX_CLK_SU>;
clock-names = "clk_usb_bridge";
resets = <&rstc1 NPCM8XX_RESET_UDC6>;
status = "disable";
};
udc7:udc@f0837100 {
compatible = "nuvoton,npcm845-udc";
reg = <0x0 0xf0837100 0x0 0x100
0x0 0xfffb3800 0x0 0x800>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk NPCM8XX_CLK_SU>;
clock-names = "clk_usb_bridge";
resets = <&rstc3 NPCM8XX_RESET_UDC7>;
status = "disable";
};
udc8:udc@f0838100 {
compatible = "nuvoton,npcm845-udc";
reg = <0x0 0xf0838100 0x0 0x100
0x0 0xfffb4000 0x0 0x800>;
interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk NPCM8XX_CLK_SU>;
clock-names = "clk_usb_bridge";
resets = <&rstc3 NPCM8XX_RESET_UDC8>;
status = "disable";
};
udc9:udc@f0839100 {
compatible = "nuvoton,npcm845-udc";
reg = <0x0 0xf0839100 0x0 0x100
0x0 0xfffb4800 0x0 0x800>;
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk NPCM8XX_CLK_SU>;
clock-names = "clk_usb_bridge";
resets = <&rstc3 NPCM8XX_RESET_UDC9>;
status = "disable";
};
apb {
serial0: serial@0 {
compatible = "nuvoton,npcm845-uart";
@ -69,7 +237,7 @@
};
gpio0: gpio0@10000 {
compatible = "nuvoton,npcm-gpio";
compatible = "nuvoton,npcm-gpio", "nuvoton,npcm845-gpio";
reg = <0x10000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
@ -77,7 +245,7 @@
};
gpio1: gpio1@11000 {
compatible = "nuvoton,npcm-gpio";
compatible = "nuvoton,npcm-gpio", "nuvoton,npcm845-gpio";
reg = <0x11000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
@ -85,7 +253,7 @@
};
gpio2: gpio2@12000 {
compatible = "nuvoton,npcm-gpio";
compatible = "nuvoton,npcm-gpio", "nuvoton,npcm845-gpio";
reg = <0x12000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
@ -93,7 +261,7 @@
};
gpio3: gpio3@13000 {
compatible = "nuvoton,npcm-gpio";
compatible = "nuvoton,npcm-gpio", "nuvoton,npcm845-gpio";
reg = <0x13000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
@ -101,7 +269,7 @@
};
gpio4: gpio4@14000 {
compatible = "nuvoton,npcm-gpio";
compatible = "nuvoton,npcm-gpio", "nuvoton,npcm845-gpio";
reg = <0x14000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
@ -109,7 +277,7 @@
};
gpio5: gpio5@15000 {
compatible = "nuvoton,npcm-gpio";
compatible = "nuvoton,npcm-gpio", "nuvoton,npcm845-gpio";
reg = <0x15000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
@ -117,7 +285,7 @@
};
gpio6: gpio6@16000 {
compatible = "nuvoton,npcm-gpio";
compatible = "nuvoton,npcm-gpio", "nuvoton,npcm845-gpio";
reg = <0x16000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
@ -125,7 +293,7 @@
};
gpio7: gpio7@17000 {
compatible = "nuvoton,npcm-gpio";
compatible = "nuvoton,npcm-gpio", "nuvoton,npcm845-gpio";
reg = <0x17000 0xB0>;
#gpio-cells = <2>;
gpio-controller;
@ -133,4 +301,652 @@
};
};
};
pinctrl: pinctrl@f0800000 {
compatible = "nuvoton,npcm845-pinctrl", "syscon", "simple-mfd";
reg = <0x0 0xf0010000 0x0 0x8000>;
syscon-gcr = <&gcr>;
syscon-rst = <&rstc>;
status = "okay";
iox1_pins: iox1-pins {
groups = "iox1";
function = "iox1";
};
iox2_pins: iox2-pins {
groups = "iox2";
function = "iox2";
};
smb1d_pins: smb1d-pins {
groups = "smb1d";
function = "smb1d";
};
smb2d_pins: smb2d-pins {
groups = "smb2d";
function = "smb2d";
};
lkgpo1_pins: lkgpo1-pins {
groups = "lkgpo1";
function = "lkgpo1";
};
lkgpo2_pins: lkgpo2-pins {
groups = "lkgpo2";
function = "lkgpo2";
};
ioxh_pins: ioxh-pins {
groups = "ioxh";
function = "ioxh";
};
gspi_pins: gspi-pins {
groups = "gspi";
function = "gspi";
};
smb5b_pins: smb5b-pins {
groups = "smb5b";
function = "smb5b";
};
smb5c_pins: smb5c-pins {
groups = "smb5c";
function = "smb5c";
};
lkgpo0_pins: lkgpo0-pins {
groups = "lkgpo0";
function = "lkgpo0";
};
pspi_pins: pspi-pins {
groups = "pspi";
function = "pspi";
};
vgadig_pins: vgadig-pins {
groups = "vgadig";
function = "vgadig";
};
jm1_pins: jm1-pins {
groups = "jm1";
function = "jm1";
};
jm2_pins: jm2-pins {
groups = "jm2";
function = "jm2";
};
smb4b_pins: smb4b-pins {
groups = "smb4b";
function = "smb4b";
};
smb4c_pins: smb4c-pins {
groups = "smb4c";
function = "smb4c";
};
smb15_pins: smb15-pins {
groups = "smb15";
function = "smb15";
};
smb16_pins: smb16-pins {
groups = "smb16";
function = "smb16";
};
smb17_pins: smb17-pins {
groups = "smb17";
function = "smb17";
};
smb18_pins: smb18-pins {
groups = "smb18";
function = "smb18";
};
smb19_pins: smb19-pins {
groups = "smb19";
function = "smb19";
};
smb20_pins: smb20-pins {
groups = "smb20";
function = "smb20";
};
smb21_pins: smb21-pins {
groups = "smb21";
function = "smb21";
};
smb22_pins: smb22-pins {
groups = "smb22";
function = "smb22";
};
smb23_pins: smb23-pins {
groups = "smb23";
function = "smb23";
};
smb4d_pins: smb4d-pins {
groups = "smb4d";
function = "smb4d";
};
smb14_pins: smb14-pins {
groups = "smb14";
function = "smb14";
};
smb5_pins: smb5-pins {
groups = "smb5";
function = "smb5";
};
smb4_pins: smb4-pins {
groups = "smb4";
function = "smb4";
};
smb3_pins: smb3-pins {
groups = "smb3";
function = "smb3";
};
spi0cs1_pins: spi0cs1-pins {
groups = "spi0cs1";
function = "spi0cs1";
};
spi0cs2_pins: spi0cs2-pins {
groups = "spi0cs2";
function = "spi0cs2";
};
spi0cs3_pins: spi0cs3-pins {
groups = "spi0cs3";
function = "spi0cs3";
};
smb3c_pins: smb3c-pins {
groups = "smb3c";
function = "smb3c";
};
smb3b_pins: smb3b-pins {
groups = "smb3b";
function = "smb3b";
};
hsi1a_pins: hsi1a-pins {
groups = "hsi1a";
function = "hsi1a";
};
hsi1b_pins: hsi1b-pins {
groups = "hsi1b";
function = "hsi1b";
};
hsi1c_pins: hsi1c-pins {
groups = "hsi1c";
function = "hsi1c";
};
hsi2a_pins: hsi2a-pins {
groups = "hsi2a";
function = "hsi2a";
};
hsi2b_pins: hsi2b-pins {
groups = "hsi2b";
function = "hsi2b";
};
hsi2c_pins: hsi2c-pins {
groups = "hsi2c";
function = "hsi2c";
};
bmcuart0a_pins: bmcuart0a-pins {
groups = "bmcuart0a";
function = "bmcuart0a";
};
bmcuart0b_pins: bmcuart0b-pins {
groups = "bmcuart0b";
function = "bmcuart0b";
};
bmcuart1_pins: bmcuart1-pins {
groups = "bmcuart1";
function = "bmcuart1";
};
bu4_pins: bu4-pins {
groups = "bu4";
function = "bu4";
};
bu5_pins: bu5-pins {
groups = "bu5";
function = "bu5";
};
bu6_pins: bu6-pins {
groups = "bu6";
function = "bu6";
};
r1err_pins: r1err-pins {
groups = "r1err";
function = "r1err";
};
r1md_pins: r1md-pins {
groups = "r1md";
function = "r1md";
};
r1oen_pins: r1oen-pins {
groups = "r1oen";
function = "r1oen";
};
r1en_pins: r1en-pins {
groups = "r1en";
function = "r1en";
};
r2oen_pins: r2oen-pins {
groups = "r2oen";
function = "r2oen";
};
r2en_pins: r2en-pins {
groups = "r2en";
function = "r2en";
};
rmii3_pins: rmii3_pins {
groups = "rmii3";
function = "rmii3";
};
r3oen_pins: r3oen-pins {
groups = "r3oen";
function = "r3oen";
};
r3en_pins: r3en-pins {
groups = "r3en";
function = "r3en";
};
smb3d_pins: smb3d-pins {
groups = "smb3d";
function = "smb3d";
};
fanin0_pins: fanin0-pins {
groups = "fanin0";
function = "fanin0";
};
fanin1_pins: fanin1-pins {
groups = "fanin1";
function = "fanin1";
};
fanin2_pins: fanin2-pins {
groups = "fanin2";
function = "fanin2";
};
fanin3_pins: fanin3-pins {
groups = "fanin3";
function = "fanin3";
};
fanin4_pins: fanin4-pins {
groups = "fanin4";
function = "fanin4";
};
fanin5_pins: fanin5-pins {
groups = "fanin5";
function = "fanin5";
};
fanin6_pins: fanin6-pins {
groups = "fanin6";
function = "fanin6";
};
fanin7_pins: fanin7-pins {
groups = "fanin7";
function = "fanin7";
};
fanin8_pins: fanin8-pins {
groups = "fanin8";
function = "fanin8";
};
fanin9_pins: fanin9-pins {
groups = "fanin9";
function = "fanin9";
};
fanin10_pins: fanin10-pins {
groups = "fanin10";
function = "fanin10";
};
fanin11_pins: fanin11-pins {
groups = "fanin11";
function = "fanin11";
};
fanin12_pins: fanin12-pins {
groups = "fanin12";
function = "fanin12";
};
fanin13_pins: fanin13-pins {
groups = "fanin13";
function = "fanin13";
};
fanin14_pins: fanin14-pins {
groups = "fanin14";
function = "fanin14";
};
fanin15_pins: fanin15-pins {
groups = "fanin15";
function = "fanin15";
};
pwm0_pins: pwm0-pins {
groups = "pwm0";
function = "pwm0";
};
pwm1_pins: pwm1-pins {
groups = "pwm1";
function = "pwm1";
};
pwm2_pins: pwm2-pins {
groups = "pwm2";
function = "pwm2";
};
pwm3_pins: pwm3-pins {
groups = "pwm3";
function = "pwm3";
};
r2_pins: r2-pins {
groups = "r2";
function = "r2";
};
r2err_pins: r2err-pins {
groups = "r2err";
function = "r2err";
};
r2md_pins: r2md-pins {
groups = "r2md";
function = "r2md";
};
r3rxer_pins: r3rxer_pins {
groups = "r3rxer";
function = "r3rxer";
};
ga20kbc_pins: ga20kbc-pins {
groups = "ga20kbc";
function = "ga20kbc";
};
smb5d_pins: smb5d-pins {
groups = "smb5d";
function = "smb5d";
};
lpc_pins: lpc-pins {
groups = "lpc";
function = "lpc";
};
espi_pins: espi-pins {
groups = "espi";
function = "espi";
};
rg1_pins: rg1-pins {
groups = "rg1";
function = "rg1";
};
rg1mdio_pins: rg1mdio-pins {
groups = "rg1mdio";
function = "rg1mdio";
};
rg2_pins: rg2-pins {
groups = "rg2";
function = "rg2";
};
ddr_pins: ddr-pins {
groups = "ddr";
function = "ddr";
};
i3c0_pins: i3c0-pins {
groups = "i3c0";
function = "i3c0";
};
i3c1_pins: i3c1-pins {
groups = "i3c1";
function = "i3c1";
};
i3c2_pins: i3c2-pins {
groups = "i3c2";
function = "i3c2";
};
i3c3_pins: i3c3-pins {
groups = "i3c3";
function = "i3c3";
};
i3c4_pins: i3c4-pins {
groups = "i3c4";
function = "i3c4";
};
i3c5_pins: i3c5-pins {
groups = "i3c5";
function = "i3c5";
};
smb0_pins: smb0-pins {
groups = "smb0";
function = "smb0";
};
smb1_pins: smb1-pins {
groups = "smb1";
function = "smb1";
};
smb2_pins: smb2-pins {
groups = "smb2";
function = "smb2";
};
smb2c_pins: smb2c-pins {
groups = "smb2c";
function = "smb2c";
};
smb2b_pins: smb2b-pins {
groups = "smb2b";
function = "smb2b";
};
smb1c_pins: smb1c-pins {
groups = "smb1c";
function = "smb1c";
};
smb1b_pins: smb1b-pins {
groups = "smb1b";
function = "smb1b";
};
smb8_pins: smb8-pins {
groups = "smb8";
function = "smb8";
};
smb9_pins: smb9-pins {
groups = "smb9";
function = "smb9";
};
smb10_pins: smb10-pins {
groups = "smb10";
function = "smb10";
};
smb11_pins: smb11-pins {
groups = "smb11";
function = "smb11";
};
sd1_pins: sd1-pins {
groups = "sd1";
function = "sd1";
};
sd1pwr_pins: sd1pwr-pins {
groups = "sd1pwr";
function = "sd1pwr";
};
pwm4_pins: pwm4-pins {
groups = "pwm4";
function = "pwm4";
};
pwm5_pins: pwm5-pins {
groups = "pwm5";
function = "pwm5";
};
pwm6_pins: pwm6-pins {
groups = "pwm6";
function = "pwm6";
};
pwm7_pins: pwm7-pins {
groups = "pwm7";
function = "pwm7";
};
pwm8_pins: pwm8-pins {
groups = "pwm8";
function = "pwm8";
};
pwm9_pins: pwm9-pins {
groups = "pwm9";
function = "pwm9";
};
pwm10_pins: pwm10-pins {
groups = "pwm10";
function = "pwm10";
};
pwm11_pins: pwm11-pins {
groups = "pwm11";
function = "pwm11";
};
mmc8_pins: mmc8-pins {
groups = "mmc8";
function = "mmc8";
};
mmc_pins: mmc-pins {
groups = "mmc";
function = "mmc";
};
mmcwp_pins: mmcwp-pins {
groups = "mmcwp";
function = "mmcwp";
};
mmccd_pins: mmccd-pins {
groups = "mmccd";
function = "mmccd";
};
mmcrst_pins: mmcrst-pins {
groups = "mmcrst";
function = "mmcrst";
};
clkout_pins: clkout-pins {
groups = "clkout";
function = "clkout";
};
serirq_pins: serirq-pins {
groups = "serirq";
function = "serirq";
};
scipme_pins: scipme-pins {
groups = "scipme";
function = "scipme";
};
sci_pins: sci-pins {
groups = "sci";
function = "sci";
};
smb6_pins: smb6-pins {
groups = "smb6";
function = "smb6";
};
smb7_pins: smb7-pins {
groups = "smb7";
function = "smb7";
};
spi1_pins: spi1-pins {
groups = "spi1";
function = "spi1";
};
spi1d23_pins: spi1d23-pins {
groups = "spi1d23";
function = "spi1d23";
};
faninx_pins: faninx-pins {
groups = "faninx";
function = "faninx";
};
r1_pins: r1-pins {
groups = "r1";
function = "r1";
};
spi3_pins: spi3-pins {
groups = "spi3";
function = "spi3";
};
spi3cs1_pins: spi3cs1-pins {
groups = "spi3cs1";
function = "spi3cs1";
};
spi3quad_pins: spi3quad-pins {
groups = "spi3quad";
function = "spi3quad";
};
spi3cs2_pins: spi3cs2-pins {
groups = "spi3cs2";
function = "spi3cs2";
};
spi3cs3_pins: spi3cs3-pins {
groups = "spi3cs3";
function = "spi3cs3";
};
nprd_smi_pins: nprd-smi-pins {
groups = "nprd_smi";
function = "nprd_smi";
};
smb0b_pins: smb0b-pins {
groups = "smb0b";
function = "smb0b";
};
smb0c_pins: smb0c-pins {
groups = "smb0c";
function = "smb0c";
};
smb0den_pins: smb0den-pins {
groups = "smb0den";
function = "smb0den";
};
smb0d_pins: smb0d-pins {
groups = "smb0d";
function = "smb0d";
};
rg2mdio_pins: rg2mdio-pins {
groups = "rg2mdio";
function = "rg2mdio";
};
rg2refck_pins: rg2refck-pins {
groups = "rg2refck";
function = "rg2refck";
};
wdog1_pins: wdog1-pins {
groups = "wdog1";
function = "wdog1";
};
wdog2_pins: wdog2-pins {
groups = "wdog2";
function = "wdog2";
};
smb12_pins: smb12-pins {
groups = "smb12";
function = "smb12";
};
smb13_pins: smb13-pins {
groups = "smb13";
function = "smb13";
};
spix_pins: spix-pins {
groups = "spix";
function = "spix";
};
spixcs1_pins: spixcs1-pins {
groups = "spixcs1";
function = "spixcs1";
};
clkreq_pins: clkreq-pins {
groups = "clkreq";
function = "clkreq";
};
hgpio0_pins: hgpio0-pins {
groups = "hgpio0";
function = "hgpio0";
};
hgpio1_pins: hgpio1-pins {
groups = "hgpio1";
function = "hgpio1";
};
hgpio2_pins: hgpio2-pins {
groups = "hgpio2";
function = "hgpio2";
};
hgpio3_pins: hgpio3-pins {
groups = "hgpio3";
function = "hgpio3";
};
hgpio4_pins: hgpio4-pins {
groups = "hgpio4";
function = "hgpio4";
};
hgpio5_pins: hgpio5-pins {
groups = "hgpio5";
function = "hgpio5";
};
hgpio6_pins: hgpio6-pins {
groups = "hgpio6";
function = "hgpio6";
};
hgpio7_pins: hgpio7-pins {
groups = "hgpio7";
function = "hgpio7";
};
jtag2_pins: jtag2-pins {
groups = "jtag2";
function = "jtag2";
};
};
};

View file

@ -17,6 +17,14 @@
compatible = "simple-bus";
};
};
segment@80000 {
/* USB OTG */
target-module@2b000 {
compatible = "simple-bus";
};
};
};
&l4_per {

View file

@ -15,6 +15,7 @@
#include <spl.h>
#include <asm/global_data.h>
#include <asm/omap_common.h>
#include <asm/omap_sec_common.h>
#include <asm/arch/omap.h>
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/sys_proto.h>
@ -22,6 +23,7 @@
#include <scsi.h>
#include <i2c.h>
#include <remoteproc.h>
#include <image.h>
DECLARE_GLOBAL_DATA_PTR;
@ -331,3 +333,17 @@ void arch_preboot_os(void)
ahci_reset((void __iomem *)DWC_AHSATA_BASE);
}
#endif
#ifdef CONFIG_TI_SECURE_DEVICE
void board_fit_image_post_process(const void *fit, int node, void **p_image,
size_t *p_size)
{
secure_boot_verify_image(p_image, p_size);
}
static void tee_image_process(ulong tee_image, size_t tee_size)
{
secure_tee_install((u32)tee_image);
}
U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_TEE, tee_image_process);
#endif

View file

@ -33,7 +33,6 @@
#include <asm/emif.h>
#include <asm/gpio.h>
#include <asm/omap_common.h>
#include <asm/omap_sec_common.h>
#include <asm/omap_mmc.h>
#include <i2c.h>
#include <miiphy.h>
@ -983,14 +982,6 @@ int board_fit_config_name_match(const char *name)
}
#endif
#ifdef CONFIG_TI_SECURE_DEVICE
void board_fit_image_post_process(const void *fit, int node, void **p_image,
size_t *p_size)
{
secure_boot_verify_image(p_image, p_size);
}
#endif
#if !CONFIG_IS_ENABLED(OF_CONTROL)
static const struct omap_hsmmc_plat am335x_mmc0_plat = {
.base_addr = (struct hsmmc *)OMAP_HSMMC1_BASE,

View file

@ -9,7 +9,6 @@
#include <common.h>
#include <eeprom.h>
#include <image.h>
#include <asm/global_data.h>
#include <dm/uclass.h>
#include <env.h>
@ -20,7 +19,6 @@
#include <linux/errno.h>
#include <spl.h>
#include <usb.h>
#include <asm/omap_sec_common.h>
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/mux.h>
@ -867,18 +865,3 @@ int embedded_dtb_select(void)
return 0;
}
#endif
#ifdef CONFIG_TI_SECURE_DEVICE
void board_fit_image_post_process(const void *fit, int node, void **p_image,
size_t *p_size)
{
secure_boot_verify_image(p_image, p_size);
}
void board_tee_image_process(ulong tee_image, size_t tee_size)
{
secure_tee_install((u32)tee_image);
}
U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_TEE, board_tee_image_process);
#endif

View file

@ -11,7 +11,6 @@
#include <env.h>
#include <fastboot.h>
#include <fdt_support.h>
#include <image.h>
#include <init.h>
#include <malloc.h>
#include <net.h>
@ -22,7 +21,6 @@
#include <errno.h>
#include <asm/global_data.h>
#include <asm/omap_common.h>
#include <asm/omap_sec_common.h>
#include <asm/emif.h>
#include <asm/gpio.h>
#include <asm/arch/gpio.h>
@ -1197,18 +1195,3 @@ static int board_bootmode_has_emmc(void)
return 0;
}
#endif
#ifdef CONFIG_TI_SECURE_DEVICE
void board_fit_image_post_process(const void *fit, int node, void **p_image,
size_t *p_size)
{
secure_boot_verify_image(p_image, p_size);
}
void board_tee_image_process(ulong tee_image, size_t tee_size)
{
secure_tee_install((u32)tee_image);
}
U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_TEE, board_tee_image_process);
#endif

View file

@ -13,7 +13,6 @@
#include <env.h>
#include <fdt_support.h>
#include <fastboot.h>
#include <image.h>
#include <init.h>
#include <spl.h>
#include <net.h>
@ -26,7 +25,6 @@
#include <usb.h>
#include <linux/usb/gadget.h>
#include <asm/omap_common.h>
#include <asm/omap_sec_common.h>
#include <asm/arch/gpio.h>
#include <asm/arch/dra7xx_iodelay.h>
#include <asm/emif.h>
@ -1063,18 +1061,3 @@ int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason)
return 0;
}
#endif
#ifdef CONFIG_TI_SECURE_DEVICE
void board_fit_image_post_process(const void *fit, int node, void **p_image,
size_t *p_size)
{
secure_boot_verify_image(p_image, p_size);
}
void board_tee_image_process(ulong tee_image, size_t tee_size)
{
secure_tee_install((u32)tee_image);
}
U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_TEE, board_tee_image_process);
#endif

View file

@ -258,6 +258,7 @@ static struct pxe_label *label_create(void)
static void label_destroy(struct pxe_label *label)
{
free(label->name);
free(label->kernel_label);
free(label->kernel);
free(label->config);
free(label->append);
@ -521,28 +522,44 @@ static int label_boot(struct pxe_context *ctx, struct pxe_label *label)
return 1;
}
if (label->initrd) {
ulong size;
if (get_relfile_envaddr(ctx, label->kernel, "kernel_addr_r",
NULL) < 0) {
printf("Skipping %s for failure retrieving kernel\n",
label->name);
return 1;
}
kernel_addr = env_get("kernel_addr_r");
/* for FIT, append the configuration identifier */
if (label->config) {
int len = strlen(kernel_addr) + strlen(label->config) + 1;
fit_addr = malloc(len);
if (!fit_addr) {
printf("malloc fail (FIT address)\n");
return 1;
}
snprintf(fit_addr, len, "%s%s", kernel_addr, label->config);
kernel_addr = fit_addr;
}
/* For FIT, the label can be identical to kernel one */
if (label->initrd && !strcmp(label->kernel_label, label->initrd)) {
initrd_addr_str = kernel_addr;
} else if (label->initrd) {
ulong size;
if (get_relfile_envaddr(ctx, label->initrd, "ramdisk_addr_r",
&size) < 0) {
printf("Skipping %s for failure retrieving initrd\n",
label->name);
return 1;
goto cleanup;
}
initrd_addr_str = env_get("ramdisk_addr_r");
size = snprintf(initrd_str, sizeof(initrd_str), "%s:%lx",
initrd_addr_str, size);
if (size >= sizeof(initrd_str))
return 1;
}
if (get_relfile_envaddr(ctx, label->kernel, "kernel_addr_r",
NULL) < 0) {
printf("Skipping %s for failure retrieving kernel\n",
label->name);
return 1;
goto cleanup;
}
if (label->ipappend & 0x1) {
@ -572,7 +589,7 @@ static int label_boot(struct pxe_context *ctx, struct pxe_label *label)
strlen(label->append ?: ""),
strlen(ip_str), strlen(mac_str),
sizeof(bootargs));
return 1;
goto cleanup;
}
if (label->append)
@ -587,21 +604,6 @@ static int label_boot(struct pxe_context *ctx, struct pxe_label *label)
printf("append: %s\n", finalbootargs);
}
kernel_addr = env_get("kernel_addr_r");
/* for FIT, append the configuration identifier */
if (label->config) {
int len = strlen(kernel_addr) + strlen(label->config) + 1;
fit_addr = malloc(len);
if (!fit_addr) {
printf("malloc fail (FIT address)\n");
return 1;
}
snprintf(fit_addr, len, "%s%s", kernel_addr, label->config);
kernel_addr = fit_addr;
}
/*
* fdt usage is optional:
* It handles the following scenarios.
@ -623,8 +625,11 @@ static int label_boot(struct pxe_context *ctx, struct pxe_label *label)
*/
bootm_argv[3] = env_get("fdt_addr_r");
/* For FIT, the label can be identical to kernel one */
if (label->fdt && !strcmp(label->kernel_label, label->fdt)) {
bootm_argv[3] = kernel_addr;
/* if fdt label is defined then get fdt from server */
if (bootm_argv[3]) {
} else if (bootm_argv[3]) {
char *fdtfile = NULL;
char *fdtfilefree = NULL;
@ -1165,15 +1170,19 @@ static int parse_label_kernel(char **c, struct pxe_label *label)
if (err < 0)
return err;
/* copy the kernel label to compare with FDT / INITRD when FIT is used */
label->kernel_label = strdup(label->kernel);
if (!label->kernel_label)
return -ENOMEM;
s = strstr(label->kernel, "#");
if (!s)
return 1;
label->config = malloc(strlen(s) + 1);
label->config = strdup(s);
if (!label->config)
return -ENOMEM;
strcpy(label->config, s);
*s = 0;
return 1;
@ -1359,6 +1368,9 @@ static int parse_pxefile_top(struct pxe_context *ctx, char *p, unsigned long bas
break;
case T_PROMPT:
err = parse_integer(&p, &cfg->prompt);
// Do not fail if prompt configuration is undefined
if (err < 0)
eol_or_eof(&p);
break;

View file

@ -4,7 +4,7 @@ CONFIG_SYS_MALLOC_LEN=0x240000
CONFIG_SYS_MALLOC_F_LEN=0x1000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0x1C0000
CONFIG_ENV_OFFSET=0x3C0000
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="nuvoton-npcm845-evb"
@ -13,7 +13,7 @@ CONFIG_SYS_PROMPT="U-Boot>"
CONFIG_ARCH_NPCM8XX=y
CONFIG_TARGET_ARBEL_EVB=y
CONFIG_SYS_LOAD_ADDR=0x10000000
CONFIG_ENV_ADDR=0x801C0000
CONFIG_ENV_ADDR=0x803C0000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_USE_BOOTCOMMAND=y
@ -22,6 +22,8 @@ CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
CONFIG_SYS_BOOTM_LEN=0x1400000
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
@ -35,17 +37,25 @@ CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CLK=y
CONFIG_NPCM_GPIO=y
CONFIG_DM_I2C=y
# CONFIG_INPUT is not set
CONFIG_NPCM_HOST=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_NPCM=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHY_BROADCOM=y
CONFIG_DM_MDIO=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
CONFIG_MII=y
CONFIG_PHY=y
CONFIG_PHY_NPCM_USB=y
CONFIG_PINCTRL=y
CONFIG_PINCONF=y
CONFIG_PINCTRL_NPCM8XX=y
CONFIG_DM_RESET=y
CONFIG_RESET_SYSCON=y
CONFIG_DM_SERIAL=y
@ -53,12 +63,15 @@ CONFIG_NPCM_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_NPCM_FIU_SPI=y
CONFIG_NPCM_PSPI=y
CONFIG_TIMER=y
CONFIG_NPCM_TIMER=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_NPCM=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_OHCI_NPCM=y
CONFIG_USB_STORAGE=y
# CONFIG_EFI_LOADER is not set

View file

@ -62,3 +62,4 @@ CONFIG_MTK_SERIAL=y
CONFIG_FAT_WRITE=y
CONFIG_HEXDUMP=y
# CONFIG_EFI_LOADER is not set
CONFIG_LMB_MAX_REGIONS=64

View file

@ -64,3 +64,4 @@ CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MTK_SPIM=y
CONFIG_HEXDUMP=y
CONFIG_LMB_MAX_REGIONS=64

View file

@ -62,3 +62,4 @@ CONFIG_MTK_SERIAL=y
CONFIG_FAT_WRITE=y
CONFIG_HEXDUMP=y
# CONFIG_EFI_LOADER is not set
CONFIG_LMB_MAX_REGIONS=64

View file

@ -64,3 +64,4 @@ CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MTK_SPIM=y
CONFIG_HEXDUMP=y
CONFIG_LMB_MAX_REGIONS=64

View file

@ -62,3 +62,4 @@ CONFIG_MTK_SERIAL=y
CONFIG_FAT_WRITE=y
CONFIG_HEXDUMP=y
# CONFIG_EFI_LOADER is not set
CONFIG_LMB_MAX_REGIONS=64

View file

@ -62,3 +62,4 @@ CONFIG_MTK_SERIAL=y
CONFIG_FAT_WRITE=y
CONFIG_HEXDUMP=y
# CONFIG_EFI_LOADER is not set
CONFIG_LMB_MAX_REGIONS=64

View file

@ -179,11 +179,19 @@ initrd <path> - if this label is chosen, use tftp to retrieve the initrd
at <path>. it will be stored at the address indicated in
the initrd_addr_r environment variable, and that address
will be passed to bootm.
For FIT image, the initrd can be provided with the same value than
kernel, including configuration:
<path>#<conf>[#<extra-conf[#...]]
In this case, kernel_addr_r is passed to bootm.
fdt <path> - if this label is chosen, use tftp to retrieve the fdt blob
at <path>. it will be stored at the address indicated in
the fdt_addr_r environment variable, and that address will
be passed to bootm.
For FIT image, the device tree can be provided with the same value
than kernel, including configuration:
<path>#<conf>[#<extra-conf[#...]]
In this case, kernel_addr_r is passed to bootm.
devicetree <path> - if this label is chosen, use tftp to retrieve the fdt blob
at <path>. it will be stored at the address indicated in

View file

@ -73,6 +73,8 @@ int pcie_dw_prog_outbound_atu_unroll(struct pcie_dw *pci, int index,
upper_32_bits(cpu_addr));
dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_LIMIT,
lower_32_bits(cpu_addr + size - 1));
dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_UPPER_LIMIT,
upper_32_bits(cpu_addr + size - 1));
dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_LOWER_TARGET,
lower_32_bits(pci_addr));
dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_UPPER_TARGET,

View file

@ -32,6 +32,7 @@
#define PCIE_ATU_UNR_LIMIT 0x10
#define PCIE_ATU_UNR_LOWER_TARGET 0x14
#define PCIE_ATU_UNR_UPPER_TARGET 0x18
#define PCIE_ATU_UNR_UPPER_LIMIT 0x20
#define PCIE_ATU_REGION_INDEX1 (0x1 << 0)
#define PCIE_ATU_REGION_INDEX0 (0x0 << 0)

View file

@ -28,6 +28,7 @@
* Create these with the 'label_create' function given below.
*
* name - the name of the menu as given on the 'menu label' line.
* kernel_label - the kernel label, including FIT config if present.
* kernel - the path to the kernel file to use for this label.
* append - kernel command line to use when booting this label
* initrd - path to the initrd to use for this label.
@ -40,6 +41,7 @@ struct pxe_label {
char num[4];
char *name;
char *menu;
char *kernel_label;
char *kernel;
char *config;
char *append;