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https://github.com/AsahiLinux/u-boot
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8xx serial, smc: Coding-Style cleanup serial SMC driver
Signed-off-by: Heiko Schocher <hs@denx.de>
This commit is contained in:
Heiko Schocher
Wolfgang Denk
parent
2b3f12c214
commit
255d28e164
1 changed files with 24 additions and 48 deletions
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@ -148,12 +148,10 @@ static int smc_init (void)
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up->smc_rpbase = 0;
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#endif
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/* Disable transmitter/receiver.
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*/
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/* Disable transmitter/receiver. */
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sp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
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/* Enable SDMA.
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*/
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/* Enable SDMA. */
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im->im_siu_conf.sc_sdcr = 1;
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/* clear error conditions */
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@ -171,21 +169,19 @@ static int smc_init (void)
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#endif
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#if defined(CONFIG_8xx_CONS_SMC1)
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/* Use Port B for SMC1 instead of other functions.
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*/
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/* Use Port B for SMC1 instead of other functions. */
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cp->cp_pbpar |= 0x000000c0;
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cp->cp_pbdir &= ~0x000000c0;
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cp->cp_pbodr &= ~0x000000c0;
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#else /* CONFIG_8xx_CONS_SMC2 */
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# if defined(CONFIG_MPC823) || defined(CONFIG_MPC850)
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/* Use Port A for SMC2 instead of other functions.
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*/
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/* Use Port A for SMC2 instead of other functions. */
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ip->iop_papar |= 0x00c0;
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ip->iop_padir &= ~0x00c0;
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ip->iop_paodr &= ~0x00c0;
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# else /* must be a 860 then */
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/* Use Port B for SMC2 instead of other functions.
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*/
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*/
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cp->cp_pbpar |= 0x00000c00;
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cp->cp_pbdir &= ~0x00000c00;
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cp->cp_pbodr &= ~0x00000c00;
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@ -232,8 +228,7 @@ static int smc_init (void)
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rtx->txbd.cbd_bufaddr = (uint) &rtx->txbuf;
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rtx->txbd.cbd_sc = 0;
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/* Set up the uart parameters in the parameter ram.
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*/
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/* Set up the uart parameters in the parameter ram. */
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up->smc_rbase = dpaddr;
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up->smc_tbase = dpaddr+sizeof(cbd_t);
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up->smc_rfcr = SMC_EB;
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@ -274,8 +269,7 @@ static int smc_init (void)
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smc_setbrg ();
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#endif
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/* Make the first buffer the only buffer.
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*/
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/* Make the first buffer the only buffer. */
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rtx->txbd.cbd_sc |= BD_SC_WRAP;
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rtx->rxbd.cbd_sc |= BD_SC_EMPTY | BD_SC_WRAP;
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@ -284,9 +278,7 @@ static int smc_init (void)
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up->smc_maxidl = CONFIG_SYS_MAXIDLE;
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rtx->rxindex = 0;
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/* Initialize Tx/Rx parameters.
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*/
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/* Initialize Tx/Rx parameters. */
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while (cp->cp_cpcr & CPM_CR_FLG) /* wait if cp is busy */
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;
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@ -295,8 +287,7 @@ static int smc_init (void)
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while (cp->cp_cpcr & CPM_CR_FLG) /* wait if cp is busy */
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;
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/* Enable transmitter/receiver.
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*/
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/* Enable transmitter/receiver. */
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sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
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return (0);
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@ -325,8 +316,7 @@ smc_putc(const char c)
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rtx = (serialbuffer_t *)&cpmp->cp_dpmem[up->smc_rbase];
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/* Wait for last character to go.
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*/
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/* Wait for last character to go. */
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rtx->txbuf = c;
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rtx->txbd.cbd_datlen = 1;
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rtx->txbd.cbd_sc |= BD_SC_READY;
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@ -361,8 +351,7 @@ smc_getc(void)
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#endif
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rtx = (serialbuffer_t *)&cpmp->cp_dpmem[up->smc_rbase];
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/* Wait for character to show up.
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*/
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/* Wait for character to show up. */
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while (rtx->rxbd.cbd_sc & BD_SC_EMPTY)
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WATCHDOG_RESET ();
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@ -465,8 +454,7 @@ static int scc_init (void)
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}
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#endif /* CONFIG_LWMON */
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/* Disable transmitter/receiver.
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*/
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/* Disable transmitter/receiver. */
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sp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
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#if (SCC_INDEX == 2) && defined(CONFIG_MPC850)
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@ -491,8 +479,7 @@ static int scc_init (void)
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ip->iop_pdpar |= ((3 << (2 * SCC_INDEX)));
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#endif
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/* Allocate space for two buffer descriptors in the DP ram.
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*/
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/* Allocate space for two buffer descriptors in the DP ram. */
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#ifdef CONFIG_SYS_ALLOC_DPRAM
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dpaddr = dpram_alloc_align (sizeof(cbd_t)*2 + 2, 8) ;
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@ -500,8 +487,7 @@ static int scc_init (void)
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dpaddr = CPM_SERIAL2_BASE ;
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#endif
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/* Enable SDMA.
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*/
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/* Enable SDMA. */
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im->im_siu_conf.sc_sdcr = 0x0001;
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/* Set the physical address of the host memory buffers in
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@ -515,17 +501,14 @@ static int scc_init (void)
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tbdf->cbd_bufaddr = ((uint) (rbdf+2)) + 1;
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tbdf->cbd_sc = 0;
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/* Set up the baud rate generator.
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*/
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/* Set up the baud rate generator. */
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scc_setbrg ();
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/* Set up the uart parameters in the parameter ram.
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*/
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/* Set up the uart parameters in the parameter ram. */
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up->scc_genscc.scc_rbase = dpaddr;
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up->scc_genscc.scc_tbase = dpaddr+sizeof(cbd_t);
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/* Initialize Tx/Rx parameters.
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*/
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/* Initialize Tx/Rx parameters. */
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while (cp->cp_cpcr & CPM_CR_FLG) /* wait if cp is busy */
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;
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cp->cp_cpcr = mk_cr_cmd(CPM_CR_CH_SCC, CPM_CR_INIT_TRX) | CPM_CR_FLG;
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@ -556,8 +539,7 @@ static int scc_init (void)
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up->scc_char8 = 0x8000;
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up->scc_rccm = 0xc0ff;
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/* Set low latency / small fifo.
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*/
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/* Set low latency / small fifo. */
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sp->scc_gsmrh = SCC_GSMRH_RFW;
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/* Set SCC(x) clock mode to 16x
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@ -566,8 +548,7 @@ static int scc_init (void)
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* Wire BRG1 to SCCn
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*/
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/* Set UART mode, clock divider 16 on Tx and Rx
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*/
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/* Set UART mode, clock divider 16 on Tx and Rx */
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sp->scc_gsmrl &= ~0xF;
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sp->scc_gsmrl |=
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(SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
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@ -575,20 +556,17 @@ static int scc_init (void)
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sp->scc_psmr = 0;
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sp->scc_psmr |= SCU_PSMR_CL;
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/* Mask all interrupts and remove anything pending.
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*/
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/* Mask all interrupts and remove anything pending. */
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sp->scc_sccm = 0;
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sp->scc_scce = 0xffff;
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sp->scc_dsr = 0x7e7e;
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sp->scc_psmr = 0x3000;
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/* Make the first buffer the only buffer.
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*/
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/* Make the first buffer the only buffer. */
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tbdf->cbd_sc |= BD_SC_WRAP;
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rbdf->cbd_sc |= BD_SC_EMPTY | BD_SC_WRAP;
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/* Enable transmitter/receiver.
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*/
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/* Enable transmitter/receiver. */
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sp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
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return (0);
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@ -615,8 +593,7 @@ scc_putc(const char c)
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tbdf = (cbd_t *)&cpmp->cp_dpmem[up->scc_genscc.scc_tbase];
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/* Wait for last character to go.
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*/
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/* Wait for last character to go. */
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buf = (char *)tbdf->cbd_bufaddr;
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@ -653,8 +630,7 @@ scc_getc(void)
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rbdf = (cbd_t *)&cpmp->cp_dpmem[up->scc_genscc.scc_rbase];
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/* Wait for character to show up.
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*/
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/* Wait for character to show up. */
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buf = (unsigned char *)rbdf->cbd_bufaddr;
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while (rbdf->cbd_sc & BD_SC_EMPTY)
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