mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 23:24:38 +00:00
Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx
For all practical u-boot purposes, TSECs don't differ throughout the mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This commit is contained in:
parent
3a71b5ca77
commit
255a3577c8
25 changed files with 119 additions and 144 deletions
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@ -345,23 +345,23 @@ int last_stage_init(void)
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/* This is needed to get the RGMII working for the 1.3+
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* CDS cards */
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if (get_board_version() == 0x13) {
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miiphy_write(CONFIG_MPC85XX_TSEC1_NAME,
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miiphy_write(CONFIG_TSEC1_NAME,
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TSEC1_PHY_ADDR, 29, 18);
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miiphy_read(CONFIG_MPC85XX_TSEC1_NAME,
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miiphy_read(CONFIG_TSEC1_NAME,
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TSEC1_PHY_ADDR, 30, &temp);
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temp = (temp & 0xf03f);
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temp |= 2 << 9; /* 36 ohm */
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temp |= 2 << 6; /* 39 ohm */
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miiphy_write(CONFIG_MPC85XX_TSEC1_NAME,
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miiphy_write(CONFIG_TSEC1_NAME,
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TSEC1_PHY_ADDR, 30, temp);
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miiphy_write(CONFIG_MPC85XX_TSEC1_NAME,
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miiphy_write(CONFIG_TSEC1_NAME,
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TSEC1_PHY_ADDR, 29, 3);
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miiphy_write(CONFIG_MPC85XX_TSEC1_NAME,
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miiphy_write(CONFIG_TSEC1_NAME,
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TSEC1_PHY_ADDR, 30, 0x8000);
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}
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@ -415,7 +415,7 @@ static const struct {
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"clock-frequency",
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fdt_set_busfreq
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},
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#ifdef CONFIG_MPC83XX_TSEC1
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#ifdef CONFIG_TSEC1
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{ "/" OF_SOC "/ethernet@24000,
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"mac-address",
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fdt_set_eth0
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@ -425,7 +425,7 @@ static const struct {
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fdt_set_eth0
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},
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#endif
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#ifdef CONFIG_MPC83XX_TSEC2
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#ifdef CONFIG_TSEC2
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{ "/" OF_SOC "/ethernet@25000,
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"mac-address",
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fdt_set_eth1
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@ -525,7 +525,7 @@ ft_cpu_setup(void *blob, bd_t *bd)
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if (p != NULL)
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*p = cpu_to_be32(clock);
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#ifdef CONFIG_MPC83XX_TSEC1
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#ifdef CONFIG_TSEC1
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p = ft_get_prop(blob, "/" OF_SOC "/ethernet@24000/mac-address", &len);
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if (p != NULL)
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memcpy(p, bd->bi_enetaddr, 6);
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@ -535,7 +535,7 @@ ft_cpu_setup(void *blob, bd_t *bd)
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memcpy(p, bd->bi_enetaddr, 6);
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#endif
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#ifdef CONFIG_MPC83XX_TSEC2
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#ifdef CONFIG_TSEC2
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p = ft_get_prop(blob, "/" OF_SOC "/ethernet@25000/mac-address", &len);
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if (p != NULL)
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memcpy(p, bd->bi_enet1addr, 6);
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@ -280,7 +280,7 @@ ft_cpu_setup(void *blob, bd_t *bd)
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if (p != NULL)
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*p = cpu_to_be32(clock);
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#if defined(CONFIG_MPC85XX_TSEC1)
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#if defined(CONFIG_TSEC1)
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p = ft_get_prop(blob, "/" OF_SOC "/ethernet@24000/mac-address", &len);
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if (p)
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memcpy(p, bd->bi_enetaddr, 6);
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@ -278,7 +278,7 @@ ft_cpu_setup(void *blob, bd_t *bd)
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if (p != NULL)
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*p = cpu_to_be32(clock);
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#if defined(CONFIG_MPC86XX_TSEC1)
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#if defined(CONFIG_TSEC1)
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p = ft_get_prop(blob, "/" OF_SOC "/ethernet@24000/mac-address", &len);
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if (p != NULL)
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memcpy(p, bd->bi_enetaddr, 6);
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@ -287,7 +287,7 @@ ft_cpu_setup(void *blob, bd_t *bd)
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memcpy(p, bd->bi_enetaddr, 6);
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#endif
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#if defined(CONFIG_MPC86XX_TSEC2)
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#if defined(CONFIG_TSEC2)
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p = ft_get_prop(blob, "/" OF_SOC "/ethernet@25000/mac-address", &len);
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if (p != NULL)
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memcpy(p, bd->bi_enet1addr, 6);
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@ -296,7 +296,7 @@ ft_cpu_setup(void *blob, bd_t *bd)
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memcpy(p, bd->bi_enet1addr, 6);
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#endif
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#if defined(CONFIG_MPC86XX_TSEC3)
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#if defined(CONFIG_TSEC3)
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p = ft_get_prop(blob, "/" OF_SOC "/ethernet@26000/mac-address", &len);
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if (p != NULL)
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memcpy(p, bd->bi_enet2addr, 6);
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@ -305,7 +305,7 @@ ft_cpu_setup(void *blob, bd_t *bd)
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memcpy(p, bd->bi_enet2addr, 6);
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#endif
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#if defined(CONFIG_MPC86XX_TSEC4)
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#if defined(CONFIG_TSEC4)
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p = ft_get_prop(blob, "/" OF_SOC "/ethernet@27000/mac-address", &len);
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if (p != NULL)
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memcpy(p, bd->bi_enet3addr, 6);
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@ -65,33 +65,31 @@ struct tsec_info_struct {
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* FEC_PHYIDX
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*/
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static struct tsec_info_struct tsec_info[] = {
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#if defined(CONFIG_MPC85XX_TSEC1) || defined(CONFIG_MPC83XX_TSEC1)
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#if defined(CONFIG_MPC8544DS)
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#if defined(CONFIG_TSEC1)
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#if defined(CONFIG_MPC8544DS) || defined(CONFIG_MPC8641HPCN)
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{TSEC1_PHY_ADDR, TSEC_GIGABIT | TSEC_REDUCED, TSEC1_PHYIDX},
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#else
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{TSEC1_PHY_ADDR, TSEC_GIGABIT, TSEC1_PHYIDX},
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#endif
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#elif defined(CONFIG_MPC86XX_TSEC1)
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{TSEC1_PHY_ADDR, TSEC_GIGABIT | TSEC_REDUCED, TSEC1_PHYIDX},
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#else
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{0, 0, 0},
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#endif
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#if defined(CONFIG_MPC85XX_TSEC2) || defined(CONFIG_MPC83XX_TSEC2)
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{TSEC2_PHY_ADDR, TSEC_GIGABIT, TSEC2_PHYIDX},
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#elif defined(CONFIG_MPC86XX_TSEC2)
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#if defined(CONFIG_TSEC2)
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#if defined(CONFIG_MPC8641HPCN)
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{TSEC2_PHY_ADDR, TSEC_GIGABIT | TSEC_REDUCED, TSEC2_PHYIDX},
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#else
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{TSEC2_PHY_ADDR, TSEC_GIGABIT, TSEC2_PHYIDX},
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#endif
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{0, 0, 0},
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#endif
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#ifdef CONFIG_MPC85XX_FEC
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{FEC_PHY_ADDR, 0, FEC_PHYIDX},
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#else
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#if defined(CONFIG_MPC85XX_TSEC3) || defined(CONFIG_MPC83XX_TSEC3) || defined(CONFIG_MPC86XX_TSEC3)
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#if defined(CONFIG_TSEC3)
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{TSEC3_PHY_ADDR, TSEC_GIGABIT | TSEC_REDUCED, TSEC3_PHYIDX},
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#else
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{0, 0, 0},
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#endif
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#if defined(CONFIG_MPC85XX_TSEC4) || defined(CONFIG_MPC83XX_TSEC4) || defined(CONFIG_MPC86XX_TSEC4)
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#if defined(CONFIG_TSEC4)
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{TSEC4_PHY_ADDR, TSEC_GIGABIT | TSEC_REDUCED, TSEC4_PHYIDX},
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#else
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{0, 0, 0},
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@ -303,11 +303,11 @@
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#endif
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#define CONFIG_GMII 1 /* MII PHY management */
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#define CONFIG_MPC83XX_TSEC1 1
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#define CONFIG_TSEC1 1
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#define CONFIG_MPC83XX_TSEC1_NAME "TSEC0"
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#define CONFIG_MPC83XX_TSEC2 1
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#define CONFIG_MPC83XX_TSEC2_NAME "TSEC1"
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#define CONFIG_TSEC1_NAME "TSEC0"
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#define CONFIG_TSEC2 1
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#define CONFIG_TSEC2_NAME "TSEC1"
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#define TSEC1_PHY_ADDR 0x1c
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#define TSEC2_PHY_ADDR 4
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#define TSEC1_PHYIDX 0
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@ -432,10 +432,10 @@
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#endif
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#define CONFIG_GMII 1 /* MII PHY management */
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#define CONFIG_MPC83XX_TSEC1 1
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#define CONFIG_MPC83XX_TSEC1_NAME "TSEC0"
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#define CONFIG_MPC83XX_TSEC2 1
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#define CONFIG_MPC83XX_TSEC2_NAME "TSEC1"
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#define CONFIG_TSEC1 1
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#define CONFIG_TSEC1_NAME "TSEC0"
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#define CONFIG_TSEC2 1
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#define CONFIG_TSEC2_NAME "TSEC1"
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#define TSEC1_PHY_ADDR 0
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#define TSEC2_PHY_ADDR 1
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#define TSEC1_PHYIDX 0
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@ -374,18 +374,18 @@ boards, we say we have two, but don't display a message if we find only one. */
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#define CONFIG_MII
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#define CONFIG_PHY_GIGE /* In case CFG_CMD_MII is specified */
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#define CONFIG_MPC83XX_TSEC1
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#define CONFIG_TSEC1
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#ifdef CONFIG_MPC83XX_TSEC1
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#define CONFIG_MPC83XX_TSEC1_NAME "TSEC0"
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#ifdef CONFIG_TSEC1
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#define CONFIG_TSEC1_NAME "TSEC0"
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#define CFG_TSEC1_OFFSET 0x24000
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#define TSEC1_PHY_ADDR 0x1c /* VSC8201 uses address 0x1c */
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#define TSEC1_PHYIDX 0
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#endif
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#ifdef CONFIG_MPC83XX_TSEC2
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#ifdef CONFIG_TSEC2
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#define CONFIG_HAS_ETH1
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#define CONFIG_MPC83XX_TSEC2_NAME "TSEC1"
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#define CONFIG_TSEC2_NAME "TSEC1"
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#define CFG_TSEC2_OFFSET 0x25000
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#define CONFIG_UNKNOWN_TSEC /* TSEC2 is proprietary */
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#define TSEC2_PHY_ADDR 4
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*/
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#define CONFIG_ENV_OVERWRITE
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#ifdef CONFIG_MPC83XX_TSEC1
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#ifdef CONFIG_TSEC1
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#define CONFIG_ETHADDR 00:E0:0C:00:8C:01
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#endif
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#ifdef CONFIG_MPC83XX_TSEC2
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#ifdef CONFIG_TSEC2
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#define CONFIG_ETH1ADDR 00:E0:0C:00:8C:02
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#endif
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@ -366,10 +366,10 @@
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#endif
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_MPC85XX_TSEC1 1
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#define CONFIG_MPC85XX_TSEC1_NAME "TSEC0"
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#define CONFIG_MPC85XX_TSEC2 1
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#define CONFIG_MPC85XX_TSEC2_NAME "TSEC1"
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#define CONFIG_TSEC1 1
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#define CONFIG_TSEC1_NAME "TSEC0"
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#define CONFIG_TSEC2 1
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#define CONFIG_TSEC2_NAME "TSEC1"
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#define TSEC1_PHY_ADDR 0
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#define TSEC2_PHY_ADDR 1
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#define TSEC1_PHYIDX 0
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@ -212,10 +212,10 @@
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#elif defined(CONFIG_TSEC_ENET)
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#define CONFIG_NET_MULTI 1
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_MPC85XX_TSEC1 1
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#define CONFIG_MPC85XX_TSEC1_NAME "TSEC0"
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#define CONFIG_MPC85XX_TSEC2 1
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#define CONFIG_MPC85XX_TSEC2_NAME "TSEC1"
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#define CONFIG_TSEC1 1
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#define CONFIG_TSEC1_NAME "TSEC0"
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#define CONFIG_TSEC2 1
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#define CONFIG_TSEC2_NAME "TSEC1"
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#define CONFIG_MPC85XX_FEC 1
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#define CONFIG_MPC85XX_FEC_NAME "FEC"
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#define TSEC1_PHY_ADDR 7
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@ -373,10 +373,10 @@ extern unsigned long get_clock_freq(void);
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#endif
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_MPC85XX_TSEC1 1
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#define CONFIG_MPC85XX_TSEC1_NAME "TSEC0"
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#define CONFIG_MPC85XX_TSEC2 1
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#define CONFIG_MPC85XX_TSEC2_NAME "TSEC1"
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#define CONFIG_TSEC1 1
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#define CONFIG_TSEC1_NAME "TSEC0"
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#define CONFIG_TSEC2 1
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#define CONFIG_TSEC2_NAME "TSEC1"
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#undef CONFIG_MPC85XX_FEC
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#define TSEC1_PHY_ADDR 0
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#define TSEC2_PHY_ADDR 1
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@ -359,10 +359,10 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */
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#define CONFIG_MPC85XX_TSEC1 1
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#define CONFIG_MPC85XX_TSEC1_NAME "eTSEC1"
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#define CONFIG_MPC85XX_TSEC3 1
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#define CONFIG_MPC85XX_TSEC3_NAME "eTSEC3"
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#define CONFIG_TSEC1 1
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#define CONFIG_TSEC1_NAME "eTSEC1"
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#define CONFIG_TSEC3 1
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#define CONFIG_TSEC3_NAME "eTSEC3"
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#undef CONFIG_MPC85XX_FEC
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#define TSEC1_PHY_ADDR 0
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@ -391,14 +391,14 @@ extern unsigned long get_clock_freq(void);
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#endif
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_MPC85XX_TSEC1 1
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#define CONFIG_MPC85XX_TSEC1_NAME "eTSEC0"
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#define CONFIG_MPC85XX_TSEC2 1
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#define CONFIG_MPC85XX_TSEC2_NAME "eTSEC1"
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#define CONFIG_MPC85XX_TSEC3 1
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#define CONFIG_MPC85XX_TSEC3_NAME "eTSEC2"
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#undef CONFIG_MPC85XX_TSEC4
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#define CONFIG_MPC85XX_TSEC4_NAME "eTSEC3"
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#define CONFIG_TSEC1 1
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#define CONFIG_TSEC1_NAME "eTSEC0"
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#define CONFIG_TSEC2 1
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#define CONFIG_TSEC2_NAME "eTSEC1"
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#define CONFIG_TSEC3 1
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#define CONFIG_TSEC3_NAME "eTSEC2"
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#undef CONFIG_TSEC4
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#define CONFIG_TSEC4_NAME "eTSEC3"
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#undef CONFIG_MPC85XX_FEC
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#define TSEC1_PHY_ADDR 0
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@ -373,10 +373,10 @@ extern unsigned long get_clock_freq(void);
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#endif
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_MPC85XX_TSEC1 1
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#define CONFIG_MPC85XX_TSEC1_NAME "TSEC0"
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#define CONFIG_MPC85XX_TSEC2 1
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#define CONFIG_MPC85XX_TSEC2_NAME "TSEC1"
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#define CONFIG_TSEC1 1
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#define CONFIG_TSEC1_NAME "TSEC0"
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#define CONFIG_TSEC2 1
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#define CONFIG_TSEC2_NAME "TSEC1"
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#undef CONFIG_MPC85XX_FEC
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#define TSEC1_PHY_ADDR 0
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#define TSEC2_PHY_ADDR 1
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@ -356,10 +356,10 @@
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#endif
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_MPC85XX_TSEC1 1
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#define CONFIG_MPC85XX_TSEC1_NAME "TSEC0"
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#define CONFIG_MPC85XX_TSEC2 1
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#define CONFIG_MPC85XX_TSEC2_NAME "TSEC1"
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#define CONFIG_TSEC1 1
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#define CONFIG_TSEC1_NAME "TSEC0"
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#define CONFIG_TSEC2 1
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#define CONFIG_TSEC2_NAME "TSEC1"
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#undef CONFIG_MPC85XX_FEC
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#define TSEC1_PHY_ADDR 0
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#define TSEC2_PHY_ADDR 1
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@ -353,12 +353,12 @@ extern unsigned long get_clock_freq(void);
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#endif
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_MPC85XX_TSEC1 1
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#define CONFIG_MPC85XX_TSEC1_NAME "eTSEC0"
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#define CONFIG_MPC85XX_TSEC2 1
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#define CONFIG_MPC85XX_TSEC2_NAME "eTSEC1"
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#undef CONFIG_MPC85XX_TSEC3
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#undef CONFIG_MPC85XX_TSEC4
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#define CONFIG_TSEC1 1
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#define CONFIG_TSEC1_NAME "eTSEC0"
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#define CONFIG_TSEC2 1
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#define CONFIG_TSEC2_NAME "eTSEC1"
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#undef CONFIG_TSEC3
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#undef CONFIG_TSEC4
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#undef CONFIG_MPC85XX_FEC
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#define TSEC1_PHY_ADDR 2
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@ -359,14 +359,14 @@
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_MPC86XX_TSEC1 1
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#define CONFIG_MPC86XX_TSEC1_NAME "eTSEC1"
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#define CONFIG_MPC86XX_TSEC2 1
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#define CONFIG_MPC86XX_TSEC2_NAME "eTSEC2"
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#define CONFIG_MPC86XX_TSEC3 1
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#define CONFIG_MPC86XX_TSEC3_NAME "eTSEC3"
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#define CONFIG_MPC86XX_TSEC4 1
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#define CONFIG_MPC86XX_TSEC4_NAME "eTSEC4"
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#define CONFIG_TSEC1 1
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#define CONFIG_TSEC1_NAME "eTSEC1"
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#define CONFIG_TSEC2 1
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#define CONFIG_TSEC2_NAME "eTSEC2"
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#define CONFIG_TSEC3 1
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#define CONFIG_TSEC3_NAME "eTSEC3"
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#define CONFIG_TSEC4 1
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#define CONFIG_TSEC4_NAME "eTSEC4"
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#define TSEC1_PHY_ADDR 0
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#define TSEC2_PHY_ADDR 1
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@ -262,10 +262,10 @@
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#endif
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_MPC85XX_TSEC1 1
|
||||
#define CONFIG_MPC85XX_TSEC1_NAME "TSEC0"
|
||||
#define CONFIG_MPC85XX_TSEC2 1
|
||||
#define CONFIG_MPC85XX_TSEC2_NAME "TSEC1"
|
||||
#define CONFIG_TSEC1 1
|
||||
#define CONFIG_TSEC1_NAME "TSEC0"
|
||||
#define CONFIG_TSEC2 1
|
||||
#define CONFIG_TSEC2_NAME "TSEC1"
|
||||
#define TSEC1_PHY_ADDR 0
|
||||
#define TSEC2_PHY_ADDR 1
|
||||
#define TSEC1_PHYIDX 0
|
||||
|
|
|
@ -258,10 +258,10 @@
|
|||
#endif
|
||||
|
||||
#define CONFIG_MII 1 /* MII PHY management */
|
||||
#define CONFIG_MPC85XX_TSEC1 1
|
||||
#define CONFIG_MPC85XX_TSEC1_NAME "TSEC0"
|
||||
#define CONFIG_MPC85XX_TSEC2 1
|
||||
#define CONFIG_MPC85XX_TSEC2_NAME "TSEC1"
|
||||
#define CONFIG_TSEC1 1
|
||||
#define CONFIG_TSEC1_NAME "TSEC0"
|
||||
#define CONFIG_TSEC2 1
|
||||
#define CONFIG_TSEC2_NAME "TSEC1"
|
||||
#undef CONFIG_MPC85XX_FEC
|
||||
#define TSEC1_PHY_ADDR 0
|
||||
#define TSEC2_PHY_ADDR 1
|
||||
|
|
|
@ -248,10 +248,10 @@ extern int tqm834x_num_flash_banks;
|
|||
#define CONFIG_NET_MULTI
|
||||
#endif
|
||||
|
||||
#define CONFIG_MPC83XX_TSEC1 1
|
||||
#define CONFIG_MPC83XX_TSEC1_NAME "TSEC0"
|
||||
#define CONFIG_MPC83XX_TSEC2 1
|
||||
#define CONFIG_MPC83XX_TSEC2_NAME "TSEC1"
|
||||
#define CONFIG_TSEC1 1
|
||||
#define CONFIG_TSEC1_NAME "TSEC0"
|
||||
#define CONFIG_TSEC2 1
|
||||
#define CONFIG_TSEC2_NAME "TSEC1"
|
||||
#define TSEC1_PHY_ADDR 2
|
||||
#define TSEC2_PHY_ADDR 1
|
||||
#define TSEC1_PHYIDX 0
|
||||
|
|
|
@ -258,10 +258,10 @@
|
|||
#define CONFIG_NET_MULTI 1
|
||||
|
||||
#define CONFIG_MII 1 /* MII PHY management */
|
||||
#define CONFIG_MPC85XX_TSEC1 1
|
||||
#define CONFIG_MPC85XX_TSEC1_NAME "TSEC0"
|
||||
#define CONFIG_MPC85XX_TSEC2 1
|
||||
#define CONFIG_MPC85XX_TSEC2_NAME "TSEC1"
|
||||
#define CONFIG_TSEC1 1
|
||||
#define CONFIG_TSEC1_NAME "TSEC0"
|
||||
#define CONFIG_TSEC2 1
|
||||
#define CONFIG_TSEC2_NAME "TSEC1"
|
||||
#define TSEC1_PHY_ADDR 2
|
||||
#define TSEC2_PHY_ADDR 1
|
||||
#define TSEC1_PHYIDX 0
|
||||
|
|
|
@ -401,10 +401,10 @@
|
|||
#define CONFIG_NET_MULTI 1
|
||||
#endif
|
||||
|
||||
#define CONFIG_MPC83XX_TSEC1 1
|
||||
#define CONFIG_MPC83XX_TSEC1_NAME "TSEC0"
|
||||
#define CONFIG_MPC83XX_TSEC2 1
|
||||
#define CONFIG_MPC83XX_TSEC2_NAME "TSEC1"
|
||||
#define CONFIG_TSEC1 1
|
||||
#define CONFIG_TSEC1_NAME "TSEC0"
|
||||
#define CONFIG_TSEC2 1
|
||||
#define CONFIG_TSEC2_NAME "TSEC1"
|
||||
#define CONFIG_PHY_BCM5421S 1
|
||||
#define TSEC1_PHY_ADDR 0x19
|
||||
#define TSEC2_PHY_ADDR 0x1a
|
||||
|
|
|
@ -230,10 +230,10 @@
|
|||
|
||||
#define CONFIG_MII 1 /* MII PHY management */
|
||||
|
||||
#define CONFIG_MPC85XX_TSEC1 1
|
||||
#define CONFIG_MPC85XX_TSEC1_NAME "TSEC0"
|
||||
#define CONFIG_MPC85XX_TSEC2 1
|
||||
#define CONFIG_MPC85XX_TSEC2_NAME "TSEC1"
|
||||
#define CONFIG_TSEC1 1
|
||||
#define CONFIG_TSEC1_NAME "TSEC0"
|
||||
#define CONFIG_TSEC2 1
|
||||
#define CONFIG_TSEC2_NAME "TSEC1"
|
||||
#undef CONFIG_MPS85XX_FEC
|
||||
|
||||
#define TSEC1_PHY_ADDR 2
|
||||
|
|
|
@ -252,10 +252,10 @@
|
|||
|
||||
#define CONFIG_MII 1 /* MII PHY management */
|
||||
|
||||
#define CONFIG_MPC85XX_TSEC1 1
|
||||
#define CONFIG_MPC85XX_TSEC1_NAME "TSEC0"
|
||||
#define CONFIG_MPC85XX_TSEC2 1
|
||||
#define CONFIG_MPC85XX_TSEC2_NAME "TSEC1"
|
||||
#define CONFIG_TSEC1 1
|
||||
#define CONFIG_TSEC1_NAME "TSEC0"
|
||||
#define CONFIG_TSEC2 1
|
||||
#define CONFIG_TSEC2_NAME "TSEC1"
|
||||
#undef CONFIG_MPS85XX_FEC
|
||||
|
||||
#define TSEC1_PHY_ADDR 2
|
||||
|
|
39
net/eth.c
39
net/eth.c
|
@ -173,28 +173,20 @@ int eth_initialize(bd_t *bis)
|
|||
#if defined(CONFIG_SK98)
|
||||
skge_initialize(bis);
|
||||
#endif
|
||||
#if defined(CONFIG_MPC85XX_TSEC1)
|
||||
tsec_initialize(bis, 0, CONFIG_MPC85XX_TSEC1_NAME);
|
||||
#elif defined(CONFIG_MPC83XX_TSEC1)
|
||||
tsec_initialize(bis, 0, CONFIG_MPC83XX_TSEC1_NAME);
|
||||
#if defined(CONFIG_TSEC1)
|
||||
tsec_initialize(bis, 0, CONFIG_TSEC1_NAME);
|
||||
#endif
|
||||
#if defined(CONFIG_MPC85XX_TSEC2)
|
||||
tsec_initialize(bis, 1, CONFIG_MPC85XX_TSEC2_NAME);
|
||||
#elif defined(CONFIG_MPC83XX_TSEC2)
|
||||
tsec_initialize(bis, 1, CONFIG_MPC83XX_TSEC2_NAME);
|
||||
#if defined(CONFIG_TSEC2)
|
||||
tsec_initialize(bis, 1, CONFIG_TSEC2_NAME);
|
||||
#endif
|
||||
#if defined(CONFIG_MPC85XX_FEC)
|
||||
tsec_initialize(bis, 2, CONFIG_MPC85XX_FEC_NAME);
|
||||
#else
|
||||
# if defined(CONFIG_MPC85XX_TSEC3)
|
||||
tsec_initialize(bis, 2, CONFIG_MPC85XX_TSEC3_NAME);
|
||||
# elif defined(CONFIG_MPC83XX_TSEC3)
|
||||
tsec_initialize(bis, 2, CONFIG_MPC83XX_TSEC3_NAME);
|
||||
# if defined(CONFIG_TSEC3)
|
||||
tsec_initialize(bis, 2, CONFIG_TSEC3_NAME);
|
||||
# endif
|
||||
# if defined(CONFIG_MPC85XX_TSEC4)
|
||||
tsec_initialize(bis, 3, CONFIG_MPC85XX_TSEC4_NAME);
|
||||
# elif defined(CONFIG_MPC83XX_TSEC4)
|
||||
tsec_initialize(bis, 3, CONFIG_MPC83XX_TSEC4_NAME);
|
||||
# if defined(CONFIG_TSEC4)
|
||||
tsec_initialize(bis, 3, CONFIG_TSEC4_NAME);
|
||||
# endif
|
||||
#endif
|
||||
#if defined(CONFIG_UEC_ETH1)
|
||||
|
@ -203,21 +195,6 @@ int eth_initialize(bd_t *bis)
|
|||
#if defined(CONFIG_UEC_ETH2)
|
||||
uec_initialize(1);
|
||||
#endif
|
||||
#if defined(CONFIG_MPC86XX_TSEC1)
|
||||
tsec_initialize(bis, 0, CONFIG_MPC86XX_TSEC1_NAME);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MPC86XX_TSEC2)
|
||||
tsec_initialize(bis, 1, CONFIG_MPC86XX_TSEC2_NAME);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MPC86XX_TSEC3)
|
||||
tsec_initialize(bis, 2, CONFIG_MPC86XX_TSEC3_NAME);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MPC86XX_TSEC4)
|
||||
tsec_initialize(bis, 3, CONFIG_MPC86XX_TSEC4_NAME);
|
||||
#endif
|
||||
|
||||
#if defined(FEC_ENET) || defined(CONFIG_ETHER_ON_FCC)
|
||||
fec_initialize(bis);
|
||||
|
|
Loading…
Reference in a new issue