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dm: serial: bcm6345: fix baud rate clock calculation
It's currently bugged and doesn't work for even cases. Right shift bits instead of dividing and fix even cases. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
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1 changed files with 4 additions and 4 deletions
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@ -157,11 +157,11 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate)
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UART_FIFO_CFG_TX_4);
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/* set baud rate */
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val = (clk / baudrate) / 16;
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val = ((clk / baudrate) >> 4);
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if (val & 0x1)
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val = val;
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val = (val >> 1);
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else
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val = val / 2 - 1;
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val = (val >> 1) - 1;
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writel_be(val, base + UART_BAUD_REG);
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/* clear interrupts */
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@ -243,7 +243,7 @@ static int bcm6345_serial_probe(struct udevice *dev)
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ret = clk_get_by_index(dev, 0, &clk);
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if (ret < 0)
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return ret;
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priv->uartclk = clk_get_rate(&clk) / 2;
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priv->uartclk = clk_get_rate(&clk);
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clk_free(&clk);
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/* initialize serial */
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