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armv8: layerscape: Update MMU mapping with actual DDR size

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Update mapping with actual DDR size. Non-existing memory should not
be mapped as "normal" memory to avoid speculative access.

Signed-off-by: York Sun <york.sun@nxp.com>
This commit is contained in:
York Sun 2017-03-06 09:02:30 -08:00
parent 437858b620
commit 24f55496a4
1 changed files with 40 additions and 2 deletions
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42
arch/arm/cpu/armv8/fsl-layerscape/cpu.c
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@ -101,12 +101,50 @@ static inline void final_mmu_setup(void)
{
u64 tlb_addr_save = gd->arch.tlb_addr;
unsigned int el = current_el();
#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
int index;
#endif
mem_map = final_map;
/* Update mapping for DDR to actual size */
for (index = 0; index < ARRAY_SIZE(final_map) - 2; index++) {
/*
* Find the entry for DDR mapping and update the address and
* size. Zero-sized mapping will be skipped when creating MMU
* table.
*/
switch (final_map[index].virt) {
case CONFIG_SYS_FSL_DRAM_BASE1:
final_map[index].virt = gd->bd->bi_dram[0].start;
final_map[index].phys = gd->bd->bi_dram[0].start;
final_map[index].size = gd->bd->bi_dram[0].size;
break;
#ifdef CONFIG_SYS_FSL_DRAM_BASE2
case CONFIG_SYS_FSL_DRAM_BASE2:
#if (CONFIG_NR_DRAM_BANKS >= 2)
final_map[index].virt = gd->bd->bi_dram[1].start;
final_map[index].phys = gd->bd->bi_dram[1].start;
final_map[index].size = gd->bd->bi_dram[1].size;
#else
final_map[index].size = 0;
#endif
break;
#endif
#ifdef CONFIG_SYS_FSL_DRAM_BASE3
case CONFIG_SYS_FSL_DRAM_BASE3:
#if (CONFIG_NR_DRAM_BANKS >= 3)
final_map[index].virt = gd->bd->bi_dram[2].start;
final_map[index].phys = gd->bd->bi_dram[2].start;
final_map[index].size = gd->bd->bi_dram[2].size;
#else
final_map[index].size = 0;
#endif
break;
#endif
default:
break;
}
}
#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
if (gd->arch.secure_ram & MEM_RESERVE_SECURE_MAINTAINED) {
if (el == 3) {