mirror of
https://github.com/AsahiLinux/u-boot
synced 2025-03-16 23:07:00 +00:00
Merge branch '2021-06-07-arm-cache-cp15-improvements' into next
To quote the series author, Patrick Delaunay:
On STM32MP15x platform we can use OP-TEE, loaded in DDR in a region
protected by a firewall. This region is reserved in the device with
the "no-map" property as defined in the binding file
doc/device-tree-bindings/reserved-memory/reserved-memory.txt.
Sometime the platform boot failed in U-Boot on a Cortex A7 access to
this region (depending of the binary and the issue can change with compiler
version or with code alignment), then the firewall raise an error,
for example:
E/TC:0 tzc_it_handler:19 TZC permission failure
E/TC:0 dump_fail_filter:420 Permission violation on filter 0
E/TC:0 dump_fail_filter:425 Violation @0xde5c6bf0, non-secure privileged read,
AXI ID 5c0
E/TC:0 Panic
After investigation, the forbidden access is a speculative request performed
by the Cortex A7 because all the DDR is mapped as MEMORY with CACHEABLE
property.
The issue is solved only when the region reserved by OP-TEE is no more
mapped in U-Boot as it is already done in Linux kernel.
Tested on DK2 board with OP-TEE 3.12 / TF-A 2.4:
With hard-coded address for OP-TEE reserved memory,
the error doesn't occur.
void dram_bank_mmu_setup(int bank)
{
....
for (i = start >> MMU_SECTION_SHIFT;
i < (start >> MMU_SECTION_SHIFT) + (size >> MMU_SECTION_SHIFT);
i++) {
option = DCACHE_DEFAULT_OPTION;
if (i >= 0xde0)
option = INVALID_ENTRY;
set_section_dcache(i, option);
}
}
Just by modifying the test on 0xde0 to 0xdf0, the OP-TEE memory protected
by firewall is mapped cacheable and the error occurs.
I think that it can be a general issue for ARM architecture: the "no-map" tag
of reserved memory in device should be respected by U-Boot if firewall
is configured before U-Boot execution.
But I don't propose a generic solution in
arm/lib/cache-cp15.c:dram_bank_mmu_setup()
because the device tree parsing done in lmb_init_and_reserve() takes a
long time when it is executed without data cache.
This commit is contained in:
Tom Rini
commit
24e1e8841c
6 changed files with 230 additions and 41 deletions
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@ -12,6 +12,7 @@
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#include <env.h>
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#include <init.h>
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#include <log.h>
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#include <lmb.h>
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#include <misc.h>
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#include <net.h>
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#include <asm/io.h>
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@ -90,6 +91,8 @@
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*/
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u8 early_tlb[PGTABLE_SIZE] __section(".data") __aligned(0x4000);
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struct lmb lmb;
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#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
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#ifndef CONFIG_TFABOOT
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static void security_init(void)
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@ -221,6 +224,8 @@ void dram_bank_mmu_setup(int bank)
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int i;
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phys_addr_t start;
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phys_size_t size;
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bool use_lmb = false;
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enum dcache_option option;
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if (IS_ENABLED(CONFIG_SPL_BUILD)) {
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start = ALIGN_DOWN(STM32_SYSRAM_BASE, MMU_SECTION_SIZE);
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@ -229,6 +234,7 @@ void dram_bank_mmu_setup(int bank)
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/* bd->bi_dram is available only after relocation */
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start = bd->bi_dram[bank].start;
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size = bd->bi_dram[bank].size;
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use_lmb = true;
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} else {
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/* mark cacheable and executable the beggining of the DDR */
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start = STM32_DDR_BASE;
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@ -237,8 +243,12 @@ void dram_bank_mmu_setup(int bank)
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for (i = start >> MMU_SECTION_SHIFT;
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i < (start >> MMU_SECTION_SHIFT) + (size >> MMU_SECTION_SHIFT);
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i++)
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set_section_dcache(i, DCACHE_DEFAULT_OPTION);
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i++) {
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option = DCACHE_DEFAULT_OPTION;
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if (use_lmb && lmb_is_reserved_flags(&lmb, i << MMU_SECTION_SHIFT, LMB_NOMAP))
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option = 0; /* INVALID ENTRY in TLB */
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set_section_dcache(i, option);
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}
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}
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/*
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* initialize the MMU and activate cache in SPL or in U-Boot pre-reloc stage
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@ -302,6 +312,9 @@ int arch_cpu_init(void)
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void enable_caches(void)
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{
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/* parse device tree when data cache is still activated */
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lmb_init_and_reserve(&lmb, gd->bd, (void *)gd->fdt_blob);
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/* I-cache is already enabled in start.S: icache_enable() not needed */
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/* deactivate the data cache, early enabled in arch_cpu_init() */
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@ -50,13 +50,16 @@ ulong board_get_usable_ram_top(ulong total_size)
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lmb_init(&lmb);
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lmb_add(&lmb, gd->ram_base, gd->ram_size);
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boot_fdt_add_mem_rsv_regions(&lmb, (void *)gd->fdt_blob);
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size = ALIGN(CONFIG_SYS_MALLOC_LEN + total_size, MMU_SECTION_SIZE),
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/* add 8M for reserved memory for display, fdt, gd,... */
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size = ALIGN(SZ_8M + CONFIG_SYS_MALLOC_LEN + total_size, MMU_SECTION_SIZE),
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reg = lmb_alloc(&lmb, size, MMU_SECTION_SIZE);
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if (!reg)
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reg = gd->ram_top - size;
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mmu_set_region_dcache_behaviour(reg, size, DCACHE_DEFAULT_OPTION);
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/* before relocation, mark the U-Boot memory as cacheable by default */
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if (!(gd->flags & GD_FLG_RELOC))
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mmu_set_region_dcache_behaviour(reg, size, DCACHE_DEFAULT_OPTION);
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return reg + size;
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}
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@ -75,18 +75,20 @@ static const image_header_t *image_get_fdt(ulong fdt_addr)
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#endif
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static void boot_fdt_reserve_region(struct lmb *lmb, uint64_t addr,
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uint64_t size)
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uint64_t size, enum lmb_flags flags)
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{
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long ret;
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ret = lmb_reserve(lmb, addr, size);
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ret = lmb_reserve_flags(lmb, addr, size, flags);
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if (ret >= 0) {
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debug(" reserving fdt memory region: addr=%llx size=%llx\n",
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(unsigned long long)addr, (unsigned long long)size);
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debug(" reserving fdt memory region: addr=%llx size=%llx flags=%x\n",
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(unsigned long long)addr,
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(unsigned long long)size, flags);
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} else {
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puts("ERROR: reserving fdt memory region failed ");
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printf("(addr=%llx size=%llx)\n",
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(unsigned long long)addr, (unsigned long long)size);
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printf("(addr=%llx size=%llx flags=%x)\n",
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(unsigned long long)addr,
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(unsigned long long)size, flags);
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}
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}
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@ -106,6 +108,7 @@ void boot_fdt_add_mem_rsv_regions(struct lmb *lmb, void *fdt_blob)
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int i, total, ret;
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int nodeoffset, subnode;
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struct fdt_resource res;
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enum lmb_flags flags;
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if (fdt_check_header(fdt_blob) != 0)
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return;
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@ -115,7 +118,7 @@ void boot_fdt_add_mem_rsv_regions(struct lmb *lmb, void *fdt_blob)
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for (i = 0; i < total; i++) {
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if (fdt_get_mem_rsv(fdt_blob, i, &addr, &size) != 0)
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continue;
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boot_fdt_reserve_region(lmb, addr, size);
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boot_fdt_reserve_region(lmb, addr, size, LMB_NONE);
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}
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/* process reserved-memory */
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@ -127,9 +130,13 @@ void boot_fdt_add_mem_rsv_regions(struct lmb *lmb, void *fdt_blob)
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ret = fdt_get_resource(fdt_blob, subnode, "reg", 0,
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&res);
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if (!ret && fdtdec_get_is_enabled(fdt_blob, subnode)) {
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flags = LMB_NONE;
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if (fdtdec_get_bool(fdt_blob, subnode,
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"no-map"))
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flags = LMB_NOMAP;
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addr = res.start;
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size = res.end - res.start + 1;
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boot_fdt_reserve_region(lmb, addr, size);
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boot_fdt_reserve_region(lmb, addr, size, flags);
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}
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subnode = fdt_next_subnode(fdt_blob, subnode);
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@ -12,6 +12,16 @@
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* Copyright (C) 2001 Peter Bergner, IBM Corp.
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*/
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/**
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* enum lmb_flags - definition of memory region attributes
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* @LMB_NONE: no special request
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* @LMB_NOMAP: don't add to mmu configuration
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*/
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enum lmb_flags {
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LMB_NONE = 0x0,
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LMB_NOMAP = 0x4,
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};
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/**
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* struct lmb_property - Description of one region.
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*
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@ -21,6 +31,7 @@
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struct lmb_property {
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phys_addr_t base;
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phys_size_t size;
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enum lmb_flags flags;
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};
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/**
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@ -69,6 +80,17 @@ extern void lmb_init_and_reserve_range(struct lmb *lmb, phys_addr_t base,
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phys_size_t size, void *fdt_blob);
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extern long lmb_add(struct lmb *lmb, phys_addr_t base, phys_size_t size);
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extern long lmb_reserve(struct lmb *lmb, phys_addr_t base, phys_size_t size);
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/**
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* lmb_reserve_flags - Reserve one region with a specific flags bitfield.
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*
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* @lmb the logical memory block struct
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* @base base address of the memory region
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* @size size of the memory region
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* @flags flags for the memory region
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* @return 0 if OK, > 0 for coalesced region or a negative error code.
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*/
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long lmb_reserve_flags(struct lmb *lmb, phys_addr_t base,
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phys_size_t size, enum lmb_flags flags);
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extern phys_addr_t lmb_alloc(struct lmb *lmb, phys_size_t size, ulong align);
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extern phys_addr_t lmb_alloc_base(struct lmb *lmb, phys_size_t size, ulong align,
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phys_addr_t max_addr);
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@ -78,6 +100,15 @@ extern phys_addr_t lmb_alloc_addr(struct lmb *lmb, phys_addr_t base,
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phys_size_t size);
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extern phys_size_t lmb_get_free_size(struct lmb *lmb, phys_addr_t addr);
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extern int lmb_is_reserved(struct lmb *lmb, phys_addr_t addr);
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/**
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* lmb_is_reserved_flags - test if tha address is in reserved region with a bitfield flag
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*
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* @lmb the logical memory block struct
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* @addr address to be tested
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* @flags flags bitfied to be tested
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* @return 0 if not reserved or reserved without the requested flag else 1
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*/
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int lmb_is_reserved_flags(struct lmb *lmb, phys_addr_t addr, int flags);
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extern long lmb_free(struct lmb *lmb, phys_addr_t base, phys_size_t size);
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extern void lmb_dump_all(struct lmb *lmb);
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@ -92,6 +123,13 @@ lmb_size_bytes(struct lmb_region *type, unsigned long region_nr)
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void board_lmb_reserve(struct lmb *lmb);
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void arch_lmb_reserve(struct lmb *lmb);
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/* Low level functions */
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static inline bool lmb_is_nomap(struct lmb_property *m)
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{
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return m->flags & LMB_NOMAP;
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}
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#endif /* __KERNEL__ */
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#endif /* _LINUX_LMB_H */
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97
lib/lmb.c
97
lib/lmb.c
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@ -14,26 +14,30 @@
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#define LMB_ALLOC_ANYWHERE 0
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static void lmb_dump_region(struct lmb_region *rgn, char *name)
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{
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unsigned long long base, size, end;
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enum lmb_flags flags;
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int i;
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printf(" %s.cnt = 0x%lx\n", name, rgn->cnt);
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for (i = 0; i < rgn->cnt; i++) {
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base = rgn->region[i].base;
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size = rgn->region[i].size;
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end = base + size - 1;
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flags = rgn->region[i].flags;
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printf(" %s[%d]\t[0x%llx-0x%llx], 0x%08llx bytes flags: %x\n",
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name, i, base, end, size, flags);
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}
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}
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void lmb_dump_all_force(struct lmb *lmb)
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{
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unsigned long i;
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printf("lmb_dump_all:\n");
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printf(" memory.cnt = 0x%lx\n", lmb->memory.cnt);
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for (i = 0; i < lmb->memory.cnt; i++) {
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printf(" memory.reg[0x%lx].base = 0x%llx\n", i,
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(unsigned long long)lmb->memory.region[i].base);
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printf(" .size = 0x%llx\n",
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(unsigned long long)lmb->memory.region[i].size);
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}
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printf("\n reserved.cnt = 0x%lx\n", lmb->reserved.cnt);
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for (i = 0; i < lmb->reserved.cnt; i++) {
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printf(" reserved.reg[0x%lx].base = 0x%llx\n", i,
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(unsigned long long)lmb->reserved.region[i].base);
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printf(" .size = 0x%llx\n",
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(unsigned long long)lmb->reserved.region[i].size);
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}
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lmb_dump_region(&lmb->memory, "memory");
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lmb_dump_region(&lmb->reserved, "reserved");
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}
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void lmb_dump_all(struct lmb *lmb)
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@ -81,6 +85,7 @@ static void lmb_remove_region(struct lmb_region *rgn, unsigned long r)
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for (i = r; i < rgn->cnt - 1; i++) {
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rgn->region[i].base = rgn->region[i + 1].base;
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rgn->region[i].size = rgn->region[i + 1].size;
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rgn->region[i].flags = rgn->region[i + 1].flags;
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}
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rgn->cnt--;
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}
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|
|
@ -144,7 +149,8 @@ void lmb_init_and_reserve_range(struct lmb *lmb, phys_addr_t base,
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}
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/* This routine called with relocation disabled. */
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static long lmb_add_region(struct lmb_region *rgn, phys_addr_t base, phys_size_t size)
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static long lmb_add_region_flags(struct lmb_region *rgn, phys_addr_t base,
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phys_size_t size, enum lmb_flags flags)
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{
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unsigned long coalesced = 0;
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long adjacent, i;
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|
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@ -152,6 +158,7 @@ static long lmb_add_region(struct lmb_region *rgn, phys_addr_t base, phys_size_t
|
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if (rgn->cnt == 0) {
|
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rgn->region[0].base = base;
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rgn->region[0].size = size;
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rgn->region[0].flags = flags;
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rgn->cnt = 1;
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return 0;
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}
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|
|
@ -160,18 +167,27 @@ static long lmb_add_region(struct lmb_region *rgn, phys_addr_t base, phys_size_t
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for (i = 0; i < rgn->cnt; i++) {
|
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phys_addr_t rgnbase = rgn->region[i].base;
|
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phys_size_t rgnsize = rgn->region[i].size;
|
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phys_size_t rgnflags = rgn->region[i].flags;
|
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|
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if ((rgnbase == base) && (rgnsize == size))
|
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/* Already have this region, so we're done */
|
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return 0;
|
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if (rgnbase == base && rgnsize == size) {
|
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if (flags == rgnflags)
|
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/* Already have this region, so we're done */
|
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return 0;
|
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else
|
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return -1; /* regions with new flags */
|
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}
|
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|
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adjacent = lmb_addrs_adjacent(base, size, rgnbase, rgnsize);
|
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if (adjacent > 0) {
|
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if (flags != rgnflags)
|
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break;
|
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rgn->region[i].base -= size;
|
||||
rgn->region[i].size += size;
|
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coalesced++;
|
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break;
|
||||
} else if (adjacent < 0) {
|
||||
if (flags != rgnflags)
|
||||
break;
|
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rgn->region[i].size += size;
|
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coalesced++;
|
||||
break;
|
||||
|
|
@ -182,8 +198,10 @@ static long lmb_add_region(struct lmb_region *rgn, phys_addr_t base, phys_size_t
|
|||
}
|
||||
|
||||
if ((i < rgn->cnt - 1) && lmb_regions_adjacent(rgn, i, i + 1)) {
|
||||
lmb_coalesce_regions(rgn, i, i + 1);
|
||||
coalesced++;
|
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if (rgn->region[i].flags == rgn->region[i + 1].flags) {
|
||||
lmb_coalesce_regions(rgn, i, i + 1);
|
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coalesced++;
|
||||
}
|
||||
}
|
||||
|
||||
if (coalesced)
|
||||
|
|
@ -196,9 +214,11 @@ static long lmb_add_region(struct lmb_region *rgn, phys_addr_t base, phys_size_t
|
|||
if (base < rgn->region[i].base) {
|
||||
rgn->region[i + 1].base = rgn->region[i].base;
|
||||
rgn->region[i + 1].size = rgn->region[i].size;
|
||||
rgn->region[i + 1].flags = rgn->region[i].flags;
|
||||
} else {
|
||||
rgn->region[i + 1].base = base;
|
||||
rgn->region[i + 1].size = size;
|
||||
rgn->region[i + 1].flags = flags;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
@ -206,6 +226,7 @@ static long lmb_add_region(struct lmb_region *rgn, phys_addr_t base, phys_size_t
|
|||
if (base < rgn->region[0].base) {
|
||||
rgn->region[0].base = base;
|
||||
rgn->region[0].size = size;
|
||||
rgn->region[0].flags = flags;
|
||||
}
|
||||
|
||||
rgn->cnt++;
|
||||
|
|
@ -213,6 +234,12 @@ static long lmb_add_region(struct lmb_region *rgn, phys_addr_t base, phys_size_t
|
|||
return 0;
|
||||
}
|
||||
|
||||
static long lmb_add_region(struct lmb_region *rgn, phys_addr_t base,
|
||||
phys_size_t size)
|
||||
{
|
||||
return lmb_add_region_flags(rgn, base, size, LMB_NONE);
|
||||
}
|
||||
|
||||
/* This routine may be called with relocation disabled. */
|
||||
long lmb_add(struct lmb *lmb, phys_addr_t base, phys_size_t size)
|
||||
{
|
||||
|
|
@ -267,14 +294,21 @@ long lmb_free(struct lmb *lmb, phys_addr_t base, phys_size_t size)
|
|||
* beginging of the hole and add the region after hole.
|
||||
*/
|
||||
rgn->region[i].size = base - rgn->region[i].base;
|
||||
return lmb_add_region(rgn, end + 1, rgnend - end);
|
||||
return lmb_add_region_flags(rgn, end + 1, rgnend - end,
|
||||
rgn->region[i].flags);
|
||||
}
|
||||
|
||||
long lmb_reserve_flags(struct lmb *lmb, phys_addr_t base, phys_size_t size,
|
||||
enum lmb_flags flags)
|
||||
{
|
||||
struct lmb_region *_rgn = &(lmb->reserved);
|
||||
|
||||
return lmb_add_region_flags(_rgn, base, size, flags);
|
||||
}
|
||||
|
||||
long lmb_reserve(struct lmb *lmb, phys_addr_t base, phys_size_t size)
|
||||
{
|
||||
struct lmb_region *_rgn = &(lmb->reserved);
|
||||
|
||||
return lmb_add_region(_rgn, base, size);
|
||||
return lmb_reserve_flags(lmb, base, size, LMB_NONE);
|
||||
}
|
||||
|
||||
static long lmb_overlaps_region(struct lmb_region *rgn, phys_addr_t base,
|
||||
|
|
@ -409,7 +443,7 @@ phys_size_t lmb_get_free_size(struct lmb *lmb, phys_addr_t addr)
|
|||
return 0;
|
||||
}
|
||||
|
||||
int lmb_is_reserved(struct lmb *lmb, phys_addr_t addr)
|
||||
int lmb_is_reserved_flags(struct lmb *lmb, phys_addr_t addr, int flags)
|
||||
{
|
||||
int i;
|
||||
|
||||
|
|
@ -417,11 +451,16 @@ int lmb_is_reserved(struct lmb *lmb, phys_addr_t addr)
|
|||
phys_addr_t upper = lmb->reserved.region[i].base +
|
||||
lmb->reserved.region[i].size - 1;
|
||||
if ((addr >= lmb->reserved.region[i].base) && (addr <= upper))
|
||||
return 1;
|
||||
return (lmb->reserved.region[i].flags & flags) == flags;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
int lmb_is_reserved(struct lmb *lmb, phys_addr_t addr)
|
||||
{
|
||||
return lmb_is_reserved_flags(lmb, addr, LMB_NONE);
|
||||
}
|
||||
|
||||
__weak void board_lmb_reserve(struct lmb *lmb)
|
||||
{
|
||||
/* please define platform specific board_lmb_reserve() */
|
||||
|
|
|
|||
|
|
@ -723,3 +723,92 @@ static int lib_test_lmb_max_regions(struct unit_test_state *uts)
|
|||
|
||||
DM_TEST(lib_test_lmb_max_regions,
|
||||
UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
|
||||
|
||||
static int lib_test_lmb_flags(struct unit_test_state *uts)
|
||||
{
|
||||
const phys_addr_t ram = 0x40000000;
|
||||
const phys_size_t ram_size = 0x20000000;
|
||||
struct lmb lmb;
|
||||
long ret;
|
||||
|
||||
lmb_init(&lmb);
|
||||
|
||||
ret = lmb_add(&lmb, ram, ram_size);
|
||||
ut_asserteq(ret, 0);
|
||||
|
||||
/* reserve, same flag */
|
||||
ret = lmb_reserve_flags(&lmb, 0x40010000, 0x10000, LMB_NOMAP);
|
||||
ut_asserteq(ret, 0);
|
||||
ASSERT_LMB(&lmb, ram, ram_size, 1, 0x40010000, 0x10000,
|
||||
0, 0, 0, 0);
|
||||
|
||||
/* reserve again, same flag */
|
||||
ret = lmb_reserve_flags(&lmb, 0x40010000, 0x10000, LMB_NOMAP);
|
||||
ut_asserteq(ret, 0);
|
||||
ASSERT_LMB(&lmb, ram, ram_size, 1, 0x40010000, 0x10000,
|
||||
0, 0, 0, 0);
|
||||
|
||||
/* reserve again, new flag */
|
||||
ret = lmb_reserve_flags(&lmb, 0x40010000, 0x10000, LMB_NONE);
|
||||
ut_asserteq(ret, -1);
|
||||
ASSERT_LMB(&lmb, ram, ram_size, 1, 0x40010000, 0x10000,
|
||||
0, 0, 0, 0);
|
||||
|
||||
ut_asserteq(lmb_is_nomap(&lmb.reserved.region[0]), 1);
|
||||
|
||||
/* merge after */
|
||||
ret = lmb_reserve_flags(&lmb, 0x40020000, 0x10000, LMB_NOMAP);
|
||||
ut_asserteq(ret, 1);
|
||||
ASSERT_LMB(&lmb, ram, ram_size, 1, 0x40010000, 0x20000,
|
||||
0, 0, 0, 0);
|
||||
|
||||
/* merge before */
|
||||
ret = lmb_reserve_flags(&lmb, 0x40000000, 0x10000, LMB_NOMAP);
|
||||
ut_asserteq(ret, 1);
|
||||
ASSERT_LMB(&lmb, ram, ram_size, 1, 0x40000000, 0x30000,
|
||||
0, 0, 0, 0);
|
||||
|
||||
ut_asserteq(lmb_is_nomap(&lmb.reserved.region[0]), 1);
|
||||
|
||||
ret = lmb_reserve_flags(&lmb, 0x40030000, 0x10000, LMB_NONE);
|
||||
ut_asserteq(ret, 0);
|
||||
ASSERT_LMB(&lmb, ram, ram_size, 2, 0x40000000, 0x30000,
|
||||
0x40030000, 0x10000, 0, 0);
|
||||
|
||||
ut_asserteq(lmb_is_nomap(&lmb.reserved.region[0]), 1);
|
||||
ut_asserteq(lmb_is_nomap(&lmb.reserved.region[1]), 0);
|
||||
|
||||
/* test that old API use LMB_NONE */
|
||||
ret = lmb_reserve(&lmb, 0x40040000, 0x10000);
|
||||
ut_asserteq(ret, 1);
|
||||
ASSERT_LMB(&lmb, ram, ram_size, 2, 0x40000000, 0x30000,
|
||||
0x40030000, 0x20000, 0, 0);
|
||||
|
||||
ut_asserteq(lmb_is_nomap(&lmb.reserved.region[0]), 1);
|
||||
ut_asserteq(lmb_is_nomap(&lmb.reserved.region[1]), 0);
|
||||
|
||||
ret = lmb_reserve_flags(&lmb, 0x40070000, 0x10000, LMB_NOMAP);
|
||||
ut_asserteq(ret, 0);
|
||||
ASSERT_LMB(&lmb, ram, ram_size, 3, 0x40000000, 0x30000,
|
||||
0x40030000, 0x20000, 0x40070000, 0x10000);
|
||||
|
||||
ret = lmb_reserve_flags(&lmb, 0x40050000, 0x10000, LMB_NOMAP);
|
||||
ut_asserteq(ret, 0);
|
||||
ASSERT_LMB(&lmb, ram, ram_size, 4, 0x40000000, 0x30000,
|
||||
0x40030000, 0x20000, 0x40050000, 0x10000);
|
||||
|
||||
/* merge with 2 adjacent regions */
|
||||
ret = lmb_reserve_flags(&lmb, 0x40060000, 0x10000, LMB_NOMAP);
|
||||
ut_asserteq(ret, 2);
|
||||
ASSERT_LMB(&lmb, ram, ram_size, 3, 0x40000000, 0x30000,
|
||||
0x40030000, 0x20000, 0x40050000, 0x30000);
|
||||
|
||||
ut_asserteq(lmb_is_nomap(&lmb.reserved.region[0]), 1);
|
||||
ut_asserteq(lmb_is_nomap(&lmb.reserved.region[1]), 0);
|
||||
ut_asserteq(lmb_is_nomap(&lmb.reserved.region[2]), 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
DM_TEST(lib_test_lmb_flags,
|
||||
UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue