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- Add AXG support for SARADC, including minimal ao-clk driver

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- Update Amlogic documentation for Matrix & Jethub D1
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Merge tag 'u-boot-amlogic-20220427' of https://source.denx.de/u-boot/custodians/u-boot-amlogic

- Add AXG support for SARADC, including minimal ao-clk driver
- Update Amlogic documentation for Matrix & Jethub D1
This commit is contained in:
Tom Rini 2022-04-27 09:19:17 -04:00
commit 24df831cd4
8 changed files with 131 additions and 18 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

10
arch/arm/dts/meson-axg-jethome-jethub-j100-u-boot.dtsi Normal file
View file

@ -0,0 +1,10 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2022 Vyacheslav Bocharov <adeep@lexina.in>
* Author: Vyacheslav Bocharov <adeep@lexina.in>
*/
&saradc {
status = "okay";
vref-supply = <&vddio_ao18>;
};

5
configs/jethub_j100_defconfig
View file

@ -17,6 +17,7 @@ CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_CMD_ADC=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
CONFIG_CMD_EEPROM=y
@ -34,6 +35,10 @@ CONFIG_OF_CONTROL=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MESON=y
CONFIG_ADC=y
CONFIG_SARADC_MESON=y
CONFIG_CLK=y
CONFIG_CLK_MESON_AXG=y
CONFIG_MMC_MESON_GX=y
CONFIG_MTD_UBI=y
CONFIG_PHY_REALTEK=y

2
doc/board/amlogic/index.rst
View file

@ -55,7 +55,7 @@ This matrix concerns the actual source code version.
+-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
| NAND | No | No | No | No | No | No | No |
+-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
| ADC | **Yes** | **Yes** | **Yes** | No | No | No | No |
| ADC | **Yes** | **Yes** | **Yes** | **Yes** | No | No | No |
+-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
| CVBS Output | **Yes** | **Yes** | **Yes** | *N/A* | **Yes** | **Yes** | **Yes** |
+-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+

26
doc/board/amlogic/jethub-j100.rst
View file

@ -3,27 +3,33 @@
U-Boot for JetHub J100
=======================
JetHome Jethub D1 (http://jethome.ru/jethub-d1) is a home automation
controller manufactured by JetHome with the following specifications:
JetHome Jethub D1 (http://jethome.ru/jethub-d1) is a series of home
automation controller manufactured by JetHome with the following
specifications:
- Amlogic A113X (ARM Cortex-A53) quad-core up to 1.5GHz
- no video out
- 512Mb/1GB DDR3
- 8/16GB eMMC flash
- 512MB/1GB DDR3 or 2GB DDR4 SDRAM
- 8/16/32GB eMMC flash
- 1 x USB 2.0
- 1 x 10/100Mbps ethernet
- WiFi / Bluetooth AMPAK AP6255 (Broadcom BCM43455) IEEE
802.11a/b/g/n/ac, Bluetooth 4.2.
- TI CC2538 + CC2592 Zigbee Wireless Module with up to 20dBm output
power and Zigbee 3.0 support.
- WiFi / Bluetooth one from:
- AMPAK AP6255 (Broadcom BCM43455) IEEE 802.11a/b/g/n/ac, Bluetooth 4.2
- RTL8822CS IEEE 802.11a/b/g/n/ac, Bluetooth 5.0
- Amlogic W155S1 WiFi5 IEEE 802.11a/b/g/n/ac, Bluetooth 5.2
- 2 x gpio LEDS
- GPIO user Button
- DC source with a voltage of 9 to 56 V / Passive POE
- DIN Rail Mounting case
Basic version also has:
- TI CC2538 + CC2592 Zigbee Wireless Module with up to 20dBm output
power and Zigbee 3.0 support.
- 1 x 1-Wire
- 2 x RS-485
- 4 x dry contact digital GPIO inputs
- 3 x relay GPIO outputs
- DC source with a voltage of 9 to 56 V / Passive POE
- DIN Rail Mounting case
U-Boot compilation
------------------

2
drivers/adc/meson-saradc.c
View file

@ -737,6 +737,8 @@ static const struct udevice_id meson_saradc_ids[] = {
.data = (ulong)&gxl_saradc_data },
{ .compatible = "amlogic,meson-g12a-saradc",
.data = (ulong)&gxl_saradc_data },
{ .compatible = "amlogic,meson-axg-saradc",
.data = (ulong)&gxl_saradc_data },
{ }
};

1
drivers/clk/meson/Makefile
View file

@ -5,5 +5,6 @@
obj-$(CONFIG_CLK_MESON_GX) += gxbb.o
obj-$(CONFIG_CLK_MESON_AXG) += axg.o
obj-$(CONFIG_CLK_MESON_AXG) += axg-ao.o
obj-$(CONFIG_CLK_MESON_G12A) += g12a.o
obj-$(CONFIG_CLK_MESON_G12A) += g12a-ao.o

86
drivers/clk/meson/axg-ao.c Normal file
View file

@ -0,0 +1,86 @@
// SPDX-License-Identifier: GPL-2.0+
#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <clk-uclass.h>
#include <dm.h>
#include <regmap.h>
#include <syscon.h>
#include <dt-bindings/clock/axg-aoclkc.h>
#include "clk_meson.h"
struct meson_clk {
struct regmap *map;
};
#define AO_CLK_GATE0 0x40
#define AO_SAR_CLK 0x90
static struct meson_gate gates[] = {
MESON_GATE(CLKID_AO_SAR_ADC, AO_CLK_GATE0, 7),
MESON_GATE(CLKID_AO_SAR_ADC_CLK, AO_SAR_CLK, 7),
};
static int meson_set_gate(struct clk *clk, bool on)
{
struct meson_clk *priv = dev_get_priv(clk->dev);
struct meson_gate *gate;
gate = &gates[clk->id];
regmap_update_bits(priv->map, gate->reg,
BIT(gate->bit), on ? BIT(gate->bit) : 0);
return 0;
}
static int meson_clk_enable(struct clk *clk)
{
return meson_set_gate(clk, true);
}
static int meson_clk_disable(struct clk *clk)
{
return meson_set_gate(clk, false);
}
static int meson_clk_probe(struct udevice *dev)
{
struct meson_clk *priv = dev_get_priv(dev);
priv->map = syscon_node_to_regmap(dev_ofnode(dev_get_parent(dev)));
if (IS_ERR(priv->map))
return PTR_ERR(priv->map);
return 0;
}
static int meson_clk_request(struct clk *clk)
{
if (clk->id >= ARRAY_SIZE(gates))
return -ENOENT;
return 0;
}
static struct clk_ops meson_clk_ops = {
.disable = meson_clk_disable,
.enable = meson_clk_enable,
.request = meson_clk_request,
};
static const struct udevice_id meson_clk_ids[] = {
{ .compatible = "amlogic,meson-axg-aoclkc" },
{ }
};
U_BOOT_DRIVER(meson_clk_axg_ao) = {
.name = "meson_clk_axg_ao",
.id = UCLASS_CLK,
.of_match = meson_clk_ids,
.priv_auto = sizeof(struct meson_clk),
.ops = &meson_clk_ops,
.probe = meson_clk_probe,
};

17
drivers/clk/meson/g12a-ao.c
View file

@ -28,14 +28,8 @@ static int meson_set_gate(struct clk *clk, bool on)
struct meson_clk *priv = dev_get_priv(clk->dev);
struct meson_gate *gate;
if (clk->id >= ARRAY_SIZE(gates))
return -ENOENT;
gate = &gates[clk->id];
if (gate->reg == 0)
return 0;
regmap_update_bits(priv->map, gate->reg,
BIT(gate->bit), on ? BIT(gate->bit) : 0);
@ -63,9 +57,18 @@ static int meson_clk_probe(struct udevice *dev)
return 0;
}
static int meson_clk_request(struct clk *clk)
{
if (clk->id >= ARRAY_SIZE(gates))
return -ENOENT;
return 0;
}
static struct clk_ops meson_clk_ops = {
.disable = meson_clk_disable,
.enable = meson_clk_enable,
.request = meson_clk_request,
};
static const struct udevice_id meson_clk_ids[] = {
@ -73,7 +76,7 @@ static const struct udevice_id meson_clk_ids[] = {
{ }
};
U_BOOT_DRIVER(meson_clk_axg) = {
U_BOOT_DRIVER(meson_clk_g12a_ao) = {
.name = "meson_clk_g12a_ao",
.id = UCLASS_CLK,
.of_match = meson_clk_ids,