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omap3_spi: introduce CONFIG_OMAP3_SPI_D0_D1_SWAPPED
D0/D1 Swapped or not is a board property, not anything specific to the am33xx SoC, so add a custom define for it. At the same time correct the bit handling for the swapped mode (DPE0 should be cleared and SI/DPE1 set). Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
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1 changed files with 5 additions and 6 deletions
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@ -173,14 +173,13 @@ int spi_claim_bus(struct spi_slave *slave)
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/* standard 4-wire master mode: SCK, MOSI/out, MISO/in, nCS
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* REVISIT: this controller could support SPI_3WIRE mode.
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*/
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#ifdef CONFIG_AM33XX
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#ifdef CONFIG_OMAP3_SPI_D0_D1_SWAPPED
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/*
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* The reference design on AM33xx has D0 and D1 wired up opposite
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* of how it has been done on previous platforms. We assume that
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* custom hardware will also follow this convention.
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* Some boards have D0 wired as MOSI / D1 as MISO instead of
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* The normal D0 as MISO / D1 as MOSI.
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*/
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conf &= OMAP3_MCSPI_CHCONF_DPE0;
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conf |= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1);
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conf &= ~OMAP3_MCSPI_CHCONF_DPE0;
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conf |= OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1;
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#else
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conf &= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1);
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conf |= OMAP3_MCSPI_CHCONF_DPE0;
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