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nand_spl: remove MPC8569MDS_NAND support

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Commit 3d5a335c announced that all the nand_spl boards
would be removed before v2014.07 release.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
This commit is contained in:
Masahiro Yamada 2014-06-04 10:26:49 +09:00 committed by Tom Rini
parent 5dc0d60df7
commit 223f88f46f
4 changed files with 0 additions and 181 deletions
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1
boards.cfg
View file

@ -791,7 +791,6 @@ Active powerpc mpc85xx - freescale mpc8548cds
Active powerpc mpc85xx - freescale mpc8568mds MPC8568MDS - - Active powerpc mpc85xx - freescale mpc8568mds MPC8568MDS - -
Active powerpc mpc85xx - freescale mpc8569mds MPC8569MDS - - Active powerpc mpc85xx - freescale mpc8569mds MPC8569MDS - -
Active powerpc mpc85xx - freescale mpc8569mds MPC8569MDS_ATM MPC8569MDS:ATM - Active powerpc mpc85xx - freescale mpc8569mds MPC8569MDS_ATM MPC8569MDS:ATM -
Active powerpc mpc85xx - freescale mpc8569mds MPC8569MDS_NAND MPC8569MDS:NAND -
Active powerpc mpc85xx - freescale mpc8572ds MPC8572DS - York Sun <yorksun@freescale.com> Active powerpc mpc85xx - freescale mpc8572ds MPC8572DS - York Sun <yorksun@freescale.com>
Active powerpc mpc85xx - freescale mpc8572ds MPC8572DS_36BIT MPC8572DS:36BIT York Sun <yorksun@freescale.com> Active powerpc mpc85xx - freescale mpc8572ds MPC8572DS_36BIT MPC8572DS:36BIT York Sun <yorksun@freescale.com>
Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_NAND P1010RDB:P1010RDB_PA,36BIT,NAND - Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_NAND P1010RDB:P1010RDB_PA,36BIT,NAND -

29
include/configs/MPC8569MDS.h
View file

@ -49,18 +49,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_L2_CACHE /* toggle L2 cache */
#define CONFIG_BTB /* toggle branch predition */ #define CONFIG_BTB /* toggle branch predition */
#ifdef CONFIG_NAND
#define CONFIG_NAND_U_BOOT 1
#define CONFIG_RAMBOOT_NAND 1
#ifdef CONFIG_NAND_SPL
#define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */
#else
#define CONFIG_SYS_LDSCRIPT $(CPUDIR)/u-boot-nand.lds
#define CONFIG_SYS_TEXT_BASE 0xf8f82000
#endif
#endif
#ifndef CONFIG_SYS_TEXT_BASE #ifndef CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_TEXT_BASE 0xfff80000 #define CONFIG_SYS_TEXT_BASE 0xfff80000
#endif #endif
@ -180,12 +168,7 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
#if defined(CONFIG_RAMBOOT_NAND)
#define CONFIG_SYS_RAMBOOT
#define CONFIG_SYS_EXTRA_ENV_RELOC
#else
#undef CONFIG_SYS_RAMBOOT #undef CONFIG_SYS_RAMBOOT
#endif
#define CONFIG_FLASH_CFI_DRIVER #define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_CFI
@ -228,17 +211,10 @@ extern unsigned long get_clock_freq(void);
| OR_FCM_TRLX \ | OR_FCM_TRLX \
| OR_FCM_EHTR) | OR_FCM_EHTR)
#ifdef CONFIG_RAMBOOT_NAND
#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */
#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM/* NAND Options */
#define CONFIG_SYS_BR3_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */
#define CONFIG_SYS_OR3_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */
#else
#define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ #define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */
#define CONFIG_SYS_OR0_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */ #define CONFIG_SYS_OR0_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */
#define CONFIG_SYS_BR3_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ #define CONFIG_SYS_BR3_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */
#define CONFIG_SYS_OR3_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ #define CONFIG_SYS_OR3_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
#endif
#define CONFIG_SYS_LBC_LCRR 0x00000004 /* LB clock ratio reg */ #define CONFIG_SYS_LBC_LCRR 0x00000004 /* LB clock ratio reg */
#define CONFIG_SYS_LBC_LBCR 0x00040000 /* LB config reg */ #define CONFIG_SYS_LBC_LBCR 0x00040000 /* LB config reg */
@ -476,11 +452,6 @@ extern unsigned long get_clock_freq(void);
* Environment * Environment
*/ */
#if defined(CONFIG_SYS_RAMBOOT) #if defined(CONFIG_SYS_RAMBOOT)
#if defined(CONFIG_RAMBOOT_NAND)
#define CONFIG_ENV_IS_IN_NAND 1
#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
#define CONFIG_ENV_OFFSET ((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
#endif
#else #else
#define CONFIG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_IS_IN_FLASH 1
#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)

91
nand_spl/board/freescale/mpc8569mds/Makefile
View file

@ -1,91 +0,0 @@
#
# (C) Copyright 2007
# Stefan Roese, DENX Software Engineering, sr@denx.de.
#
# Copyright 2009-2011 Freescale Semiconductor, Inc.
#
# SPDX-License-Identifier: GPL-2.0+
#
CONFIG_SYS_TEXT_BASE_SPL := 0xfff00000
PAD_TO := 0xfff01000
nandobj := $(objtree)/nand_spl/
LDSCRIPT= $(srctree)/$(CPUDIR)/u-boot-nand_spl.lds
LDFLAGS := -T $(nandobj)u-boot-nand_spl.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) \
$(LDFLAGS) $(LDFLAGS_FINAL)
asflags-y += -DCONFIG_NAND_SPL
ccflags-y += -DCONFIG_NAND_SPL
SOBJS = start.o resetvec.o
COBJS = cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \
nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o
OBJS := $(addprefix $(obj)/,$(SOBJS) $(COBJS))
__OBJS := $(SOBJS) $(COBJS)
LNDIR := $(nandobj)board/$(BOARDDIR)
targets += $(__OBJS)
all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
$(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@
$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
$(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@
$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot-nand_spl.lds
cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
-Map $(nandobj)u-boot-spl.map -o $@
$(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT)
$(CPP) $(cpp_flags) $(LDPPFLAGS) -I$(nandobj)/board/$(BOARDDIR) \
-ansi -D__ASSEMBLY__ -P - <$< >$@
# create symbolic links for common files
$(obj)/cache.c:
@rm -f $@
ln -sf $(srctree)/arch/powerpc/lib/cache.c $@
$(obj)/cpu_init_early.c:
@rm -f $@
ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/cpu_init_early.c $@
$(obj)/spl_minimal.c:
@rm -f $@
ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/spl_minimal.c $@
$(obj)/fsl_law.c:
@rm -f $@
ln -sf $(srctree)/arch/powerpc/cpu/mpc8xxx/law.c $@
$(obj)/law.c:
@rm -f $@
ln -sf $(srctree)/board/$(BOARDDIR)/law.c $@
$(obj)/nand_boot_fsl_elbc.c:
@rm -f $@
ln -sf $(srctree)/nand_spl/nand_boot_fsl_elbc.c $@
$(obj)/ns16550.c:
@rm -f $@
ln -sf $(srctree)/drivers/serial/ns16550.c $@
$(obj)/resetvec.S:
@rm -f $@
ln -s $(srctree)/$(CPUDIR)/resetvec.S $@
$(obj)/start.S:
@rm -f $@
ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/start.S $@
$(obj)/tlb.c:
@rm -f $@
ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/tlb.c $@
$(obj)/tlb_table.c:
@rm -f $@
ln -sf $(srctree)/board/$(BOARDDIR)/tlb.c $@

60
nand_spl/board/freescale/mpc8569mds/nand_boot.c
View file

@ -1,60 +0,0 @@
/*
* Copyright 2009 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <mpc85xx.h>
#include <asm/io.h>
#include <ns16550.h>
#include <nand.h>
#include <asm/mmu.h>
#include <asm/immap_85xx.h>
#include <fsl_ddr_sdram.h>
#include <asm/fsl_law.h>
#define SYSCLK_66 66666666
DECLARE_GLOBAL_DATA_PTR;
void board_init_f(ulong bootflag)
{
uint plat_ratio, bus_clk, sys_clk;
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
sys_clk = SYSCLK_66;
plat_ratio = gur->porpllsr & 0x0000003e;
plat_ratio >>= 1;
bus_clk = plat_ratio * sys_clk;
NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
bus_clk / 16 / CONFIG_BAUDRATE);
puts("\nNAND boot... ");
/* copy code to DDR and jump to it - this should not return */
/* NOTE - code has to be copied out of NAND buffer before
* other blocks can be read.
*/
relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0,
CONFIG_SYS_NAND_U_BOOT_RELOC);
}
void board_init_r(gd_t *gd, ulong dest_addr)
{
nand_boot();
}
void putc(char c)
{
if (c == '\n')
NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r');
NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c);
}
void puts(const char *str)
{
while (*str)
putc(*str++);
}