imx: imx8mm_mx8menlo: Enable DM_SERIAL

Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
This commit is contained in:
Peng Fan 2022-05-05 15:43:30 +08:00 committed by Stefano Babic
parent d003d89372
commit 2232d5f5b7
3 changed files with 1 additions and 12 deletions

View file

@ -12,15 +12,8 @@
#include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/iomux-v3.h>
#include <spl.h> #include <spl.h>
#define UART_PAD_CTRL (PAD_CTL_PUE | PAD_CTL_PE | PAD_CTL_DSE4)
#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) #define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
/* Verdin UART_3, Console/Debug UART */
static iomux_v3_cfg_t const uart_pads[] = {
IMX8MM_PAD_SAI3_TXFS_UART2_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
IMX8MM_PAD_SAI3_TXC_UART2_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
};
static iomux_v3_cfg_t const wdog_pads[] = { static iomux_v3_cfg_t const wdog_pads[] = {
IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL),
}; };
@ -48,8 +41,6 @@ void board_early_init(void)
set_wdog_reset(wdog); set_wdog_reset(wdog);
imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
init_uart_clk(1); init_uart_clk(1);
setup_snvs(); setup_snvs();

View file

@ -105,6 +105,7 @@ CONFIG_DM_PMIC_PFUZE100=y
CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y CONFIG_MXC_UART=y
CONFIG_SYSRESET=y CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y CONFIG_SPL_SYSRESET=y

View file

@ -30,7 +30,4 @@
"initrd_addr=0x43800000\0" \ "initrd_addr=0x43800000\0" \
"kernel_image=fitImage\0" "kernel_image=fitImage\0"
#undef CONFIG_MXC_UART_BASE
#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
#endif /* __IMX8MM_MX8MENLO_H */ #endif /* __IMX8MM_MX8MENLO_H */