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ddr: Migrate DDR_SPD to Kconfig

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Move the symbol that controls building some JEDEC SPD support functions
to Kconfig.  This is required on the TI keystone 2 platforms and very
frequently (but not always) used on large number of Freescale/NXP
platforms, so use imply there.

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2021-08-21 13:50:16 -04:00
parent f66a3fde38
commit 222d22a39a
3 changed files with 11 additions and 0 deletions
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1
arch/arm/Kconfig
View file

@ -729,6 +729,7 @@ config ARCH_KEYSTONE
bool "TI Keystone"
select CMD_POWEROFF
select CPU_V7A
select DDR_SPD
select GPIO_EXTRA_HEADER
select SUPPORT_SPL
select SYS_ARCH_TIMER

6
drivers/ddr/Kconfig
View file

@ -1,2 +1,8 @@
config DDR_SPD
bool "JEDEC Serial Presence Detect (SPD) support"
help
For memory controllers that can utilize it, add enable support for
using the JEDEC SDP standard.
source "drivers/ddr/altera/Kconfig"
source "drivers/ddr/imx/Kconfig"

4
drivers/ddr/fsl/Kconfig
View file

@ -116,22 +116,26 @@ choice
config SYS_FSL_DDR4
bool "Freescale DDR4 controller"
depends on SYS_FSL_HAS_DDR4
imply DDR_SPD
select SYS_FSL_DDRC_GEN4
config SYS_FSL_DDR3
bool "Freescale DDR3 controller"
depends on SYS_FSL_HAS_DDR3
imply DDR_SPD
select SYS_FSL_DDRC_GEN3 if PPC
select SYS_FSL_DDRC_ARM_GEN3 if ARM
config SYS_FSL_DDR2
bool "Freescale DDR2 controller"
depends on SYS_FSL_HAS_DDR2
imply DDR_SPD
select SYS_FSL_DDRC_GEN2 if (!MPC86xx && !SYS_FSL_DDRC_GEN3)
config SYS_FSL_DDR1
bool "Freescale DDR1 controller"
depends on SYS_FSL_HAS_DDR1
imply DDR_SPD
select SYS_FSL_DDRC_GEN1
endchoice