mirror of
https://github.com/AsahiLinux/u-boot
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arm: mvebu: Load U-Boot proper binary in SPL code based on kwbimage header
Now that proper load and execution addresses are set in v1 kwbimage we can use it for loading and booting U-Boot proper. Use the new spl_parse_board_header() function to implement parsing the kwbimage v1 header. Use information from this header to locate offset and size of the U-Boot proper binary, instead of using the legacy U-Boot header which is prepended to the U-Boot proper binary stored at fixed offset. This has the advantage that we do not need to relay on legacy U-Boot header anymore and therefore U-Boot proper binary can be stored at any offset, as is the case when loading & booting U-Boot proper by BootROM. The CONFIG_SYS_U_BOOT_OFFS option is therefore not used by SPL code anymore. Also allow to compile U-Boot SPL without CONFIG_SPL_SPI_FLASH_SUPPORT, CONFIG_SPL_MMC_SUPPORT or CONFIG_SPL_SATA_SUPPORT set. In this case BootROM is used for loading and executing U-Boot proper. This reduces the size of U-Boot's SPL image. By default these config options are enabled and so BootROM loading is not used. In some cases BootROM reads from SPI NOR at lower speed than U-Boot SPL. So people can decide whether they want to have smaller SPL binary at the cost of slower boot. Therefore dependency on CONFIG_SPL_DM_SPI, CONFIG_SPL_SPI_FLASH_SUPPORT, CONFIG_SPL_SPI_LOAD, CONFIG_SPL_SPI_SUPPORT, CONFIG_SPL_DM_GPIO, CONFIG_SPL_DM_MMC, CONFIG_SPL_GPIO_SUPPORT, CONFIG_SPL_LIBDISK_SUPPORT, CONFIG_SPL_MMC_SUPPORT, CONFIG_SPL_SATA_SUPPORT and CONFIG_SPL_LIBDISK_SUPPORT is changed from strict to related "imply" (which can be selectivelly turned off and causes booting via BootROM). Options CONFIG_SYS_SPI_U_BOOT_OFFS, CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR and CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET have to to be set to zero as they define the location where kwbimage header starts. It is the location where BootROM expects start of the kwbimage from which it reads, parses and executes SPL part. The same applies to option CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR, which has to be set to one. Update all config files to set correct values of these options and set CONFIG_SYS_U_BOOT_OFFS to the correct value - the offset where U-Boot proper starts. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
This commit is contained in:
parent
9baab60b80
commit
2226ca1734
28 changed files with 224 additions and 69 deletions
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@ -253,27 +253,27 @@ choice
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config MVEBU_SPL_BOOT_DEVICE_SPI
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bool "SPI NOR flash"
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imply ENV_IS_IN_SPI_FLASH
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select SPL_DM_SPI
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select SPL_SPI_FLASH_SUPPORT
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select SPL_SPI_LOAD
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select SPL_SPI_SUPPORT
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imply SPL_DM_SPI
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imply SPL_SPI_FLASH_SUPPORT
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imply SPL_SPI_LOAD
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imply SPL_SPI_SUPPORT
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select SPL_BOOTROM_SUPPORT
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config MVEBU_SPL_BOOT_DEVICE_MMC
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bool "SDIO/MMC card"
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imply ENV_IS_IN_MMC
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# GPIO needed for eMMC/SD card presence detection
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select SPL_DM_GPIO
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select SPL_DM_MMC
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select SPL_GPIO
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select SPL_LIBDISK_SUPPORT
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select SPL_MMC_SUPPORT
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imply SPL_DM_GPIO
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imply SPL_DM_MMC
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imply SPL_GPIO
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imply SPL_LIBDISK_SUPPORT
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imply SPL_MMC_SUPPORT
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select SPL_BOOTROM_SUPPORT
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config MVEBU_SPL_BOOT_DEVICE_SATA
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bool "SATA"
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select SPL_SATA_SUPPORT
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select SPL_LIBDISK_SUPPORT
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imply SPL_SATA_SUPPORT
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imply SPL_LIBDISK_SUPPORT
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select SPL_BOOTROM_SUPPORT
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config MVEBU_SPL_BOOT_DEVICE_UART
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@ -8,6 +8,7 @@
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#include <debug_uart.h>
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#include <fdtdec.h>
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#include <hang.h>
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#include <image.h>
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#include <init.h>
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#include <log.h>
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#include <spl.h>
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@ -16,6 +17,160 @@
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#include <asm/arch/cpu.h>
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#include <asm/arch/soc.h>
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#if defined(CONFIG_SPL_SPI_FLASH_SUPPORT) || defined(CONFIG_SPL_MMC_SUPPORT) || defined(CONFIG_SPL_SATA_SUPPORT)
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/*
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* When loading U-Boot via SPL from SPI NOR, CONFIG_SYS_SPI_U_BOOT_OFFS must
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* point to the offset of kwbimage main header which is always at offset zero
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* (defined by BootROM). Therefore other values of CONFIG_SYS_SPI_U_BOOT_OFFS
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* makes U-Boot non-bootable.
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*/
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#ifdef CONFIG_SPL_SPI_FLASH_SUPPORT
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#if defined(CONFIG_SYS_SPI_U_BOOT_OFFS) && CONFIG_SYS_SPI_U_BOOT_OFFS != 0
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#error CONFIG_SYS_SPI_U_BOOT_OFFS must be set to 0
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#endif
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#endif
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/*
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* When loading U-Boot via SPL from eMMC (in Marvell terminology SDIO), the
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* kwbimage main header is stored at sector 0. U-Boot SPL needs to parse this
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* header and figure out at which sector the U-Boot proper binary is stored.
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* Partition booting is therefore not supported and CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
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* and CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET need to point to the
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* kwbimage main header.
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*/
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#ifdef CONFIG_SPL_MMC_SUPPORT
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#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
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#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is unsupported
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#endif
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#if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR) && CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR != 0
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#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR must be set to 0
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#endif
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#if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET) && CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET != 0
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#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET must be set to 0
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#endif
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#endif
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/*
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* When loading U-Boot via SPL from SATA disk, the kwbimage main header is
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* stored at sector 1. Therefore CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR must be
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* set to 1. Otherwise U-Boot SPL would not be able to load U-Boot proper.
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*/
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#ifdef CONFIG_SPL_SATA_SUPPORT
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#if !defined(CONFIG_SPL_SATA_RAW_U_BOOT_USE_SECTOR) || !defined(CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR) || CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR != 1
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#error CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR must be set to 1
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#endif
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#endif
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/* Boot Type - block ID */
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#define IBR_HDR_I2C_ID 0x4D
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#define IBR_HDR_SPI_ID 0x5A
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#define IBR_HDR_NAND_ID 0x8B
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#define IBR_HDR_SATA_ID 0x78
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#define IBR_HDR_PEX_ID 0x9C
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#define IBR_HDR_UART_ID 0x69
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#define IBR_HDR_SDIO_ID 0xAE
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/* Structure of the main header, version 1 (Armada 370/38x/XP) */
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struct kwbimage_main_hdr_v1 {
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uint8_t blockid; /* 0x0 */
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uint8_t flags; /* 0x1 */
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uint16_t reserved2; /* 0x2-0x3 */
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uint32_t blocksize; /* 0x4-0x7 */
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uint8_t version; /* 0x8 */
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uint8_t headersz_msb; /* 0x9 */
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uint16_t headersz_lsb; /* 0xA-0xB */
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uint32_t srcaddr; /* 0xC-0xF */
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uint32_t destaddr; /* 0x10-0x13 */
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uint32_t execaddr; /* 0x14-0x17 */
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uint8_t options; /* 0x18 */
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uint8_t nandblocksize; /* 0x19 */
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uint8_t nandbadblklocation; /* 0x1A */
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uint8_t reserved4; /* 0x1B */
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uint16_t reserved5; /* 0x1C-0x1D */
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uint8_t ext; /* 0x1E */
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uint8_t checksum; /* 0x1F */
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} __packed;
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#ifdef CONFIG_SPL_MMC_SUPPORT
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u32 spl_mmc_boot_mode(const u32 boot_device)
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{
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return MMCSD_MODE_RAW;
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}
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#endif
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int spl_parse_board_header(struct spl_image_info *spl_image,
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const void *image_header, size_t size)
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{
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const struct kwbimage_main_hdr_v1 *mhdr = image_header;
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if (size < sizeof(*mhdr)) {
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/* This should be compile time assert */
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printf("FATAL ERROR: Image header size is too small\n");
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hang();
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}
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/*
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* Very basic check for image validity. We cannot check mhdr->checksum
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* as it is calculated also from variable length extended headers
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* (including SPL content) which is not included in U-Boot image_header.
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*/
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if (mhdr->version != 1 ||
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((mhdr->headersz_msb << 16) | mhdr->headersz_lsb) < sizeof(*mhdr) ||
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(
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#ifdef CONFIG_SPL_SPI_FLASH_SUPPORT
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mhdr->blockid != IBR_HDR_SPI_ID &&
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#endif
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#ifdef CONFIG_SPL_SATA_SUPPORT
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mhdr->blockid != IBR_HDR_SATA_ID &&
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#endif
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#ifdef CONFIG_SPL_MMC_SUPPORT
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mhdr->blockid != IBR_HDR_SDIO_ID &&
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#endif
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1
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)) {
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printf("ERROR: Not valid SPI/NAND/SATA/SDIO kwbimage v1\n");
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return -EINVAL;
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}
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spl_image->offset = mhdr->srcaddr;
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#ifdef CONFIG_SPL_SATA_SUPPORT
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/*
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* For SATA srcaddr is specified in number of sectors.
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* The main header is must be stored at sector number 1.
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* This expects that sector size is 512 bytes and recalculates
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* data offset to bytes relative to the main header.
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*/
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if (mhdr->blockid == IBR_HDR_SATA_ID) {
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if (spl_image->offset < 1) {
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printf("ERROR: Wrong SATA srcaddr in kwbimage\n");
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return -EINVAL;
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}
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spl_image->offset -= 1;
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spl_image->offset *= 512;
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}
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#endif
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#ifdef CONFIG_SPL_MMC_SUPPORT
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/*
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* For SDIO (eMMC) srcaddr is specified in number of sectors.
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* This expects that sector size is 512 bytes and recalculates
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* data offset to bytes.
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*/
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if (mhdr->blockid == IBR_HDR_SDIO_ID)
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spl_image->offset *= 512;
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#endif
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spl_image->size = mhdr->blocksize;
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spl_image->entry_point = mhdr->execaddr;
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spl_image->load_addr = mhdr->destaddr;
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spl_image->os = IH_OS_U_BOOT;
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spl_image->name = "U-Boot";
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return 0;
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}
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static u32 get_boot_device(void)
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{
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u32 val;
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boot_device = (val & BOOT_DEV_SEL_MASK) >> BOOT_DEV_SEL_OFFS;
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debug("SAR_REG=0x%08x boot_device=0x%x\n", val, boot_device);
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switch (boot_device) {
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#if defined(CONFIG_ARMADA_38X)
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#ifdef BOOT_FROM_NAND
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case BOOT_FROM_NAND:
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return BOOT_DEVICE_NAND;
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#endif
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#ifdef CONFIG_SPL_MMC_SUPPORT
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#ifdef BOOT_FROM_MMC
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case BOOT_FROM_MMC:
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case BOOT_FROM_MMC_ALT:
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return BOOT_DEVICE_MMC1;
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return BOOT_DEVICE_SATA;
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#endif
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case BOOT_FROM_SPI:
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default:
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return BOOT_DEVICE_SPI;
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default:
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return BOOT_DEVICE_BOOTROM;
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};
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}
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#else
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static u32 get_boot_device(void)
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{
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return BOOT_DEVICE_BOOTROM;
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}
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#endif
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u32 spl_boot_device(void)
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{
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u32 boot_device = get_boot_device();
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switch (boot_device) {
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/*
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* Return to the BootROM to continue the Marvell xmodem
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* UART boot protocol. As initiated by the kwboot tool.
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* SPL has no chance to receive this information. So we
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* need to return to the BootROM to enable this xmodem
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* UART download. Use SPL infrastructure to return to BootROM.
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*
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* If booting from NAND lets let the BootROM load the
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* rest of the bootloader.
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*/
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switch (boot_device) {
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case BOOT_DEVICE_UART:
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#if defined(CONFIG_ARMADA_38X)
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case BOOT_DEVICE_NAND:
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#endif
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return BOOT_DEVICE_BOOTROM;
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/*
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* If SPL is compiled with chosen boot_device support
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* then use SPL driver for loading U-Boot proper.
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*/
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#ifdef CONFIG_SPL_MMC_SUPPORT
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case BOOT_DEVICE_MMC1:
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return BOOT_DEVICE_MMC1;
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#endif
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#ifdef CONFIG_SPL_SATA_SUPPORT
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case BOOT_FROM_SATA:
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return BOOT_FROM_SATA;
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#endif
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#ifdef CONFIG_SPL_SPI_FLASH_SUPPORT
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case BOOT_DEVICE_SPI:
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return BOOT_DEVICE_SPI;
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#endif
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/*
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* If SPL is not compiled with chosen boot_device support
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* then return to the BootROM. BootROM supports loading
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* U-Boot proper from any valid boot_device present in SAR
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* register.
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*/
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default:
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return boot_device;
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return BOOT_DEVICE_BOOTROM;
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}
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}
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@ -16,9 +16,4 @@ config ENV_SECT_SIZE
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# Use optimistic 64 KiB erase block, will vary between actual media
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default 0x10000 if MVEBU_SPL_BOOT_DEVICE_MMC || MVEBU_SPL_BOOT_DEVICE_UART
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config SYS_SPI_U_BOOT_OFFS
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hex "address of u-boot payload in SPI flash"
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default 0x20000
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depends on MVEBU_SPL_BOOT_DEVICE_SPI
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endmenu
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# Use optimistic 64 KiB erase block, will vary between actual media
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default 0x10000 if MVEBU_SPL_BOOT_DEVICE_MMC || MVEBU_SPL_BOOT_DEVICE_UART
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config SYS_SPI_U_BOOT_OFFS
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hex "address of u-boot payload in SPI flash"
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default 0x20000
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depends on MVEBU_SPL_BOOT_DEVICE_SPI
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endmenu
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@ -344,7 +344,7 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
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default 0x75 if ARCH_DAVINCI
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default 0x8a if ARCH_MX6 || ARCH_MX7
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default 0x100 if ARCH_UNIPHIER
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default 0x140 if ARCH_MVEBU
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default 0x0 if ARCH_MVEBU
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default 0x200 if ARCH_SOCFPGA || ARCH_AT91
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default 0x300 if ARCH_ZYNQ || ARCH_KEYSTONE || OMAP34XX || OMAP44XX || \
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OMAP54XX || AM33XX || AM43XX || ARCH_K3
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config SPL_SATA_RAW_U_BOOT_USE_SECTOR
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bool "SATA raw mode: by sector"
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depends on SPL_SATA_SUPPORT
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default y if ARCH_MVEBU
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help
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Use sector number for specifying U-Boot location on SATA disk in
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raw mode.
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@ -1106,6 +1107,7 @@ config SPL_SATA_RAW_U_BOOT_USE_SECTOR
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config SPL_SATA_RAW_U_BOOT_SECTOR
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hex "Sector on the SATA disk to load U-Boot from"
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depends on SPL_SATA_RAW_U_BOOT_USE_SECTOR
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default 0x1 if ARCH_MVEBU
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help
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Sector on the SATA disk to load U-Boot from, when the SATA disk is being
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used in raw mode. Units: SATA disk sectors (1 sector = 512 bytes).
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@ -24,7 +24,6 @@ CONFIG_USE_PREBOOT=y
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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# CONFIG_DISPLAY_BOARDINFO is not set
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET=0x1
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CONFIG_SPL_I2C=y
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CONFIG_CMD_TLV_EEPROM=y
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CONFIG_SPL_CMD_TLV_EEPROM=y
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@ -9,7 +9,6 @@ CONFIG_TARGET_CONTROLCENTERDC=y
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CONFIG_ENV_SIZE=0x10000
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CONFIG_ENV_OFFSET=0x100000
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CONFIG_ENV_SECT_SIZE=0x40000
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CONFIG_SYS_SPI_U_BOOT_OFFS=0x30000
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CONFIG_DM_GPIO=y
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CONFIG_DEFAULT_DEVICE_TREE="armada-38x-controlcenterdc"
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CONFIG_SPL_TEXT_BASE=0x40000030
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@ -10,7 +10,6 @@ CONFIG_TARGET_DB_88F6720=y
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CONFIG_ENV_SIZE=0x10000
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CONFIG_ENV_OFFSET=0x100000
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CONFIG_ENV_SECT_SIZE=0x10000
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CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
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CONFIG_DEFAULT_DEVICE_TREE="armada-375-db"
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CONFIG_SPL_TEXT_BASE=0x40004030
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CONFIG_SPL_SERIAL_SUPPORT=y
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@ -10,7 +10,6 @@ CONFIG_TARGET_DB_88F6820_AMC=y
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CONFIG_ENV_SIZE=0x10000
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CONFIG_ENV_OFFSET=0x100000
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CONFIG_ENV_SECT_SIZE=0x40000
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CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
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CONFIG_DEFAULT_DEVICE_TREE="armada-385-db-88f6820-amc"
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CONFIG_SPL_TEXT_BASE=0x40000030
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CONFIG_SPL_SERIAL_SUPPORT=y
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@ -10,7 +10,6 @@ CONFIG_TARGET_DB_88F6820_GP=y
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CONFIG_ENV_SIZE=0x10000
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CONFIG_ENV_OFFSET=0x100000
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CONFIG_ENV_SECT_SIZE=0x40000
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CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
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CONFIG_DEFAULT_DEVICE_TREE="armada-388-gp"
|
||||
CONFIG_SPL_TEXT_BASE=0x40000030
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
|
@ -24,7 +23,6 @@ CONFIG_USE_PREBOOT=y
|
|||
CONFIG_SYS_CONSOLE_INFO_QUIET=y
|
||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
CONFIG_DISPLAY_BOARDINFO_LATE=y
|
||||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_MMC=y
|
||||
|
|
|
@ -10,7 +10,6 @@ CONFIG_TARGET_DB_MV784MP_GP=y
|
|||
CONFIG_ENV_SIZE=0x10000
|
||||
CONFIG_ENV_OFFSET=0x100000
|
||||
CONFIG_ENV_SECT_SIZE=0x10000
|
||||
CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
|
||||
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-gp"
|
||||
CONFIG_SPL_TEXT_BASE=0x40004030
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
|
|
|
@ -10,7 +10,6 @@ CONFIG_TARGET_DS414=y
|
|||
CONFIG_ENV_SIZE=0x10000
|
||||
CONFIG_ENV_OFFSET=0x7E0000
|
||||
CONFIG_ENV_SECT_SIZE=0x10000
|
||||
CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
|
||||
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-synology-ds414"
|
||||
CONFIG_SPL_TEXT_BASE=0x40004030
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
|
|
|
@ -24,7 +24,6 @@ CONFIG_USE_PREBOOT=y
|
|||
CONFIG_SYS_CONSOLE_INFO_QUIET=y
|
||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
CONFIG_DISPLAY_BOARDINFO_LATE=y
|
||||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET=0x1
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_CMD_TLV_EEPROM=y
|
||||
CONFIG_SPL_CMD_TLV_EEPROM=y
|
||||
|
|
|
@ -10,7 +10,6 @@ CONFIG_TARGET_MAXBCM=y
|
|||
CONFIG_ENV_SIZE=0x10000
|
||||
CONFIG_ENV_OFFSET=0x100000
|
||||
CONFIG_ENV_SECT_SIZE=0x10000
|
||||
CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
|
||||
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-maxbcm"
|
||||
CONFIG_SPL_TEXT_BASE=0x40004030
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
|
|
|
@ -10,7 +10,6 @@ CONFIG_TARGET_THEADORABLE=y
|
|||
CONFIG_ENV_SIZE=0x10000
|
||||
CONFIG_ENV_OFFSET=0x100000
|
||||
CONFIG_ENV_SECT_SIZE=0x40000
|
||||
CONFIG_SYS_SPI_U_BOOT_OFFS=0x1a000
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-theadorable"
|
||||
CONFIG_SPL_TEXT_BASE=0x40004030
|
||||
|
|
|
@ -14,7 +14,6 @@ CONFIG_TARGET_TURRIS_OMNIA=y
|
|||
CONFIG_ENV_SIZE=0x10000
|
||||
CONFIG_ENV_OFFSET=0xF0000
|
||||
CONFIG_ENV_SECT_SIZE=0x10000
|
||||
CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="armada-385-turris-omnia"
|
||||
CONFIG_SPL_TEXT_BASE=0x40000030
|
||||
|
|
|
@ -10,7 +10,6 @@ CONFIG_TARGET_X530=y
|
|||
CONFIG_ENV_SIZE=0x10000
|
||||
CONFIG_ENV_OFFSET=0x100000
|
||||
CONFIG_ENV_SECT_SIZE=0x40000
|
||||
CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="armada-385-atl-x530"
|
||||
CONFIG_SPL_TEXT_BASE=0x40000030
|
||||
|
|
|
@ -71,11 +71,10 @@
|
|||
|
||||
#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI)
|
||||
/* SPL related SPI defines */
|
||||
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
|
||||
#define CONFIG_SYS_U_BOOT_OFFS 0x20000
|
||||
#elif defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA)
|
||||
/* SPL related MMC defines */
|
||||
#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
|
||||
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
|
||||
#define CONFIG_SYS_U_BOOT_OFFS (160 << 10)
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
|
||||
#endif
|
||||
|
|
|
@ -87,16 +87,13 @@
|
|||
|
||||
#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
|
||||
/* SPL related SPI defines */
|
||||
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
|
||||
#define CONFIG_SYS_U_BOOT_OFFS 0x30000
|
||||
#endif
|
||||
|
||||
#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
|
||||
/* SPL related MMC defines */
|
||||
#define CONFIG_SPL_MMC_SUPPORT
|
||||
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1
|
||||
#define CONFIG_SYS_MMC_U_BOOT_OFFS (168 << 10)
|
||||
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
|
||||
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (CONFIG_SYS_U_BOOT_OFFS / 512)
|
||||
#define CONFIG_SYS_U_BOOT_OFFS (168 << 10)
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
|
||||
#endif
|
||||
|
|
|
@ -66,6 +66,6 @@
|
|||
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
|
||||
|
||||
/* SPL related SPI defines */
|
||||
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
|
||||
#define CONFIG_SYS_U_BOOT_OFFS 0x20000
|
||||
|
||||
#endif /* _CONFIG_DB_88F6720_H */
|
||||
|
|
|
@ -61,7 +61,7 @@
|
|||
|
||||
#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
|
||||
/* SPL related SPI defines */
|
||||
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
|
||||
#define CONFIG_SYS_U_BOOT_OFFS 0x24000
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
|
|
@ -73,13 +73,12 @@
|
|||
|
||||
#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
|
||||
/* SPL related SPI defines */
|
||||
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
|
||||
#define CONFIG_SYS_U_BOOT_OFFS 0x24000
|
||||
#endif
|
||||
|
||||
#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
|
||||
/* SPL related MMC defines */
|
||||
#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
|
||||
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
|
||||
#define CONFIG_SYS_U_BOOT_OFFS (160 << 10)
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
|
||||
#endif
|
||||
|
|
|
@ -79,7 +79,7 @@
|
|||
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
|
||||
|
||||
/* SPL related SPI defines */
|
||||
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
|
||||
#define CONFIG_SYS_U_BOOT_OFFS 0x20000
|
||||
|
||||
/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
|
||||
#define CONFIG_SPD_EEPROM 0x4e
|
||||
|
|
|
@ -70,7 +70,7 @@
|
|||
|
||||
#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI)
|
||||
/* SPL related SPI defines */
|
||||
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
|
||||
#define CONFIG_SYS_U_BOOT_OFFS 0x24000
|
||||
#endif
|
||||
|
||||
/* DS414 bus width is 32bits */
|
||||
|
|
|
@ -71,11 +71,10 @@
|
|||
|
||||
#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI)
|
||||
/* SPL related SPI defines */
|
||||
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
|
||||
#define CONFIG_SYS_U_BOOT_OFFS 0x20000
|
||||
#elif defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA)
|
||||
/* SPL related MMC defines */
|
||||
#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
|
||||
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
|
||||
#define CONFIG_SYS_U_BOOT_OFFS (160 << 10)
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
|
||||
#endif
|
||||
|
|
|
@ -94,7 +94,7 @@
|
|||
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
|
||||
|
||||
/* SPL related SPI defines */
|
||||
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
|
||||
#define CONFIG_SYS_U_BOOT_OFFS 0x1a000
|
||||
|
||||
/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
|
||||
#define CONFIG_DDR_FIXED_SIZE (2 << 20) /* 2GiB */
|
||||
|
|
|
@ -47,13 +47,12 @@
|
|||
|
||||
#ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI
|
||||
/* SPL related SPI defines */
|
||||
# define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
|
||||
# define CONFIG_SYS_U_BOOT_OFFS 0x24000
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC
|
||||
/* SPL related MMC defines */
|
||||
# define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
|
||||
# define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
|
||||
# define CONFIG_SYS_U_BOOT_OFFS (160 << 10)
|
||||
# ifdef CONFIG_SPL_BUILD
|
||||
# define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
|
||||
# endif
|
||||
|
|
|
@ -98,6 +98,6 @@
|
|||
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
|
||||
|
||||
/* SPL related SPI defines */
|
||||
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
|
||||
#define CONFIG_SYS_U_BOOT_OFFS 0x24000
|
||||
|
||||
#endif /* _CONFIG_X530_H */
|
||||
|
|
Loading…
Reference in a new issue