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riscv: k210: Use AI as the parent clock of aisram, not PLL1

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Testing showed that disabling AI while leaving PLL1 enabled disabled the
aisram. This suggests that AI is a more appropriate clock for that ram
bank.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
This commit is contained in:
Sean Anderson 2021-04-08 22:13:12 -04:00 committed by Leo Yu-Chi Liang
parent 2d64e3829b
commit 2111f4e8bf
1 changed files with 1 additions and 1 deletions
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arch/riscv/dts/k210.dtsi
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@ -89,7 +89,7 @@
reg-names = "sram0", "sram1", "aisram";
clocks = <&sysclk K210_CLK_SRAM0>,
<&sysclk K210_CLK_SRAM1>,
<&sysclk K210_CLK_PLL1>;
<&sysclk K210_CLK_AI>;
clock-names = "sram0", "sram1", "aisram";
u-boot,dm-pre-reloc;
};