tegra: spi: Support slow SPI rates

Use the oscillator as the source clock when we cannot achieve a low-enough
speed with the peripheral clock. This happens when we request 3MHz on a SPI
clock, for example.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This commit is contained in:
Simon Glass 2015-06-05 14:39:35 -06:00 committed by Tom Warren
parent b3b9d7ca32
commit 20edd1ac7a

View file

@ -144,6 +144,7 @@ static int tegra114_spi_probe(struct udevice *bus)
struct tegra_spi_platdata *plat = dev_get_platdata(bus);
struct tegra114_spi_priv *priv = dev_get_priv(bus);
struct spi_regs *regs;
ulong rate;
priv->regs = (struct spi_regs *)plat->base;
regs = priv->regs;
@ -152,9 +153,20 @@ static int tegra114_spi_probe(struct udevice *bus)
priv->freq = plat->frequency;
priv->periph_id = plat->periph_id;
/* Change SPI clock to correct frequency, PLLP_OUT0 source */
clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH,
priv->freq);
/*
* Change SPI clock to correct frequency, PLLP_OUT0 source, falling
* back to the oscillator if that is too fast.
*/
rate = clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH,
priv->freq);
if (rate > priv->freq + 100000) {
rate = clock_start_periph_pll(priv->periph_id, CLOCK_ID_OSC,
priv->freq);
if (rate != priv->freq) {
printf("Warning: SPI '%s' requested clock %u, actual clock %lu\n",
bus->name, priv->freq, rate);
}
}
/* Clear stale status here */
setbits_le32(&regs->fifo_status,