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tegra: spi: Support slow SPI rates
Use the oscillator as the source clock when we cannot achieve a low-enough speed with the peripheral clock. This happens when we request 3MHz on a SPI clock, for example. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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1 changed files with 15 additions and 3 deletions
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@ -144,6 +144,7 @@ static int tegra114_spi_probe(struct udevice *bus)
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struct tegra_spi_platdata *plat = dev_get_platdata(bus);
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struct tegra114_spi_priv *priv = dev_get_priv(bus);
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struct spi_regs *regs;
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ulong rate;
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priv->regs = (struct spi_regs *)plat->base;
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regs = priv->regs;
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@ -152,9 +153,20 @@ static int tegra114_spi_probe(struct udevice *bus)
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priv->freq = plat->frequency;
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priv->periph_id = plat->periph_id;
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/* Change SPI clock to correct frequency, PLLP_OUT0 source */
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clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH,
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priv->freq);
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/*
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* Change SPI clock to correct frequency, PLLP_OUT0 source, falling
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* back to the oscillator if that is too fast.
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*/
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rate = clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH,
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priv->freq);
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if (rate > priv->freq + 100000) {
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rate = clock_start_periph_pll(priv->periph_id, CLOCK_ID_OSC,
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priv->freq);
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if (rate != priv->freq) {
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printf("Warning: SPI '%s' requested clock %u, actual clock %lu\n",
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bus->name, priv->freq, rate);
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}
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}
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/* Clear stale status here */
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setbits_le32(®s->fifo_status,
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