mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 23:24:38 +00:00
Merged serial_pl010.c and serial_pl011.c.
They only differ in the init function. This also adds the missing watchdog support for the PL011. Signed-off-by: Andreas Engel <andreas.engel@ericsson.com>
This commit is contained in:
Andreas Engel
Wolfgang Denk
parent
0817d688f3
commit
20c9226cb8
4 changed files with 69 additions and 178 deletions
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@ -33,8 +33,7 @@ COBJS-$(CONFIG_DRIVER_S3C4510_UART) += s3c4510b_uart.o
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COBJS-$(CONFIG_S3C64XX) += s3c64xx.o
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COBJS-y += serial.o
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COBJS-$(CONFIG_MAX3100_SERIAL) += serial_max3100.o
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COBJS-y += serial_pl010.o
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COBJS-y += serial_pl011.o
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COBJS-y += serial_pl01x.o
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COBJS-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o
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COBJS-$(CONFIG_SCIF_CONSOLE) += serial_sh.o
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COBJS-$(CONFIG_USB_TTY) += usbtty.o
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@ -1,161 +0,0 @@
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/*
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* (C) Copyright 2000
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* Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
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*
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* (C) Copyright 2004
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* ARM Ltd.
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* Philippe Robin, <philippe.robin@arm.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/* Simple U-Boot driver for the PrimeCell PL011 UARTs on the IntegratorCP */
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/* Should be fairly simple to make it work with the PL010 as well */
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#include <common.h>
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#ifdef CFG_PL011_SERIAL
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#include "serial_pl011.h"
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#define IO_WRITE(addr, val) (*(volatile unsigned int *)(addr) = (val))
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#define IO_READ(addr) (*(volatile unsigned int *)(addr))
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/*
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* IntegratorCP has two UARTs, use the first one, at 38400-8-N-1
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* Versatile PB has four UARTs.
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*/
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#define CONSOLE_PORT CONFIG_CONS_INDEX
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#define baudRate CONFIG_BAUDRATE
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static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS;
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#define NUM_PORTS (sizeof(port)/sizeof(port[0]))
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static void pl011_putc (int portnum, char c);
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static int pl011_getc (int portnum);
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static int pl011_tstc (int portnum);
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int serial_init (void)
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{
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unsigned int temp;
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unsigned int divider;
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unsigned int remainder;
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unsigned int fraction;
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/*
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** First, disable everything.
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*/
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IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR, 0x0);
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/*
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** Set baud rate
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**
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** IBRD = UART_CLK / (16 * BAUD_RATE)
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** FBRD = ROUND((64 * MOD(UART_CLK,(16 * BAUD_RATE))) / (16 * BAUD_RATE))
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*/
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temp = 16 * baudRate;
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divider = CONFIG_PL011_CLOCK / temp;
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remainder = CONFIG_PL011_CLOCK % temp;
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temp = (8 * remainder) / baudRate;
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fraction = (temp >> 1) + (temp & 1);
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IO_WRITE (port[CONSOLE_PORT] + UART_PL011_IBRD, divider);
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IO_WRITE (port[CONSOLE_PORT] + UART_PL011_FBRD, fraction);
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/*
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** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled.
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*/
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IO_WRITE (port[CONSOLE_PORT] + UART_PL011_LCRH,
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(UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN));
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/*
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** Finally, enable the UART
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*/
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IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR,
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(UART_PL011_CR_UARTEN | UART_PL011_CR_TXE |
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UART_PL011_CR_RXE));
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return 0;
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}
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void serial_putc (const char c)
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{
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if (c == '\n')
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pl011_putc (CONSOLE_PORT, '\r');
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pl011_putc (CONSOLE_PORT, c);
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}
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void serial_puts (const char *s)
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{
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while (*s) {
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serial_putc (*s++);
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}
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}
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int serial_getc (void)
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{
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return pl011_getc (CONSOLE_PORT);
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}
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int serial_tstc (void)
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{
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return pl011_tstc (CONSOLE_PORT);
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}
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void serial_setbrg (void)
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{
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}
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static void pl011_putc (int portnum, char c)
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{
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/* Wait until there is space in the FIFO */
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while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF);
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/* Send the character */
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IO_WRITE (port[portnum] + UART_PL01x_DR, c);
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}
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static int pl011_getc (int portnum)
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{
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unsigned int data;
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/* Wait until there is data in the FIFO */
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while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_RXFE);
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data = IO_READ (port[portnum] + UART_PL01x_DR);
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/* Check for an error flag */
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if (data & 0xFFFFFF00) {
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/* Clear the error */
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IO_WRITE (port[portnum] + UART_PL01x_ECR, 0xFFFFFFFF);
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return -1;
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}
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return (int) data;
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}
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static int pl011_tstc (int portnum)
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{
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return !(IO_READ (port[portnum] + UART_PL01x_FR) &
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UART_PL01x_FR_RXFE);
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}
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#endif
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@ -31,24 +31,28 @@
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#include <common.h>
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#include <watchdog.h>
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#ifdef CFG_PL010_SERIAL
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#if defined(CFG_PL010_SERIAL) || defined(CFG_PL011_SERIAL)
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#include "serial_pl011.h"
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#include "serial_pl01x.h"
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#define IO_WRITE(addr, val) (*(volatile unsigned int *)(addr) = (val))
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#define IO_READ(addr) (*(volatile unsigned int *)(addr))
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/* Integrator AP has two UARTs, we use the first one, at 38400-8-N-1 */
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/*
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* Integrator AP has two UARTs, we use the first one, at 38400-8-N-1
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* Integrator CP has two UARTs, use the first one, at 38400-8-N-1
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* Versatile PB has four UARTs.
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*/
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#define CONSOLE_PORT CONFIG_CONS_INDEX
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#define baudRate CONFIG_BAUDRATE
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static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS;
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#define NUM_PORTS (sizeof(port)/sizeof(port[0]))
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static void pl01x_putc (int portnum, char c);
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static int pl01x_getc (int portnum);
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static int pl01x_tstc (int portnum);
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static void pl010_putc (int portnum, char c);
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static int pl010_getc (int portnum);
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static int pl010_tstc (int portnum);
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#ifdef CFG_PL010_SERIAL
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int serial_init (void)
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{
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@ -103,15 +107,64 @@ int serial_init (void)
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*/
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IO_WRITE (port[CONSOLE_PORT] + UART_PL010_CR, (UART_PL010_CR_UARTEN));
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return (0);
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return 0;
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}
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#endif /* CFG_PL010_SERIAL */
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#ifdef CFG_PL011_SERIAL
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int serial_init (void)
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{
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unsigned int temp;
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unsigned int divider;
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unsigned int remainder;
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unsigned int fraction;
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/*
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** First, disable everything.
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*/
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IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR, 0x0);
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/*
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** Set baud rate
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**
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** IBRD = UART_CLK / (16 * BAUD_RATE)
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** FBRD = ROUND((64 * MOD(UART_CLK,(16 * BAUD_RATE))) / (16 * BAUD_RATE))
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*/
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temp = 16 * baudRate;
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divider = CONFIG_PL011_CLOCK / temp;
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remainder = CONFIG_PL011_CLOCK % temp;
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temp = (8 * remainder) / baudRate;
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fraction = (temp >> 1) + (temp & 1);
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IO_WRITE (port[CONSOLE_PORT] + UART_PL011_IBRD, divider);
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IO_WRITE (port[CONSOLE_PORT] + UART_PL011_FBRD, fraction);
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/*
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** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled.
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*/
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IO_WRITE (port[CONSOLE_PORT] + UART_PL011_LCRH,
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(UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN));
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/*
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** Finally, enable the UART
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*/
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IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR,
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(UART_PL011_CR_UARTEN | UART_PL011_CR_TXE |
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UART_PL011_CR_RXE));
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return 0;
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}
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#endif /* CFG_PL011_SERIAL */
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void serial_putc (const char c)
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{
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if (c == '\n')
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pl010_putc (CONSOLE_PORT, '\r');
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pl01x_putc (CONSOLE_PORT, '\r');
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pl010_putc (CONSOLE_PORT, c);
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pl01x_putc (CONSOLE_PORT, c);
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}
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void serial_puts (const char *s)
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@ -123,19 +176,19 @@ void serial_puts (const char *s)
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int serial_getc (void)
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{
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return pl010_getc (CONSOLE_PORT);
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return pl01x_getc (CONSOLE_PORT);
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}
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int serial_tstc (void)
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{
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return pl010_tstc (CONSOLE_PORT);
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return pl01x_tstc (CONSOLE_PORT);
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}
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void serial_setbrg (void)
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{
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}
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static void pl010_putc (int portnum, char c)
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static void pl01x_putc (int portnum, char c)
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{
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/* Wait until there is space in the FIFO */
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while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF)
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@ -145,7 +198,7 @@ static void pl010_putc (int portnum, char c)
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IO_WRITE (port[portnum] + UART_PL01x_DR, c);
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}
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static int pl010_getc (int portnum)
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static int pl01x_getc (int portnum)
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{
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unsigned int data;
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@ -165,7 +218,7 @@ static int pl010_getc (int portnum)
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return (int) data;
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}
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static int pl010_tstc (int portnum)
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static int pl01x_tstc (int portnum)
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{
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WATCHDOG_RESET();
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return !(IO_READ (port[portnum] + UART_PL01x_FR) &
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