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Merge branch 'master' of git://git.denx.de/u-boot-uniphier

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This commit is contained in:
Tom Rini 2016-07-01 17:43:06 -04:00
commit 20a41043fb
38 changed files with 714 additions and 454 deletions
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22
arch/arm/dts/uniphier-common32.dtsi
View file

@ -22,6 +22,7 @@
#size-cells = <1>;
ranges;
interrupt-parent = <&intc>;
u-boot,dm-pre-reloc;
serial0: serial@54006800 {
compatible = "socionext,uniphier-uart";
@ -65,9 +66,12 @@
system_bus: system-bus@58c00000 {
compatible = "socionext,uniphier-system-bus";
status = "disabled";
reg = <0x58c00000 0x400>;
#address-cells = <2>;
#size-cells = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_system_bus>;
};
smpctrl@59800000 {
@ -109,9 +113,15 @@
interrupt-controller;
};
pinctrl: pinctrl@5f801000 {
/* specify compatible in each SoC DTSI */
reg = <0x5f801000 0xe00>;
soc-glue@5f800000 {
compatible = "simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
u-boot,dm-pre-reloc;
pinctrl: pinctrl {
/* specify compatible in each SoC DTSI */
u-boot,dm-pre-reloc;
};
};
sysctrl: sysctrl@61840000 {
@ -124,8 +134,12 @@
nand: nand@68000000 {
compatible = "denali,denali-nand-dt";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;
status = "disabled";
reg-names = "nand_data", "denali_reg";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;
interrupts = <0 65 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;
};
};
};

13
arch/arm/dts/uniphier-ph1-ld11-ref.dts
View file

@ -1,7 +1,8 @@
/*
* Device Tree Source for UniPhier PH1-LD11 Reference Board
*
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
* Copyright (C) 2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+ X11
*/
@ -62,20 +63,10 @@
};
/* for U-Boot only */
/ {
soc {
u-boot,dm-pre-reloc;
};
};
&serial0 {
u-boot,dm-pre-reloc;
};
&pinctrl {
u-boot,dm-pre-reloc;
};
&pinctrl_uart0 {
u-boot,dm-pre-reloc;
};

50
arch/arm/dts/uniphier-ph1-ld11.dtsi
View file

@ -1,11 +1,14 @@
/*
* Device Tree Source for UniPhier PH1-LD11 SoC
*
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
* Copyright (C) 2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/memreserve/ 0x80000000 0x00000008; /* cpu-release-addr */
/ {
compatible = "socionext,ph1-ld11";
#address-cells = <2>;
@ -16,24 +19,41 @@
#address-cells = <2>;
#size-cells = <0>;
cpu@0 {
cpu-map {
cluster0 {
core0 {
cpu = <&cpu0>;
};
core1 {
cpu = <&cpu1>;
};
};
};
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0 0x000>;
enable-method = "spin-table";
cpu-release-addr = <0 0x80000100>;
cpu-release-addr = <0 0x80000000>;
};
cpu@1 {
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0 0x001>;
enable-method = "spin-table";
cpu-release-addr = <0 0x80000100>;
cpu-release-addr = <0 0x80000000>;
};
};
clocks {
refclk: ref {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
uart_clk: uart_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
@ -60,6 +80,7 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0 0xffffffff>;
u-boot,dm-pre-reloc;
serial0: serial@54006800 {
compatible = "socionext,uniphier-uart";
@ -183,6 +204,8 @@
reg = <0x58c00000 0x400>;
#address-cells = <2>;
#size-cells = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_system_bus>;
};
smpctrl@59800000 {
@ -226,9 +249,20 @@
#clock-cells = <1>;
};
pinctrl: pinctrl@5f801000 {
compatible = "socionext,ph1-ld11-pinctrl", "syscon";
reg = <0x5f801000 0xe00>;
soc-glue@5f800000 {
compatible = "simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
u-boot,dm-pre-reloc;
pinctrl: pinctrl {
compatible = "socionext,uniphier-ld11-pinctrl";
u-boot,dm-pre-reloc;
};
};
aidet@5fc20000 {
compatible = "simple-mfd", "syscon";
reg = <0x5fc20000 0x200>;
};
gic: interrupt-controller@5fe00000 {

10
arch/arm/dts/uniphier-ph1-ld20-ref.dts
View file

@ -51,20 +51,10 @@
};
/* for U-Boot only */
/ {
soc {
u-boot,dm-pre-reloc;
};
};
&serial0 {
u-boot,dm-pre-reloc;
};
&pinctrl {
u-boot,dm-pre-reloc;
};
&pinctrl_uart0 {
u-boot,dm-pre-reloc;
};

36
arch/arm/dts/uniphier-ph1-ld20.dtsi
View file

@ -6,6 +6,8 @@
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/memreserve/ 0x80000000 0x00000008; /* cpu-release-addr */
/ {
compatible = "socionext,ph1-ld20";
#address-cells = <2>;
@ -41,7 +43,7 @@
compatible = "arm,cortex-a72", "arm,armv8";
reg = <0 0x000>;
enable-method = "spin-table";
cpu-release-addr = <0 0x80000100>;
cpu-release-addr = <0 0x80000000>;
};
cpu1: cpu@1 {
@ -49,7 +51,7 @@
compatible = "arm,cortex-a72", "arm,armv8";
reg = <0 0x001>;
enable-method = "spin-table";
cpu-release-addr = <0 0x80000100>;
cpu-release-addr = <0 0x80000000>;
};
cpu2: cpu@100 {
@ -57,7 +59,7 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0 0x100>;
enable-method = "spin-table";
cpu-release-addr = <0 0x80000100>;
cpu-release-addr = <0 0x80000000>;
};
cpu3: cpu@101 {
@ -65,11 +67,17 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0 0x101>;
enable-method = "spin-table";
cpu-release-addr = <0 0x80000100>;
cpu-release-addr = <0 0x80000000>;
};
};
clocks {
refclk: ref {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
uart_clk: uart_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
@ -96,6 +104,7 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0 0xffffffff>;
u-boot,dm-pre-reloc;
serial0: serial@54006800 {
compatible = "socionext,uniphier-uart";
@ -219,6 +228,8 @@
reg = <0x58c00000 0x400>;
#address-cells = <2>;
#size-cells = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_system_bus>;
};
smpctrl@59800000 {
@ -243,9 +254,20 @@
bus-width = <4>;
};
pinctrl: pinctrl@5f801000 {
compatible = "socionext,ph1-ld20-pinctrl", "syscon";
reg = <0x5f801000 0xe00>;
soc-glue@5f800000 {
compatible = "simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
u-boot,dm-pre-reloc;
pinctrl: pinctrl {
compatible = "socionext,uniphier-ld20-pinctrl";
u-boot,dm-pre-reloc;
};
};
aidet@5fc20000 {
compatible = "simple-mfd", "syscon";
reg = <0x5fc20000 0x200>;
};
gic: interrupt-controller@5fe00000 {

10
arch/arm/dts/uniphier-ph1-ld4-ref.dts
View file

@ -69,20 +69,10 @@
};
/* for U-Boot only */
/ {
soc {
u-boot,dm-pre-reloc;
};
};
&serial0 {
u-boot,dm-pre-reloc;
};
&pinctrl {
u-boot,dm-pre-reloc;
};
&pinctrl_uart0 {
u-boot,dm-pre-reloc;
};

7
arch/arm/dts/uniphier-ph1-ld4.dtsi
View file

@ -274,6 +274,11 @@
pinctrl-0 = <&pinctrl_usb2>;
clocks = <&mio 5>, <&mio 6>;
};
aidet@61830000 {
compatible = "simple-mfd", "syscon";
reg = <0x61830000 0x200>;
};
};
&refclk {
@ -310,7 +315,7 @@
};
&pinctrl {
compatible = "socionext,ph1-ld4-pinctrl", "syscon";
compatible = "socionext,uniphier-ld4-pinctrl";
};
&sysctrl {

10
arch/arm/dts/uniphier-ph1-ld6b-ref.dts
View file

@ -71,20 +71,10 @@
};
/* for U-Boot only */
/ {
soc {
u-boot,dm-pre-reloc;
};
};
&serial0 {
u-boot,dm-pre-reloc;
};
&pinctrl {
u-boot,dm-pre-reloc;
};
&pinctrl_uart0 {
u-boot,dm-pre-reloc;
};

4
arch/arm/dts/uniphier-ph1-ld6b.dtsi
View file

@ -17,7 +17,7 @@
compatible = "socionext,ph1-ld6b";
};
/* UART3 unavilable: the pads are not wired to the package balls */
/* UART3 unavailable: the pads are not wired to the package balls */
&serial3 {
status = "disabled";
};
@ -27,5 +27,5 @@
* which makes the pinctrl driver unshareable.
*/
&pinctrl {
compatible = "socionext,ph1-ld6b-pinctrl", "syscon";
compatible = "socionext,uniphier-ld6b-pinctrl";
};

10
arch/arm/dts/uniphier-ph1-pro4-ace.dts
View file

@ -90,20 +90,10 @@
};
/* for U-Boot only */
/ {
soc {
u-boot,dm-pre-reloc;
};
};
&serial0 {
u-boot,dm-pre-reloc;
};
&pinctrl {
u-boot,dm-pre-reloc;
};
&pinctrl_uart0 {
u-boot,dm-pre-reloc;
};

10
arch/arm/dts/uniphier-ph1-pro4-ref.dts
View file

@ -80,20 +80,10 @@
};
/* for U-Boot only */
/ {
soc {
u-boot,dm-pre-reloc;
};
};
&serial0 {
u-boot,dm-pre-reloc;
};
&pinctrl {
u-boot,dm-pre-reloc;
};
&pinctrl_uart0 {
u-boot,dm-pre-reloc;
};

10
arch/arm/dts/uniphier-ph1-pro4-sanji.dts
View file

@ -85,12 +85,6 @@
};
/* for U-Boot only */
/ {
soc {
u-boot,dm-pre-reloc;
};
};
&serial0 {
u-boot,dm-pre-reloc;
};
@ -103,10 +97,6 @@
u-boot,dm-pre-reloc;
};
&pinctrl {
u-boot,dm-pre-reloc;
};
&pinctrl_uart0 {
u-boot,dm-pre-reloc;
};

7
arch/arm/dts/uniphier-ph1-pro4.dtsi
View file

@ -400,6 +400,11 @@
clocks = <&mio 4>, <&mio 6>;
};
aidet@5fc20000 {
compatible = "simple-mfd", "syscon";
reg = <0x5fc20000 0x200>;
};
usb0: usb@65a00000 {
compatible = "socionext,uniphier-xhci", "generic-xhci";
status = "disabled";
@ -452,7 +457,7 @@
};
&pinctrl {
compatible = "socionext,ph1-pro4-pinctrl", "syscon";
compatible = "socionext,uniphier-pro4-pinctrl";
};
&sysctrl {

10
arch/arm/dts/uniphier-ph1-pro5-4kbox.dts
View file

@ -56,20 +56,10 @@
};
/* for U-Boot only */
/ {
soc {
u-boot,dm-pre-reloc;
};
};
&serial1 {
u-boot,dm-pre-reloc;
};
&pinctrl {
u-boot,dm-pre-reloc;
};
&pinctrl_uart1 {
u-boot,dm-pre-reloc;
};

7
arch/arm/dts/uniphier-ph1-pro5.dtsi
View file

@ -355,6 +355,11 @@
clock-frequency = <400000>;
};
aidet@5fc20000 {
compatible = "simple-mfd", "syscon";
reg = <0x5fc20000 0x200>;
};
emmc: sdhc@68400000 {
compatible = "socionext,uniphier-sdhc";
status = "disabled";
@ -431,7 +436,7 @@
};
&pinctrl {
compatible = "socionext,ph1-pro5-pinctrl", "syscon";
compatible = "socionext,uniphier-pro5-pinctrl";
};
&sysctrl {

5
arch/arm/dts/uniphier-ph1-sld3.dtsi
View file

@ -349,6 +349,11 @@
clocks = <&mio 7>, <&mio 6>;
};
aidet@f1830000 {
compatible = "simple-mfd", "syscon";
reg = <0xf1830000 0x200>;
};
sysctrl: sysctrl@f1840000 {
compatible = "socionext,ph1-sld3-sysctrl";
reg = <0xf1840000 0x4000>;

10
arch/arm/dts/uniphier-ph1-sld8-ref.dts
View file

@ -73,20 +73,10 @@
};
/* for U-Boot only */
/ {
soc {
u-boot,dm-pre-reloc;
};
};
&serial0 {
u-boot,dm-pre-reloc;
};
&pinctrl {
u-boot,dm-pre-reloc;
};
&pinctrl_uart0 {
u-boot,dm-pre-reloc;
};

7
arch/arm/dts/uniphier-ph1-sld8.dtsi
View file

@ -274,6 +274,11 @@
pinctrl-0 = <&pinctrl_usb2>;
clocks = <&mio 5>, <&mio 6>;
};
aidet@61830000 {
compatible = "simple-mfd", "syscon";
reg = <0x61830000 0x200>;
};
};
&refclk {
@ -310,7 +315,7 @@
};
&pinctrl {
compatible = "socionext,ph1-sld8-pinctrl", "syscon";
compatible = "socionext,uniphier-sld8-pinctrl";
};
&sysctrl {

10
arch/arm/dts/uniphier-pinctrl.dtsi
View file

@ -47,6 +47,11 @@
function = "nand";
};
pinctrl_nand2cs: nand2cs_grp {
groups = "nand", "nand_cs1";
function = "nand";
};
pinctrl_sd: sd_grp {
groups = "sd";
function = "sd";
@ -67,6 +72,11 @@
function = "sd1";
};
pinctrl_system_bus: system_bus_grp {
groups = "system_bus", "system_bus_cs1";
function = "system_bus";
};
pinctrl_uart0: uart0_grp {
groups = "uart0";
function = "uart0";

10
arch/arm/dts/uniphier-proxstream2-gentil.dts
View file

@ -65,12 +65,6 @@
};
/* for U-Boot only */
/ {
soc {
u-boot,dm-pre-reloc;
};
};
&serial2 {
u-boot,dm-pre-reloc;
};
@ -83,10 +77,6 @@
u-boot,dm-pre-reloc;
};
&pinctrl {
u-boot,dm-pre-reloc;
};
&pinctrl_uart2 {
u-boot,dm-pre-reloc;
};

10
arch/arm/dts/uniphier-proxstream2-vodka.dts
View file

@ -50,12 +50,6 @@
};
/* for U-Boot only */
/ {
soc {
u-boot,dm-pre-reloc;
};
};
&serial2 {
u-boot,dm-pre-reloc;
};
@ -68,10 +62,6 @@
u-boot,dm-pre-reloc;
};
&pinctrl {
u-boot,dm-pre-reloc;
};
&pinctrl_uart2 {
u-boot,dm-pre-reloc;
};

7
arch/arm/dts/uniphier-proxstream2.dtsi
View file

@ -383,6 +383,11 @@
bus-width = <4>;
};
aidet@5fc20000 {
compatible = "simple-mfd", "syscon";
reg = <0x5fc20000 0x200>;
};
usb0: usb@65a00000 {
compatible = "socionext,uniphier-xhci", "generic-xhci";
status = "disabled";
@ -435,7 +440,7 @@
};
&pinctrl {
compatible = "socionext,proxstream2-pinctrl", "syscon";
compatible = "socionext,uniphier-pxs2-pinctrl";
};
&sysctrl {

2
arch/arm/dts/uniphier-ref-daughter.dtsi
View file

@ -7,7 +7,7 @@
*/
&i2c0 {
eeprom {
eeprom@50 {
compatible = "microchip,24lc128", "i2c-eeprom";
reg = <0x50>;
u-boot,i2c-offset-len = <2>;

2
arch/arm/mach-uniphier/arm32/lowlevel_init.S
View file

@ -29,7 +29,7 @@ ENTRY(lowlevel_init)
bl debug_ll_init
#endif
bl setup_init_ram @ RAM area for stack and page talbe
bl setup_init_ram @ RAM area for stack and page table
/*
* Now we are using the page table embedded in the Boot ROM.

39
arch/arm/mach-uniphier/board_early_init_f.c
View file

@ -4,10 +4,47 @@
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <libfdt.h>
#include <linux/io.h>
#include "init.h"
#include "micro-support-card.h"
#include "soc-info.h"
DECLARE_GLOBAL_DATA_PTR;
static void uniphier_setup_xirq(void)
{
const void *fdt = gd->fdt_blob;
int soc_node, aidet_node;
const u32 *val;
unsigned long aidet_base;
u32 tmp;
soc_node = fdt_path_offset(fdt, "/soc");
if (soc_node < 0)
return;
aidet_node = fdt_subnode_offset_namelen(fdt, soc_node, "aidet", 5);
if (aidet_node < 0)
return;
val = fdt_getprop(fdt, aidet_node, "reg", NULL);
if (!val)
return;
aidet_base = fdt32_to_cpu(*val);
tmp = readl(aidet_base + 8); /* AIDET DETCONFR2 */
tmp |= 0x00ff0000; /* Set XIRQ0-7 low active */
writel(tmp, aidet_base + 8);
tmp = readl(0x55000090); /* IRQCTL */
tmp |= 0x000000ff;
writel(tmp, 0x55000090);
}
int board_early_init_f(void)
{
led_puts("U0");
@ -81,6 +118,8 @@ int board_early_init_f(void)
break;
}
uniphier_setup_xirq();
led_puts("U2");
return 0;

5
arch/arm/mach-uniphier/pinctrl/pinctrl-ld20.c
View file

@ -43,4 +43,9 @@ void uniphier_ld20_pin_init(void)
sg_set_pinsel(53, 0, 8, 4); /* USB3OD -> USB3OD */
sg_set_iectrl_range(46, 53);
#endif
sg_set_pinsel(149, 14, 8, 4); /* XIRQ0 -> XIRQ0 */
sg_set_iectrl(149);
sg_set_pinsel(153, 14, 8, 4); /* XIRQ4 -> XIRQ4 */
sg_set_iectrl(153);
}

10
drivers/pinctrl/uniphier/Kconfig
View file

@ -39,9 +39,15 @@ config PINCTRL_UNIPHIER_LD6B
default y
select PINCTRL_UNIPHIER
config PINCTRL_UNIPHIER_LD11
bool "UniPhier PH1-LD11 SoC pinctrl driver"
depends on ARCH_UNIPHIER_LD11
default y
select PINCTRL_UNIPHIER
config PINCTRL_UNIPHIER_LD20
bool "UniPhier PH1-LD11/PH1-LD20 SoC pinctrl driver"
depends on ARCH_UNIPHIER_LD11 || ARCH_UNIPHIER_LD20
bool "UniPhier PH1-LD20 SoC pinctrl driver"
depends on ARCH_UNIPHIER_LD20
default y
select PINCTRL_UNIPHIER

1
drivers/pinctrl/uniphier/Makefile
View file

@ -10,4 +10,5 @@ obj-$(CONFIG_PINCTRL_UNIPHIER_SLD8) += pinctrl-uniphier-sld8.o
obj-$(CONFIG_PINCTRL_UNIPHIER_PRO5) += pinctrl-uniphier-pro5.o
obj-$(CONFIG_PINCTRL_UNIPHIER_PXS2) += pinctrl-uniphier-pxs2.o
obj-$(CONFIG_PINCTRL_UNIPHIER_LD6B) += pinctrl-uniphier-ld6b.o
obj-$(CONFIG_PINCTRL_UNIPHIER_LD11) += pinctrl-uniphier-ld11.o
obj-$(CONFIG_PINCTRL_UNIPHIER_LD20) += pinctrl-uniphier-ld20.o

15
drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
View file

@ -14,6 +14,8 @@
#include "pinctrl-uniphier.h"
static const char *uniphier_pinctrl_dummy_name = "_dummy";
static int uniphier_pinctrl_get_groups_count(struct udevice *dev)
{
struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
@ -26,6 +28,9 @@ static const char *uniphier_pinctrl_get_group_name(struct udevice *dev,
{
struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
if (!priv->socdata->groups[selector].name)
return uniphier_pinctrl_dummy_name;
return priv->socdata->groups[selector].name;
}
@ -41,6 +46,9 @@ static const char *uniphier_pinmux_get_function_name(struct udevice *dev,
{
struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
if (!priv->socdata->functions[selector])
return uniphier_pinctrl_dummy_name;
return priv->socdata->functions[selector];
}
@ -91,7 +99,7 @@ static void uniphier_pinconf_input_enable(struct udevice *dev, unsigned pin)
}
static void uniphier_pinmux_set_one(struct udevice *dev, unsigned pin,
unsigned muxval)
int muxval)
{
struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
unsigned mux_bits, reg_stride, reg, reg_end, shift, mask;
@ -101,6 +109,9 @@ static void uniphier_pinmux_set_one(struct udevice *dev, unsigned pin,
/* some pins need input-enabling */
uniphier_pinconf_input_enable(dev, pin);
if (muxval < 0)
return; /* dedicated pin; nothing to do for pin-mux */
if (priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE) {
/*
* Mode offset bit
@ -173,7 +184,7 @@ int uniphier_pinctrl_probe(struct udevice *dev,
struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
fdt_addr_t addr;
addr = dev_get_addr(dev);
addr = dev_get_addr(dev->parent);
if (addr == FDT_ADDR_T_NONE)
return -EINVAL;

107
drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c Normal file
View file

@ -0,0 +1,107 @@
/*
* Copyright (C) 2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <dm/device.h>
#include <dm/pinctrl.h>
#include "pinctrl-uniphier.h"
static const unsigned emmc_pins[] = {18, 19, 20, 21, 22, 23, 24, 25};
static const int emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0};
static const unsigned emmc_dat8_pins[] = {26, 27, 28, 29};
static const int emmc_dat8_muxvals[] = {0, 0, 0, 0};
static const unsigned ether_rmii_pins[] = {6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
16, 17};
static const int ether_rmii_muxvals[] = {4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4};
static const unsigned i2c0_pins[] = {63, 64};
static const int i2c0_muxvals[] = {0, 0};
static const unsigned i2c1_pins[] = {65, 66};
static const int i2c1_muxvals[] = {0, 0};
static const unsigned i2c3_pins[] = {67, 68};
static const int i2c3_muxvals[] = {1, 1};
static const unsigned i2c4_pins[] = {61, 62};
static const int i2c4_muxvals[] = {1, 1};
static const unsigned nand_pins[] = {3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
15, 16, 17};
static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
static const unsigned uart0_pins[] = {54, 55};
static const int uart0_muxvals[] = {0, 0};
static const unsigned uart1_pins[] = {58, 59};
static const int uart1_muxvals[] = {1, 1};
static const unsigned uart2_pins[] = {90, 91};
static const int uart2_muxvals[] = {1, 1};
static const unsigned uart3_pins[] = {94, 95};
static const int uart3_muxvals[] = {1, 1};
static const unsigned usb0_pins[] = {46, 47};
static const int usb0_muxvals[] = {0, 0};
static const unsigned usb1_pins[] = {48, 49};
static const int usb1_muxvals[] = {0, 0};
static const unsigned usb2_pins[] = {50, 51};
static const int usb2_muxvals[] = {0, 0};
static const struct uniphier_pinctrl_group uniphier_ld11_groups[] = {
UNIPHIER_PINCTRL_GROUP(emmc),
UNIPHIER_PINCTRL_GROUP(emmc_dat8),
UNIPHIER_PINCTRL_GROUP(ether_rmii),
UNIPHIER_PINCTRL_GROUP(i2c0),
UNIPHIER_PINCTRL_GROUP(i2c1),
UNIPHIER_PINCTRL_GROUP(i2c3),
UNIPHIER_PINCTRL_GROUP(i2c4),
UNIPHIER_PINCTRL_GROUP(nand),
UNIPHIER_PINCTRL_GROUP_SPL(uart0),
UNIPHIER_PINCTRL_GROUP_SPL(uart1),
UNIPHIER_PINCTRL_GROUP_SPL(uart2),
UNIPHIER_PINCTRL_GROUP_SPL(uart3),
UNIPHIER_PINCTRL_GROUP(usb0),
UNIPHIER_PINCTRL_GROUP(usb1),
UNIPHIER_PINCTRL_GROUP(usb2),
};
static const char * const uniphier_ld11_functions[] = {
UNIPHIER_PINMUX_FUNCTION(emmc),
UNIPHIER_PINMUX_FUNCTION(ether_rmii),
UNIPHIER_PINMUX_FUNCTION(i2c0),
UNIPHIER_PINMUX_FUNCTION(i2c1),
UNIPHIER_PINMUX_FUNCTION(i2c3),
UNIPHIER_PINMUX_FUNCTION(i2c4),
UNIPHIER_PINMUX_FUNCTION(nand),
UNIPHIER_PINMUX_FUNCTION_SPL(uart0),
UNIPHIER_PINMUX_FUNCTION_SPL(uart1),
UNIPHIER_PINMUX_FUNCTION_SPL(uart2),
UNIPHIER_PINMUX_FUNCTION_SPL(uart3),
UNIPHIER_PINMUX_FUNCTION(usb0),
UNIPHIER_PINMUX_FUNCTION(usb1),
UNIPHIER_PINMUX_FUNCTION(usb2),
};
static struct uniphier_pinctrl_socdata uniphier_ld11_pinctrl_socdata = {
.groups = uniphier_ld11_groups,
.groups_count = ARRAY_SIZE(uniphier_ld11_groups),
.functions = uniphier_ld11_functions,
.functions_count = ARRAY_SIZE(uniphier_ld11_functions),
.caps = UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL,
};
static int uniphier_ld11_pinctrl_probe(struct udevice *dev)
{
return uniphier_pinctrl_probe(dev, &uniphier_ld11_pinctrl_socdata);
}
static const struct udevice_id uniphier_ld11_pinctrl_match[] = {
{ .compatible = "socionext,uniphier-ld11-pinctrl" },
{ /* sentinel */ }
};
U_BOOT_DRIVER(uniphier_ld11_pinctrl) = {
.name = "uniphier-ld11-pinctrl",
.id = UCLASS_PINCTRL,
.of_match = of_match_ptr(uniphier_ld11_pinctrl_match),
.probe = uniphier_ld11_pinctrl_probe,
.remove = uniphier_pinctrl_remove,
.priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv),
.ops = &uniphier_pinctrl_ops,
};

95
drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c
View file

@ -1,5 +1,6 @@
/*
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
* Copyright (C) 2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
@ -10,78 +11,85 @@
#include "pinctrl-uniphier.h"
static const unsigned emmc_pins[] = {18, 19, 20, 21, 22, 23, 24, 25};
static const unsigned emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0};
static const int emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0};
static const unsigned emmc_dat8_pins[] = {26, 27, 28, 29};
static const unsigned emmc_dat8_muxvals[] = {0, 0, 0, 0};
static const int emmc_dat8_muxvals[] = {0, 0, 0, 0};
static const unsigned ether_rgmii_pins[] = {30, 31, 32, 33, 34, 35, 36, 37, 38,
39, 40, 41, 42, 43, 44, 45};
static const int ether_rgmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0};
static const unsigned ether_rmii_pins[] = {30, 31, 32, 33, 34, 35, 36, 37, 39,
41, 42, 45};
static const int ether_rmii_muxvals[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1};
static const unsigned i2c0_pins[] = {63, 64};
static const unsigned i2c0_muxvals[] = {0, 0};
static const int i2c0_muxvals[] = {0, 0};
static const unsigned i2c1_pins[] = {65, 66};
static const unsigned i2c1_muxvals[] = {0, 0};
static const int i2c1_muxvals[] = {0, 0};
static const unsigned i2c3_pins[] = {67, 68};
static const unsigned i2c3_muxvals[] = {1, 1};
static const int i2c3_muxvals[] = {1, 1};
static const unsigned i2c4_pins[] = {61, 62};
static const unsigned i2c4_muxvals[] = {1, 1};
static const int i2c4_muxvals[] = {1, 1};
static const unsigned nand_pins[] = {3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
15, 16, 17};
static const unsigned nand_muxvals[] = {2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
2, 2, 2};
static const unsigned nand_cs1_pins[] = {};
static const unsigned nand_cs1_muxvals[] = {};
static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
static const unsigned sd_pins[] = {10, 11, 12, 13, 14, 15, 16, 17};
static const unsigned sd_muxvals[] = {3, 3, 3, 3, 3, 3, 3, 3}; /* No SDVOLC */
static const int sd_muxvals[] = {3, 3, 3, 3, 3, 3, 3, 3}; /* No SDVOLC */
static const unsigned uart0_pins[] = {54, 55};
static const unsigned uart0_muxvals[] = {0, 0};
static const int uart0_muxvals[] = {0, 0};
static const unsigned uart1_pins[] = {58, 59};
static const unsigned uart1_muxvals[] = {1, 1};
static const int uart1_muxvals[] = {1, 1};
static const unsigned uart2_pins[] = {90, 91};
static const unsigned uart2_muxvals[] = {1, 1};
static const int uart2_muxvals[] = {1, 1};
static const unsigned uart3_pins[] = {94, 95};
static const unsigned uart3_muxvals[] = {1, 1};
static const int uart3_muxvals[] = {1, 1};
static const unsigned usb0_pins[] = {46, 47};
static const unsigned usb0_muxvals[] = {0, 0};
static const int usb0_muxvals[] = {0, 0};
static const unsigned usb1_pins[] = {48, 49};
static const unsigned usb1_muxvals[] = {0, 0};
static const int usb1_muxvals[] = {0, 0};
static const unsigned usb2_pins[] = {50, 51};
static const unsigned usb2_muxvals[] = {0, 0};
static const int usb2_muxvals[] = {0, 0};
static const unsigned usb3_pins[] = {52, 53};
static const unsigned usb3_muxvals[] = {0, 0};
static const int usb3_muxvals[] = {0, 0};
static const struct uniphier_pinctrl_group uniphier_ld20_groups[] = {
UNIPHIER_PINCTRL_GROUP(emmc),
UNIPHIER_PINCTRL_GROUP(emmc_dat8),
UNIPHIER_PINCTRL_GROUP(ether_rgmii),
UNIPHIER_PINCTRL_GROUP(ether_rmii),
UNIPHIER_PINCTRL_GROUP(i2c0),
UNIPHIER_PINCTRL_GROUP(i2c1),
UNIPHIER_PINCTRL_GROUP(i2c3),
UNIPHIER_PINCTRL_GROUP(i2c4),
UNIPHIER_PINCTRL_GROUP(nand),
UNIPHIER_PINCTRL_GROUP(nand_cs1),
UNIPHIER_PINCTRL_GROUP(sd), /* SD does not exist for LD11 */
UNIPHIER_PINCTRL_GROUP(uart0),
UNIPHIER_PINCTRL_GROUP(uart1),
UNIPHIER_PINCTRL_GROUP(uart2),
UNIPHIER_PINCTRL_GROUP(uart3),
UNIPHIER_PINCTRL_GROUP(sd),
UNIPHIER_PINCTRL_GROUP_SPL(uart0),
UNIPHIER_PINCTRL_GROUP_SPL(uart1),
UNIPHIER_PINCTRL_GROUP_SPL(uart2),
UNIPHIER_PINCTRL_GROUP_SPL(uart3),
UNIPHIER_PINCTRL_GROUP(usb0),
UNIPHIER_PINCTRL_GROUP(usb1),
UNIPHIER_PINCTRL_GROUP(usb2),
UNIPHIER_PINCTRL_GROUP(usb3), /* USB3 does not exist for LD11 */
UNIPHIER_PINCTRL_GROUP(usb3),
};
static const char * const uniphier_ld20_functions[] = {
"emmc",
"i2c0",
"i2c1",
"i2c3",
"i2c4",
"nand",
"sd", /* SD does not exist for LD11 */
"uart0",
"uart1",
"uart2",
"uart3",
"usb0",
"usb1",
"usb2",
"usb3", /* USB3 does not exist for LD11 */
UNIPHIER_PINMUX_FUNCTION(emmc),
UNIPHIER_PINMUX_FUNCTION(ether_rgmii),
UNIPHIER_PINMUX_FUNCTION(ether_rmii),
UNIPHIER_PINMUX_FUNCTION(i2c0),
UNIPHIER_PINMUX_FUNCTION(i2c1),
UNIPHIER_PINMUX_FUNCTION(i2c3),
UNIPHIER_PINMUX_FUNCTION(i2c4),
UNIPHIER_PINMUX_FUNCTION(nand),
UNIPHIER_PINMUX_FUNCTION(sd),
UNIPHIER_PINMUX_FUNCTION_SPL(uart0),
UNIPHIER_PINMUX_FUNCTION_SPL(uart1),
UNIPHIER_PINMUX_FUNCTION_SPL(uart2),
UNIPHIER_PINMUX_FUNCTION_SPL(uart3),
UNIPHIER_PINMUX_FUNCTION(usb0),
UNIPHIER_PINMUX_FUNCTION(usb1),
UNIPHIER_PINMUX_FUNCTION(usb2),
UNIPHIER_PINMUX_FUNCTION(usb3),
};
static struct uniphier_pinctrl_socdata uniphier_ld20_pinctrl_socdata = {
@ -98,8 +106,7 @@ static int uniphier_ld20_pinctrl_probe(struct udevice *dev)
}
static const struct udevice_id uniphier_ld20_pinctrl_match[] = {
{ .compatible = "socionext,ph1-ld11-pinctrl" },
{ .compatible = "socionext,ph1-ld20-pinctrl" },
{ .compatible = "socionext,uniphier-ld20-pinctrl" },
{ /* sentinel */ }
};

93
drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c
View file

@ -24,47 +24,56 @@ static const struct uniphier_pinctrl_pin uniphier_ld4_pins[] = {
};
static const unsigned emmc_pins[] = {21, 22, 23, 24, 25, 26, 27};
static const unsigned emmc_muxvals[] = {0, 1, 1, 1, 1, 1, 1};
static const int emmc_muxvals[] = {0, 1, 1, 1, 1, 1, 1};
static const unsigned emmc_dat8_pins[] = {28, 29, 30, 31};
static const unsigned emmc_dat8_muxvals[] = {1, 1, 1, 1};
static const int emmc_dat8_muxvals[] = {1, 1, 1, 1};
static const unsigned ether_mii_pins[] = {32, 33, 34, 35, 36, 37, 38, 39, 40,
41, 42, 43, 136, 137, 138, 139, 140,
141, 142};
static const int ether_mii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
4, 4, 4, 4, 4, 4, 4};
static const unsigned ether_rmii_pins[] = {32, 33, 34, 35, 36, 37, 38, 39, 40,
41, 42, 43};
static const int ether_rmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
static const unsigned i2c0_pins[] = {102, 103};
static const unsigned i2c0_muxvals[] = {0, 0};
static const int i2c0_muxvals[] = {0, 0};
static const unsigned i2c1_pins[] = {104, 105};
static const unsigned i2c1_muxvals[] = {0, 0};
static const int i2c1_muxvals[] = {0, 0};
static const unsigned i2c2_pins[] = {108, 109};
static const unsigned i2c2_muxvals[] = {2, 2};
static const int i2c2_muxvals[] = {2, 2};
static const unsigned i2c3_pins[] = {108, 109};
static const unsigned i2c3_muxvals[] = {3, 3};
static const int i2c3_muxvals[] = {3, 3};
static const unsigned nand_pins[] = {24, 25, 26, 27, 28, 29, 30, 31, 158, 159,
160, 161, 162, 163, 164};
static const unsigned nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0};
static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
static const unsigned nand_cs1_pins[] = {22, 23};
static const unsigned nand_cs1_muxvals[] = {0, 0};
static const int nand_cs1_muxvals[] = {0, 0};
static const unsigned sd_pins[] = {44, 45, 46, 47, 48, 49, 50, 51, 52};
static const unsigned sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
static const unsigned uart0_pins[] = {85, 88};
static const unsigned uart0_muxvals[] = {1, 1};
static const int uart0_muxvals[] = {1, 1};
static const unsigned uart1_pins[] = {155, 156};
static const unsigned uart1_muxvals[] = {13, 13};
static const int uart1_muxvals[] = {13, 13};
static const unsigned uart1b_pins[] = {69, 70};
static const unsigned uart1b_muxvals[] = {23, 23};
static const int uart1b_muxvals[] = {23, 23};
static const unsigned uart2_pins[] = {128, 129};
static const unsigned uart2_muxvals[] = {13, 13};
static const int uart2_muxvals[] = {13, 13};
static const unsigned uart3_pins[] = {110, 111};
static const unsigned uart3_muxvals[] = {1, 1};
static const int uart3_muxvals[] = {1, 1};
static const unsigned usb0_pins[] = {53, 54};
static const unsigned usb0_muxvals[] = {0, 0};
static const int usb0_muxvals[] = {0, 0};
static const unsigned usb1_pins[] = {55, 56};
static const unsigned usb1_muxvals[] = {0, 0};
static const int usb1_muxvals[] = {0, 0};
static const unsigned usb2_pins[] = {155, 156};
static const unsigned usb2_muxvals[] = {4, 4};
static const int usb2_muxvals[] = {4, 4};
static const unsigned usb2b_pins[] = {67, 68};
static const unsigned usb2b_muxvals[] = {23, 23};
static const int usb2b_muxvals[] = {23, 23};
static const struct uniphier_pinctrl_group uniphier_ld4_groups[] = {
UNIPHIER_PINCTRL_GROUP(emmc),
UNIPHIER_PINCTRL_GROUP(emmc_dat8),
UNIPHIER_PINCTRL_GROUP_SPL(emmc),
UNIPHIER_PINCTRL_GROUP_SPL(emmc_dat8),
UNIPHIER_PINCTRL_GROUP(ether_mii),
UNIPHIER_PINCTRL_GROUP(ether_rmii),
UNIPHIER_PINCTRL_GROUP(i2c0),
UNIPHIER_PINCTRL_GROUP(i2c1),
UNIPHIER_PINCTRL_GROUP(i2c2),
@ -72,11 +81,11 @@ static const struct uniphier_pinctrl_group uniphier_ld4_groups[] = {
UNIPHIER_PINCTRL_GROUP(nand),
UNIPHIER_PINCTRL_GROUP(nand_cs1),
UNIPHIER_PINCTRL_GROUP(sd),
UNIPHIER_PINCTRL_GROUP(uart0),
UNIPHIER_PINCTRL_GROUP(uart1),
UNIPHIER_PINCTRL_GROUP(uart1b),
UNIPHIER_PINCTRL_GROUP(uart2),
UNIPHIER_PINCTRL_GROUP(uart3),
UNIPHIER_PINCTRL_GROUP_SPL(uart0),
UNIPHIER_PINCTRL_GROUP_SPL(uart1),
UNIPHIER_PINCTRL_GROUP_SPL(uart1b),
UNIPHIER_PINCTRL_GROUP_SPL(uart2),
UNIPHIER_PINCTRL_GROUP_SPL(uart3),
UNIPHIER_PINCTRL_GROUP(usb0),
UNIPHIER_PINCTRL_GROUP(usb1),
UNIPHIER_PINCTRL_GROUP(usb2),
@ -84,20 +93,22 @@ static const struct uniphier_pinctrl_group uniphier_ld4_groups[] = {
};
static const char * const uniphier_ld4_functions[] = {
"emmc",
"i2c0",
"i2c1",
"i2c2",
"i2c3",
"nand",
"sd",
"uart0",
"uart1",
"uart2",
"uart3",
"usb0",
"usb1",
"usb2",
UNIPHIER_PINMUX_FUNCTION_SPL(emmc),
UNIPHIER_PINMUX_FUNCTION(ether_mii),
UNIPHIER_PINMUX_FUNCTION(ether_rmii),
UNIPHIER_PINMUX_FUNCTION(i2c0),
UNIPHIER_PINMUX_FUNCTION(i2c1),
UNIPHIER_PINMUX_FUNCTION(i2c2),
UNIPHIER_PINMUX_FUNCTION(i2c3),
UNIPHIER_PINMUX_FUNCTION(nand),
UNIPHIER_PINMUX_FUNCTION(sd),
UNIPHIER_PINMUX_FUNCTION_SPL(uart0),
UNIPHIER_PINMUX_FUNCTION_SPL(uart1),
UNIPHIER_PINMUX_FUNCTION_SPL(uart2),
UNIPHIER_PINMUX_FUNCTION_SPL(uart3),
UNIPHIER_PINMUX_FUNCTION(usb0),
UNIPHIER_PINMUX_FUNCTION(usb1),
UNIPHIER_PINMUX_FUNCTION(usb2),
};
static struct uniphier_pinctrl_socdata uniphier_ld4_pinctrl_socdata = {
@ -115,7 +126,7 @@ static int uniphier_ld4_pinctrl_probe(struct udevice *dev)
}
static const struct udevice_id uniphier_ld4_pinctrl_match[] = {
{ .compatible = "socionext,ph1-ld4-pinctrl" },
{ .compatible = "socionext,uniphier-ld4-pinctrl" },
{ /* sentinel */ }
};

97
drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c
View file

@ -21,49 +21,58 @@ static const struct uniphier_pinctrl_pin uniphier_ld6b_pins[] = {
};
static const unsigned emmc_pins[] = {36, 37, 38, 39, 40, 41, 42};
static const unsigned emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1};
static const int emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1};
static const unsigned emmc_dat8_pins[] = {43, 44, 45, 46};
static const unsigned emmc_dat8_muxvals[] = {1, 1, 1, 1};
static const int emmc_dat8_muxvals[] = {1, 1, 1, 1};
static const unsigned ether_rgmii_pins[] = {143, 144, 145, 146, 147, 148, 149,
150, 151, 152, 153, 154, 155, 156,
157, 158};
static const int ether_rgmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0};
static const unsigned ether_rmii_pins[] = {143, 144, 145, 146, 147, 148, 149,
150, 152, 154, 155, 158};
static const int ether_rmii_muxvals[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1};
static const unsigned i2c0_pins[] = {109, 110};
static const unsigned i2c0_muxvals[] = {0, 0};
static const int i2c0_muxvals[] = {0, 0};
static const unsigned i2c1_pins[] = {111, 112};
static const unsigned i2c1_muxvals[] = {0, 0};
static const int i2c1_muxvals[] = {0, 0};
static const unsigned i2c2_pins[] = {115, 116};
static const unsigned i2c2_muxvals[] = {1, 1};
static const int i2c2_muxvals[] = {1, 1};
static const unsigned i2c3_pins[] = {118, 119};
static const unsigned i2c3_muxvals[] = {1, 1};
static const int i2c3_muxvals[] = {1, 1};
static const unsigned nand_pins[] = {30, 31, 32, 33, 34, 35, 36, 39, 40, 41,
42, 43, 44, 45, 46};
static const unsigned nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0};
static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
static const unsigned nand_cs1_pins[] = {37, 38};
static const unsigned nand_cs1_muxvals[] = {0, 0};
static const int nand_cs1_muxvals[] = {0, 0};
static const unsigned sd_pins[] = {47, 48, 49, 50, 51, 52, 53, 54, 55};
static const unsigned sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
static const unsigned uart0_pins[] = {135, 136};
static const unsigned uart0_muxvals[] = {3, 3};
static const int uart0_muxvals[] = {3, 3};
static const unsigned uart0b_pins[] = {11, 12};
static const unsigned uart0b_muxvals[] = {2, 2};
static const int uart0b_muxvals[] = {2, 2};
static const unsigned uart1_pins[] = {115, 116};
static const unsigned uart1_muxvals[] = {0, 0};
static const int uart1_muxvals[] = {0, 0};
static const unsigned uart1b_pins[] = {113, 114};
static const unsigned uart1b_muxvals[] = {1, 1};
static const int uart1b_muxvals[] = {1, 1};
static const unsigned uart2_pins[] = {113, 114};
static const unsigned uart2_muxvals[] = {2, 2};
static const int uart2_muxvals[] = {2, 2};
static const unsigned uart2b_pins[] = {86, 87};
static const unsigned uart2b_muxvals[] = {1, 1};
static const int uart2b_muxvals[] = {1, 1};
static const unsigned usb0_pins[] = {56, 57};
static const unsigned usb0_muxvals[] = {0, 0};
static const int usb0_muxvals[] = {0, 0};
static const unsigned usb1_pins[] = {58, 59};
static const unsigned usb1_muxvals[] = {0, 0};
static const int usb1_muxvals[] = {0, 0};
static const unsigned usb2_pins[] = {60, 61};
static const unsigned usb2_muxvals[] = {0, 0};
static const int usb2_muxvals[] = {0, 0};
static const unsigned usb3_pins[] = {62, 63};
static const unsigned usb3_muxvals[] = {0, 0};
static const int usb3_muxvals[] = {0, 0};
static const struct uniphier_pinctrl_group uniphier_ld6b_groups[] = {
UNIPHIER_PINCTRL_GROUP(emmc),
UNIPHIER_PINCTRL_GROUP(emmc_dat8),
UNIPHIER_PINCTRL_GROUP_SPL(emmc),
UNIPHIER_PINCTRL_GROUP_SPL(emmc_dat8),
UNIPHIER_PINCTRL_GROUP(ether_rgmii),
UNIPHIER_PINCTRL_GROUP(ether_rmii),
UNIPHIER_PINCTRL_GROUP(i2c0),
UNIPHIER_PINCTRL_GROUP(i2c1),
UNIPHIER_PINCTRL_GROUP(i2c2),
@ -71,12 +80,12 @@ static const struct uniphier_pinctrl_group uniphier_ld6b_groups[] = {
UNIPHIER_PINCTRL_GROUP(nand),
UNIPHIER_PINCTRL_GROUP(nand_cs1),
UNIPHIER_PINCTRL_GROUP(sd),
UNIPHIER_PINCTRL_GROUP(uart0),
UNIPHIER_PINCTRL_GROUP(uart0b),
UNIPHIER_PINCTRL_GROUP(uart1),
UNIPHIER_PINCTRL_GROUP(uart1b),
UNIPHIER_PINCTRL_GROUP(uart2),
UNIPHIER_PINCTRL_GROUP(uart2b),
UNIPHIER_PINCTRL_GROUP_SPL(uart0),
UNIPHIER_PINCTRL_GROUP_SPL(uart0b),
UNIPHIER_PINCTRL_GROUP_SPL(uart1),
UNIPHIER_PINCTRL_GROUP_SPL(uart1b),
UNIPHIER_PINCTRL_GROUP_SPL(uart2),
UNIPHIER_PINCTRL_GROUP_SPL(uart2b),
UNIPHIER_PINCTRL_GROUP(usb0),
UNIPHIER_PINCTRL_GROUP(usb1),
UNIPHIER_PINCTRL_GROUP(usb2),
@ -84,20 +93,22 @@ static const struct uniphier_pinctrl_group uniphier_ld6b_groups[] = {
};
static const char * const uniphier_ld6b_functions[] = {
"emmc",
"i2c0",
"i2c1",
"i2c2",
"i2c3",
"nand",
"sd",
"uart0",
"uart1",
"uart2",
"usb0",
"usb1",
"usb2",
"usb3",
UNIPHIER_PINMUX_FUNCTION_SPL(emmc),
UNIPHIER_PINMUX_FUNCTION(ether_rgmii),
UNIPHIER_PINMUX_FUNCTION(ether_rmii),
UNIPHIER_PINMUX_FUNCTION(i2c0),
UNIPHIER_PINMUX_FUNCTION(i2c1),
UNIPHIER_PINMUX_FUNCTION(i2c2),
UNIPHIER_PINMUX_FUNCTION(i2c3),
UNIPHIER_PINMUX_FUNCTION(nand),
UNIPHIER_PINMUX_FUNCTION(sd),
UNIPHIER_PINMUX_FUNCTION_SPL(uart0),
UNIPHIER_PINMUX_FUNCTION_SPL(uart1),
UNIPHIER_PINMUX_FUNCTION_SPL(uart2),
UNIPHIER_PINMUX_FUNCTION(usb0),
UNIPHIER_PINMUX_FUNCTION(usb1),
UNIPHIER_PINMUX_FUNCTION(usb2),
UNIPHIER_PINMUX_FUNCTION(usb3),
};
static struct uniphier_pinctrl_socdata uniphier_ld6b_pinctrl_socdata = {
@ -115,7 +126,7 @@ static int uniphier_ld6b_pinctrl_probe(struct udevice *dev)
}
static const struct udevice_id uniphier_ld6b_pinctrl_match[] = {
{ .compatible = "socionext,ph1-ld6b-pinctrl" },
{ .compatible = "socionext,uniphier-ld6b-pinctrl" },
{ /* sentinel */ }
};

110
drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c
View file

@ -13,50 +13,69 @@ static const struct uniphier_pinctrl_pin uniphier_pro4_pins[] = {
};
static const unsigned emmc_pins[] = {40, 41, 42, 43, 51, 52, 53};
static const unsigned emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1};
static const int emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1};
static const unsigned emmc_dat8_pins[] = {44, 45, 46, 47};
static const unsigned emmc_dat8_muxvals[] = {1, 1, 1, 1};
static const int emmc_dat8_muxvals[] = {1, 1, 1, 1};
static const unsigned ether_mii_pins[] = {160, 161, 162, 163, 164, 165, 166,
167, 168, 169, 170, 171, 172, 173,
174, 175, 176, 177, 178, 179};
static const int ether_mii_muxvals[] = {1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0};
static const unsigned ether_rgmii_pins[] = {160, 161, 162, 163, 164, 165, 167,
168, 169, 170, 171, 172, 176, 177,
178, 179};
static const int ether_rgmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0};
static const unsigned ether_rmii_pins[] = {160, 161, 162, 165, 168, 169, 172,
173, 176, 177, 178, 179};
static const int ether_rmii_muxvals[] = {1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
static const unsigned ether_rmiib_pins[] = {161, 162, 165, 167, 168, 169, 172,
173, 176, 177, 178, 179};
static const int ether_rmiib_muxvals[] = {0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0};
static const unsigned i2c0_pins[] = {142, 143};
static const unsigned i2c0_muxvals[] = {0, 0};
static const int i2c0_muxvals[] = {0, 0};
static const unsigned i2c1_pins[] = {144, 145};
static const unsigned i2c1_muxvals[] = {0, 0};
static const int i2c1_muxvals[] = {0, 0};
static const unsigned i2c2_pins[] = {146, 147};
static const unsigned i2c2_muxvals[] = {0, 0};
static const int i2c2_muxvals[] = {0, 0};
static const unsigned i2c3_pins[] = {148, 149};
static const unsigned i2c3_muxvals[] = {0, 0};
static const int i2c3_muxvals[] = {0, 0};
static const unsigned i2c6_pins[] = {308, 309};
static const unsigned i2c6_muxvals[] = {6, 6};
static const int i2c6_muxvals[] = {6, 6};
static const unsigned nand_pins[] = {40, 41, 42, 43, 44, 45, 46, 47, 48, 49,
50, 51, 52, 53, 54};
static const unsigned nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0};
static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
static const unsigned nand_cs1_pins[] = {131, 132};
static const unsigned nand_cs1_muxvals[] = {1, 1};
static const int nand_cs1_muxvals[] = {1, 1};
static const unsigned sd_pins[] = {150, 151, 152, 153, 154, 155, 156, 157, 158};
static const unsigned sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
static const unsigned sd1_pins[] = {319, 320, 321, 322, 323, 324, 325, 326,
327};
static const unsigned sd1_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
static const int sd1_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
static const unsigned uart0_pins[] = {127, 128};
static const unsigned uart0_muxvals[] = {0, 0};
static const int uart0_muxvals[] = {0, 0};
static const unsigned uart1_pins[] = {129, 130};
static const unsigned uart1_muxvals[] = {0, 0};
static const int uart1_muxvals[] = {0, 0};
static const unsigned uart2_pins[] = {131, 132};
static const unsigned uart2_muxvals[] = {0, 0};
static const int uart2_muxvals[] = {0, 0};
static const unsigned uart3_pins[] = {88, 89};
static const unsigned uart3_muxvals[] = {2, 2};
static const int uart3_muxvals[] = {2, 2};
static const unsigned usb0_pins[] = {180, 181};
static const unsigned usb0_muxvals[] = {0, 0};
static const int usb0_muxvals[] = {0, 0};
static const unsigned usb1_pins[] = {182, 183};
static const unsigned usb1_muxvals[] = {0, 0};
static const int usb1_muxvals[] = {0, 0};
static const unsigned usb2_pins[] = {184, 185};
static const unsigned usb2_muxvals[] = {0, 0};
static const int usb2_muxvals[] = {0, 0};
static const unsigned usb3_pins[] = {186, 187};
static const unsigned usb3_muxvals[] = {0, 0};
static const int usb3_muxvals[] = {0, 0};
static const struct uniphier_pinctrl_group uniphier_pro4_groups[] = {
UNIPHIER_PINCTRL_GROUP(emmc),
UNIPHIER_PINCTRL_GROUP(emmc_dat8),
UNIPHIER_PINCTRL_GROUP_SPL(emmc),
UNIPHIER_PINCTRL_GROUP_SPL(emmc_dat8),
UNIPHIER_PINCTRL_GROUP(ether_mii),
UNIPHIER_PINCTRL_GROUP(ether_rgmii),
UNIPHIER_PINCTRL_GROUP(ether_rmii),
UNIPHIER_PINCTRL_GROUP(ether_rmiib),
UNIPHIER_PINCTRL_GROUP(i2c0),
UNIPHIER_PINCTRL_GROUP(i2c1),
UNIPHIER_PINCTRL_GROUP(i2c2),
@ -66,10 +85,10 @@ static const struct uniphier_pinctrl_group uniphier_pro4_groups[] = {
UNIPHIER_PINCTRL_GROUP(nand_cs1),
UNIPHIER_PINCTRL_GROUP(sd),
UNIPHIER_PINCTRL_GROUP(sd1),
UNIPHIER_PINCTRL_GROUP(uart0),
UNIPHIER_PINCTRL_GROUP(uart1),
UNIPHIER_PINCTRL_GROUP(uart2),
UNIPHIER_PINCTRL_GROUP(uart3),
UNIPHIER_PINCTRL_GROUP_SPL(uart0),
UNIPHIER_PINCTRL_GROUP_SPL(uart1),
UNIPHIER_PINCTRL_GROUP_SPL(uart2),
UNIPHIER_PINCTRL_GROUP_SPL(uart3),
UNIPHIER_PINCTRL_GROUP(usb0),
UNIPHIER_PINCTRL_GROUP(usb1),
UNIPHIER_PINCTRL_GROUP(usb2),
@ -77,23 +96,26 @@ static const struct uniphier_pinctrl_group uniphier_pro4_groups[] = {
};
static const char * const uniphier_pro4_functions[] = {
"emmc",
"i2c0",
"i2c1",
"i2c2",
"i2c3",
"i2c6",
"nand",
"sd",
"sd1",
"uart0",
"uart1",
"uart2",
"uart3",
"usb0",
"usb1",
"usb2",
"usb3",
UNIPHIER_PINMUX_FUNCTION_SPL(emmc),
UNIPHIER_PINMUX_FUNCTION(ether_mii),
UNIPHIER_PINMUX_FUNCTION(ether_rgmii),
UNIPHIER_PINMUX_FUNCTION(ether_rmii),
UNIPHIER_PINMUX_FUNCTION(i2c0),
UNIPHIER_PINMUX_FUNCTION(i2c1),
UNIPHIER_PINMUX_FUNCTION(i2c2),
UNIPHIER_PINMUX_FUNCTION(i2c3),
UNIPHIER_PINMUX_FUNCTION(i2c6),
UNIPHIER_PINMUX_FUNCTION(nand),
UNIPHIER_PINMUX_FUNCTION(sd),
UNIPHIER_PINMUX_FUNCTION(sd1),
UNIPHIER_PINMUX_FUNCTION_SPL(uart0),
UNIPHIER_PINMUX_FUNCTION_SPL(uart1),
UNIPHIER_PINMUX_FUNCTION_SPL(uart2),
UNIPHIER_PINMUX_FUNCTION_SPL(uart3),
UNIPHIER_PINMUX_FUNCTION(usb0),
UNIPHIER_PINMUX_FUNCTION(usb1),
UNIPHIER_PINMUX_FUNCTION(usb2),
UNIPHIER_PINMUX_FUNCTION(usb3),
};
static struct uniphier_pinctrl_socdata uniphier_pro4_pinctrl_socdata = {
@ -112,7 +134,7 @@ static int uniphier_pro4_pinctrl_probe(struct udevice *dev)
}
static const struct udevice_id uniphier_pro4_pinctrl_match[] = {
{ .compatible = "socionext,ph1-pro4-pinctrl" },
{ .compatible = "socionext,uniphier-pro4-pinctrl" },
{ /* sentinel */ }
};

91
drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c
View file

@ -23,53 +23,52 @@ static const struct uniphier_pinctrl_pin uniphier_pro5_pins[] = {
};
static const unsigned emmc_pins[] = {36, 37, 38, 39, 40, 41, 42};
static const unsigned emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0};
static const int emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0};
static const unsigned emmc_dat8_pins[] = {43, 44, 45, 46};
static const unsigned emmc_dat8_muxvals[] = {0, 0, 0, 0};
static const int emmc_dat8_muxvals[] = {0, 0, 0, 0};
static const unsigned i2c0_pins[] = {112, 113};
static const unsigned i2c0_muxvals[] = {0, 0};
static const int i2c0_muxvals[] = {0, 0};
static const unsigned i2c1_pins[] = {114, 115};
static const unsigned i2c1_muxvals[] = {0, 0};
static const int i2c1_muxvals[] = {0, 0};
static const unsigned i2c2_pins[] = {116, 117};
static const unsigned i2c2_muxvals[] = {0, 0};
static const int i2c2_muxvals[] = {0, 0};
static const unsigned i2c3_pins[] = {118, 119};
static const unsigned i2c3_muxvals[] = {0, 0};
static const int i2c3_muxvals[] = {0, 0};
static const unsigned i2c5_pins[] = {87, 88};
static const unsigned i2c5_muxvals[] = {2, 2};
static const int i2c5_muxvals[] = {2, 2};
static const unsigned i2c5b_pins[] = {196, 197};
static const unsigned i2c5b_muxvals[] = {2, 2};
static const int i2c5b_muxvals[] = {2, 2};
static const unsigned i2c5c_pins[] = {215, 216};
static const unsigned i2c5c_muxvals[] = {2, 2};
static const int i2c5c_muxvals[] = {2, 2};
static const unsigned i2c6_pins[] = {101, 102};
static const unsigned i2c6_muxvals[] = {2, 2};
static const int i2c6_muxvals[] = {2, 2};
static const unsigned nand_pins[] = {19, 20, 21, 22, 23, 24, 25, 28, 29, 30,
31, 32, 33, 34, 35};
static const unsigned nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0};
static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
static const unsigned nand_cs1_pins[] = {26, 27};
static const unsigned nand_cs1_muxvals[] = {0, 0};
static const int nand_cs1_muxvals[] = {0, 0};
static const unsigned sd_pins[] = {250, 251, 252, 253, 254, 255, 256, 257, 258};
static const unsigned sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
static const unsigned uart0_pins[] = {47, 48};
static const unsigned uart0_muxvals[] = {0, 0};
static const int uart0_muxvals[] = {0, 0};
static const unsigned uart0b_pins[] = {227, 228};
static const unsigned uart0b_muxvals[] = {3, 3};
static const int uart0b_muxvals[] = {3, 3};
static const unsigned uart1_pins[] = {49, 50};
static const unsigned uart1_muxvals[] = {0, 0};
static const int uart1_muxvals[] = {0, 0};
static const unsigned uart2_pins[] = {51, 52};
static const unsigned uart2_muxvals[] = {0, 0};
static const int uart2_muxvals[] = {0, 0};
static const unsigned uart3_pins[] = {53, 54};
static const unsigned uart3_muxvals[] = {0, 0};
static const int uart3_muxvals[] = {0, 0};
static const unsigned usb0_pins[] = {124, 125};
static const unsigned usb0_muxvals[] = {0, 0};
static const int usb0_muxvals[] = {0, 0};
static const unsigned usb1_pins[] = {126, 127};
static const unsigned usb1_muxvals[] = {0, 0};
static const int usb1_muxvals[] = {0, 0};
static const unsigned usb2_pins[] = {128, 129};
static const unsigned usb2_muxvals[] = {0, 0};
static const int usb2_muxvals[] = {0, 0};
static const struct uniphier_pinctrl_group uniphier_pro5_groups[] = {
UNIPHIER_PINCTRL_GROUP(emmc),
UNIPHIER_PINCTRL_GROUP(emmc_dat8),
UNIPHIER_PINCTRL_GROUP_SPL(emmc),
UNIPHIER_PINCTRL_GROUP_SPL(emmc_dat8),
UNIPHIER_PINCTRL_GROUP(i2c0),
UNIPHIER_PINCTRL_GROUP(i2c1),
UNIPHIER_PINCTRL_GROUP(i2c2),
@ -81,33 +80,33 @@ static const struct uniphier_pinctrl_group uniphier_pro5_groups[] = {
UNIPHIER_PINCTRL_GROUP(nand),
UNIPHIER_PINCTRL_GROUP(nand_cs1),
UNIPHIER_PINCTRL_GROUP(sd),
UNIPHIER_PINCTRL_GROUP(uart0),
UNIPHIER_PINCTRL_GROUP(uart0b),
UNIPHIER_PINCTRL_GROUP(uart1),
UNIPHIER_PINCTRL_GROUP(uart2),
UNIPHIER_PINCTRL_GROUP(uart3),
UNIPHIER_PINCTRL_GROUP_SPL(uart0),
UNIPHIER_PINCTRL_GROUP_SPL(uart0b),
UNIPHIER_PINCTRL_GROUP_SPL(uart1),
UNIPHIER_PINCTRL_GROUP_SPL(uart2),
UNIPHIER_PINCTRL_GROUP_SPL(uart3),
UNIPHIER_PINCTRL_GROUP(usb0),
UNIPHIER_PINCTRL_GROUP(usb1),
UNIPHIER_PINCTRL_GROUP(usb2),
};
static const char * const uniphier_pro5_functions[] = {
"emmc",
"i2c0",
"i2c1",
"i2c2",
"i2c3",
"i2c5",
"i2c6",
"nand",
"sd",
"uart0",
"uart1",
"uart2",
"uart3",
"usb0",
"usb1",
"usb2",
UNIPHIER_PINMUX_FUNCTION_SPL(emmc),
UNIPHIER_PINMUX_FUNCTION(i2c0),
UNIPHIER_PINMUX_FUNCTION(i2c1),
UNIPHIER_PINMUX_FUNCTION(i2c2),
UNIPHIER_PINMUX_FUNCTION(i2c3),
UNIPHIER_PINMUX_FUNCTION(i2c5),
UNIPHIER_PINMUX_FUNCTION(i2c6),
UNIPHIER_PINMUX_FUNCTION(nand),
UNIPHIER_PINMUX_FUNCTION(sd),
UNIPHIER_PINMUX_FUNCTION_SPL(uart0),
UNIPHIER_PINMUX_FUNCTION_SPL(uart1),
UNIPHIER_PINMUX_FUNCTION_SPL(uart2),
UNIPHIER_PINMUX_FUNCTION_SPL(uart3),
UNIPHIER_PINMUX_FUNCTION(usb0),
UNIPHIER_PINMUX_FUNCTION(usb1),
UNIPHIER_PINMUX_FUNCTION(usb2),
};
static struct uniphier_pinctrl_socdata uniphier_pro5_pinctrl_socdata = {
@ -126,7 +125,7 @@ static int uniphier_pro5_pinctrl_probe(struct udevice *dev)
}
static const struct udevice_id uniphier_pro5_pinctrl_match[] = {
{ .compatible = "socionext,ph1-pro5-pinctrl" },
{ .compatible = "socionext,uniphier-pro5-pinctrl" },
{ /* sentinel */ }
};

116
drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c
View file

@ -17,53 +17,68 @@ static const struct uniphier_pinctrl_pin uniphier_pxs2_pins[] = {
};
static const unsigned emmc_pins[] = {36, 37, 38, 39, 40, 41, 42};
static const unsigned emmc_muxvals[] = {9, 9, 9, 9, 9, 9, 9};
static const int emmc_muxvals[] = {9, 9, 9, 9, 9, 9, 9};
static const unsigned emmc_dat8_pins[] = {43, 44, 45, 46};
static const unsigned emmc_dat8_muxvals[] = {9, 9, 9, 9};
static const int emmc_dat8_muxvals[] = {9, 9, 9, 9};
static const unsigned ether_mii_pins[] = {143, 144, 145, 146, 147, 148, 149,
150, 151, 152, 153, 154, 155, 156,
158, 159, 199, 200, 201, 202};
static const int ether_mii_muxvals[] = {8, 8, 8, 8, 10, 10, 10, 10, 10, 10, 10,
10, 10, 10, 10, 10, 12, 12, 12, 12};
static const unsigned ether_rgmii_pins[] = {143, 144, 145, 146, 147, 148, 149,
150, 151, 152, 153, 154, 155, 156,
157, 158};
static const int ether_rgmii_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
8, 8, 8, 8};
static const unsigned ether_rmii_pins[] = {143, 144, 145, 146, 147, 148, 149,
150, 152, 154, 155, 158};
static const int ether_rmii_muxvals[] = {8, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9, 9};
static const unsigned i2c0_pins[] = {109, 110};
static const unsigned i2c0_muxvals[] = {8, 8};
static const int i2c0_muxvals[] = {8, 8};
static const unsigned i2c1_pins[] = {111, 112};
static const unsigned i2c1_muxvals[] = {8, 8};
static const int i2c1_muxvals[] = {8, 8};
static const unsigned i2c2_pins[] = {171, 172};
static const unsigned i2c2_muxvals[] = {8, 8};
static const int i2c2_muxvals[] = {8, 8};
static const unsigned i2c3_pins[] = {159, 160};
static const unsigned i2c3_muxvals[] = {8, 8};
static const int i2c3_muxvals[] = {8, 8};
static const unsigned i2c5_pins[] = {183, 184};
static const unsigned i2c5_muxvals[] = {11, 11};
static const int i2c5_muxvals[] = {11, 11};
static const unsigned i2c6_pins[] = {185, 186};
static const unsigned i2c6_muxvals[] = {11, 11};
static const int i2c6_muxvals[] = {11, 11};
static const unsigned nand_pins[] = {30, 31, 32, 33, 34, 35, 36, 39, 40, 41,
42, 43, 44, 45, 46};
static const unsigned nand_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
8, 8};
static const int nand_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8};
static const unsigned nand_cs1_pins[] = {37, 38};
static const unsigned nand_cs1_muxvals[] = {8, 8};
static const int nand_cs1_muxvals[] = {8, 8};
static const unsigned sd_pins[] = {47, 48, 49, 50, 51, 52, 53, 54, 55};
static const unsigned sd_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8};
static const int sd_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8};
static const unsigned uart0_pins[] = {217, 218};
static const unsigned uart0_muxvals[] = {8, 8};
static const int uart0_muxvals[] = {8, 8};
static const unsigned uart0b_pins[] = {179, 180};
static const unsigned uart0b_muxvals[] = {10, 10};
static const int uart0b_muxvals[] = {10, 10};
static const unsigned uart1_pins[] = {115, 116};
static const unsigned uart1_muxvals[] = {8, 8};
static const int uart1_muxvals[] = {8, 8};
static const unsigned uart2_pins[] = {113, 114};
static const unsigned uart2_muxvals[] = {8, 8};
static const int uart2_muxvals[] = {8, 8};
static const unsigned uart3_pins[] = {219, 220};
static const unsigned uart3_muxvals[] = {8, 8};
static const int uart3_muxvals[] = {8, 8};
static const unsigned uart3b_pins[] = {181, 182};
static const unsigned uart3b_muxvals[] = {10, 10};
static const int uart3b_muxvals[] = {10, 10};
static const unsigned usb0_pins[] = {56, 57};
static const unsigned usb0_muxvals[] = {8, 8};
static const int usb0_muxvals[] = {8, 8};
static const unsigned usb1_pins[] = {58, 59};
static const unsigned usb1_muxvals[] = {8, 8};
static const int usb1_muxvals[] = {8, 8};
static const unsigned usb2_pins[] = {60, 61};
static const unsigned usb2_muxvals[] = {8, 8};
static const int usb2_muxvals[] = {8, 8};
static const unsigned usb3_pins[] = {62, 63};
static const unsigned usb3_muxvals[] = {8, 8};
static const int usb3_muxvals[] = {8, 8};
static const struct uniphier_pinctrl_group uniphier_pxs2_groups[] = {
UNIPHIER_PINCTRL_GROUP(emmc),
UNIPHIER_PINCTRL_GROUP(emmc_dat8),
UNIPHIER_PINCTRL_GROUP_SPL(emmc),
UNIPHIER_PINCTRL_GROUP_SPL(emmc_dat8),
UNIPHIER_PINCTRL_GROUP(ether_mii),
UNIPHIER_PINCTRL_GROUP(ether_rgmii),
UNIPHIER_PINCTRL_GROUP(ether_rmii),
UNIPHIER_PINCTRL_GROUP(i2c0),
UNIPHIER_PINCTRL_GROUP(i2c1),
UNIPHIER_PINCTRL_GROUP(i2c2),
@ -73,12 +88,12 @@ static const struct uniphier_pinctrl_group uniphier_pxs2_groups[] = {
UNIPHIER_PINCTRL_GROUP(nand),
UNIPHIER_PINCTRL_GROUP(nand_cs1),
UNIPHIER_PINCTRL_GROUP(sd),
UNIPHIER_PINCTRL_GROUP(uart0),
UNIPHIER_PINCTRL_GROUP(uart0b),
UNIPHIER_PINCTRL_GROUP(uart1),
UNIPHIER_PINCTRL_GROUP(uart2),
UNIPHIER_PINCTRL_GROUP(uart3),
UNIPHIER_PINCTRL_GROUP(uart3b),
UNIPHIER_PINCTRL_GROUP_SPL(uart0),
UNIPHIER_PINCTRL_GROUP_SPL(uart0b),
UNIPHIER_PINCTRL_GROUP_SPL(uart1),
UNIPHIER_PINCTRL_GROUP_SPL(uart2),
UNIPHIER_PINCTRL_GROUP_SPL(uart3),
UNIPHIER_PINCTRL_GROUP_SPL(uart3b),
UNIPHIER_PINCTRL_GROUP(usb0),
UNIPHIER_PINCTRL_GROUP(usb1),
UNIPHIER_PINCTRL_GROUP(usb2),
@ -86,25 +101,26 @@ static const struct uniphier_pinctrl_group uniphier_pxs2_groups[] = {
};
static const char * const uniphier_pxs2_functions[] = {
"emmc",
"i2c0",
"i2c1",
"i2c2",
"i2c3",
"i2c5",
"i2c6",
"nand",
"sd",
"uart0",
"uart0b",
"uart1",
"uart2",
"uart3",
"uart3b",
"usb0",
"usb1",
"usb2",
"usb3",
UNIPHIER_PINMUX_FUNCTION_SPL(emmc),
UNIPHIER_PINMUX_FUNCTION(ether_mii),
UNIPHIER_PINMUX_FUNCTION(ether_rgmii),
UNIPHIER_PINMUX_FUNCTION(ether_rmii),
UNIPHIER_PINMUX_FUNCTION(i2c0),
UNIPHIER_PINMUX_FUNCTION(i2c1),
UNIPHIER_PINMUX_FUNCTION(i2c2),
UNIPHIER_PINMUX_FUNCTION(i2c3),
UNIPHIER_PINMUX_FUNCTION(i2c5),
UNIPHIER_PINMUX_FUNCTION(i2c6),
UNIPHIER_PINMUX_FUNCTION(nand),
UNIPHIER_PINMUX_FUNCTION(sd),
UNIPHIER_PINMUX_FUNCTION_SPL(uart0),
UNIPHIER_PINMUX_FUNCTION_SPL(uart1),
UNIPHIER_PINMUX_FUNCTION_SPL(uart2),
UNIPHIER_PINMUX_FUNCTION_SPL(uart3),
UNIPHIER_PINMUX_FUNCTION(usb0),
UNIPHIER_PINMUX_FUNCTION(usb1),
UNIPHIER_PINMUX_FUNCTION(usb2),
UNIPHIER_PINMUX_FUNCTION(usb3),
};
static struct uniphier_pinctrl_socdata uniphier_pxs2_pinctrl_socdata = {
@ -122,7 +138,7 @@ static int uniphier_pxs2_pinctrl_probe(struct udevice *dev)
}
static const struct udevice_id uniphier_pxs2_pinctrl_match[] = {
{ .compatible = "socionext,proxstream2-pinctrl" },
{ .compatible = "socionext,uniphier-pxs2-pinctrl" },
{ /* sentinel */ }
};

87
drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c
View file

@ -38,43 +38,52 @@ static const struct uniphier_pinctrl_pin uniphier_sld8_pins[] = {
};
static const unsigned emmc_pins[] = {21, 22, 23, 24, 25, 26, 27};
static const unsigned emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1};
static const int emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1};
static const unsigned emmc_dat8_pins[] = {28, 29, 30, 31};
static const unsigned emmc_dat8_muxvals[] = {1, 1, 1, 1};
static const int emmc_dat8_muxvals[] = {1, 1, 1, 1};
static const unsigned ether_mii_pins[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 13, 14,
61, 63, 64, 65, 66, 67, 68};
static const int ether_mii_muxvals[] = {13, 13, 13, 13, 13, 13, 13, 13, 13, 13,
13, 13, 27, 27, 27, 27, 27, 27, 27};
static const unsigned ether_rmii_pins[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 13,
14};
static const int ether_rmii_muxvals[] = {13, 13, 13, 13, 13, 13, 13, 13, 13,
13, 13, 13};
static const unsigned i2c0_pins[] = {102, 103};
static const unsigned i2c0_muxvals[] = {0, 0};
static const int i2c0_muxvals[] = {0, 0};
static const unsigned i2c1_pins[] = {104, 105};
static const unsigned i2c1_muxvals[] = {0, 0};
static const int i2c1_muxvals[] = {0, 0};
static const unsigned i2c2_pins[] = {108, 109};
static const unsigned i2c2_muxvals[] = {2, 2};
static const int i2c2_muxvals[] = {2, 2};
static const unsigned i2c3_pins[] = {108, 109};
static const unsigned i2c3_muxvals[] = {3, 3};
static const int i2c3_muxvals[] = {3, 3};
static const unsigned nand_pins[] = {15, 16, 17, 18, 19, 20, 21, 24, 25, 26,
27, 28, 29, 30, 31};
static const unsigned nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0};
static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
static const unsigned nand_cs1_pins[] = {22, 23};
static const unsigned nand_cs1_muxvals[] = {0, 0};
static const int nand_cs1_muxvals[] = {0, 0};
static const unsigned sd_pins[] = {32, 33, 34, 35, 36, 37, 38, 39, 40};
static const unsigned sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
static const unsigned uart0_pins[] = {70, 71};
static const unsigned uart0_muxvals[] = {3, 3};
static const int uart0_muxvals[] = {3, 3};
static const unsigned uart1_pins[] = {114, 115};
static const unsigned uart1_muxvals[] = {0, 0};
static const int uart1_muxvals[] = {0, 0};
static const unsigned uart2_pins[] = {112, 113};
static const unsigned uart2_muxvals[] = {1, 1};
static const int uart2_muxvals[] = {1, 1};
static const unsigned uart3_pins[] = {110, 111};
static const unsigned uart3_muxvals[] = {1, 1};
static const int uart3_muxvals[] = {1, 1};
static const unsigned usb0_pins[] = {41, 42};
static const unsigned usb0_muxvals[] = {0, 0};
static const int usb0_muxvals[] = {0, 0};
static const unsigned usb1_pins[] = {43, 44};
static const unsigned usb1_muxvals[] = {0, 0};
static const int usb1_muxvals[] = {0, 0};
static const unsigned usb2_pins[] = {114, 115};
static const unsigned usb2_muxvals[] = {1, 1};
static const int usb2_muxvals[] = {1, 1};
static const struct uniphier_pinctrl_group uniphier_sld8_groups[] = {
UNIPHIER_PINCTRL_GROUP(emmc),
UNIPHIER_PINCTRL_GROUP(emmc_dat8),
UNIPHIER_PINCTRL_GROUP_SPL(emmc),
UNIPHIER_PINCTRL_GROUP_SPL(emmc_dat8),
UNIPHIER_PINCTRL_GROUP(ether_mii),
UNIPHIER_PINCTRL_GROUP(ether_rmii),
UNIPHIER_PINCTRL_GROUP(i2c0),
UNIPHIER_PINCTRL_GROUP(i2c1),
UNIPHIER_PINCTRL_GROUP(i2c2),
@ -82,30 +91,32 @@ static const struct uniphier_pinctrl_group uniphier_sld8_groups[] = {
UNIPHIER_PINCTRL_GROUP(nand),
UNIPHIER_PINCTRL_GROUP(nand_cs1),
UNIPHIER_PINCTRL_GROUP(sd),
UNIPHIER_PINCTRL_GROUP(uart0),
UNIPHIER_PINCTRL_GROUP(uart1),
UNIPHIER_PINCTRL_GROUP(uart2),
UNIPHIER_PINCTRL_GROUP(uart3),
UNIPHIER_PINCTRL_GROUP_SPL(uart0),
UNIPHIER_PINCTRL_GROUP_SPL(uart1),
UNIPHIER_PINCTRL_GROUP_SPL(uart2),
UNIPHIER_PINCTRL_GROUP_SPL(uart3),
UNIPHIER_PINCTRL_GROUP(usb0),
UNIPHIER_PINCTRL_GROUP(usb1),
UNIPHIER_PINCTRL_GROUP(usb2),
};
static const char * const uniphier_sld8_functions[] = {
"emmc",
"i2c0",
"i2c1",
"i2c2",
"i2c3",
"nand",
"sd",
"uart0",
"uart1",
"uart2",
"uart3",
"usb0",
"usb1",
"usb2",
UNIPHIER_PINMUX_FUNCTION_SPL(emmc),
UNIPHIER_PINMUX_FUNCTION(ether_mii),
UNIPHIER_PINMUX_FUNCTION(ether_rmii),
UNIPHIER_PINMUX_FUNCTION(i2c0),
UNIPHIER_PINMUX_FUNCTION(i2c1),
UNIPHIER_PINMUX_FUNCTION(i2c2),
UNIPHIER_PINMUX_FUNCTION(i2c3),
UNIPHIER_PINMUX_FUNCTION(nand),
UNIPHIER_PINMUX_FUNCTION(sd),
UNIPHIER_PINMUX_FUNCTION_SPL(uart0),
UNIPHIER_PINMUX_FUNCTION_SPL(uart1),
UNIPHIER_PINMUX_FUNCTION_SPL(uart2),
UNIPHIER_PINMUX_FUNCTION_SPL(uart3),
UNIPHIER_PINMUX_FUNCTION(usb0),
UNIPHIER_PINMUX_FUNCTION(usb1),
UNIPHIER_PINMUX_FUNCTION(usb2),
};
static struct uniphier_pinctrl_socdata uniphier_sld8_pinctrl_socdata = {
@ -123,7 +134,7 @@ static int uniphier_sld8_pinctrl_probe(struct udevice *dev)
}
static const struct udevice_id uniphier_sld8_pinctrl_match[] = {
{ .compatible = "socionext,ph1-sld8-pinctrl" },
{ .compatible = "socionext,uniphier-sld8-pinctrl" },
{ /* sentinel */ }
};

23
drivers/pinctrl/uniphier/pinctrl-uniphier.h
View file

@ -12,9 +12,9 @@
#include <linux/kernel.h>
#include <linux/types.h>
#define UNIPHIER_PINCTRL_PINMUX_BASE 0x0
#define UNIPHIER_PINCTRL_LOAD_PINMUX 0x700
#define UNIPHIER_PINCTRL_IECTRL 0xd00
#define UNIPHIER_PINCTRL_PINMUX_BASE 0x1000
#define UNIPHIER_PINCTRL_LOAD_PINMUX 0x1700
#define UNIPHIER_PINCTRL_IECTRL 0x1d00
#define UNIPHIER_PIN_ATTR_PACKED(iectrl) (iectrl)
@ -46,7 +46,7 @@ struct uniphier_pinctrl_group {
const char *name;
const unsigned *pins;
unsigned num_pins;
const unsigned *muxvals;
const int *muxvals;
};
/**
@ -80,7 +80,7 @@ struct uniphier_pinctrl_socdata {
.data = UNIPHIER_PIN_ATTR_PACKED(b), \
}
#define UNIPHIER_PINCTRL_GROUP(grp) \
#define __UNIPHIER_PINCTRL_GROUP(grp) \
{ \
.name = #grp, \
.pins = grp##_pins, \
@ -90,6 +90,19 @@ struct uniphier_pinctrl_socdata {
ARRAY_SIZE(grp##_muxvals)), \
}
#define __UNIPHIER_PINMUX_FUNCTION(func) #func
#ifdef CONFIG_SPL_BUILD
#define UNIPHIER_PINCTRL_GROUP(grp) { .name = NULL }
#define UNIPHIER_PINMUX_FUNCTION(func) NULL
#else
#define UNIPHIER_PINCTRL_GROUP(grp) __UNIPHIER_PINCTRL_GROUP(grp)
#define UNIPHIER_PINMUX_FUNCTION(func) __UNIPHIER_PINMUX_FUNCTION(func)
#endif
#define UNIPHIER_PINCTRL_GROUP_SPL(grp) __UNIPHIER_PINCTRL_GROUP(grp)
#define UNIPHIER_PINMUX_FUNCTION_SPL(func) __UNIPHIER_PINMUX_FUNCTION(func)
/**
* struct uniphier_pinctrl_priv - private data for UniPhier pinctrl driver
*