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arm: mxs: olinuxino: Fine-tune DRAM configuration
Add fine-tuning for the DRAM configuration according to the DRAM chip datasheet. THis configuration applies to both Hynix HY5DU12622DTP and Samsung K5H511538J-D43 . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
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1 changed files with 30 additions and 0 deletions
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@ -78,3 +78,33 @@ int board_init(void)
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return 0;
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}
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/* Fine-tune the DRAM configuration. */
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void mxs_adjust_memory_params(uint32_t *dram_vals)
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{
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/* Enable Auto Precharge. */
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dram_vals[3] |= 1 << 8;
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/* Enable Fast Writes. */
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dram_vals[5] |= 1 << 8;
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/* tEMRS = 3*tCK */
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dram_vals[10] &= ~(0x3 << 8);
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dram_vals[10] |= (0x3 << 8);
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/* CASLAT = 3*tCK */
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dram_vals[11] &= ~(0x3 << 0);
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dram_vals[11] |= (0x3 << 0);
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/* tCKE = 1*tCK */
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dram_vals[12] &= ~(0x7 << 0);
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dram_vals[12] |= (0x1 << 0);
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/* CASLAT_LIN_GATE = 3*tCK , CASLAT_LIN = 3*tCK, tWTR=2*tCK */
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dram_vals[13] &= ~((0xf << 16) | (0xf << 24) | (0xf << 0));
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dram_vals[13] |= (0x6 << 16) | (0x6 << 24) | (0x2 << 0);
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/* tDAL = 6*tCK */
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dram_vals[15] &= ~(0xf << 16);
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dram_vals[15] |= (0x6 << 16);
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/* tREF = 1040*tCK */
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dram_vals[26] &= ~0xffff;
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dram_vals[26] |= 0x0410;
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/* tRAS_MAX = 9334*tCK */
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dram_vals[32] &= ~0xffff;
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dram_vals[32] |= 0x2475;
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}
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