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https://github.com/AsahiLinux/u-boot
synced 2024-11-10 15:14:43 +00:00
Convert CONFIG_FSL_USDHC to Kconfig
This converts the following to Kconfig: CONFIG_FSL_USDHC Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
parent
75c995a1be
commit
1ed68f9204
21 changed files with 11 additions and 22 deletions
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@ -81,7 +81,7 @@ CONFIG_DM_I2C=y
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CONFIG_DM_KEYBOARD=y
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CONFIG_SUPPORT_EMMC_RPMB=y
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CONFIG_SUPPORT_EMMC_BOOT=y
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CONFIG_FSL_ESDHC_IMX=y
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CONFIG_FSL_USDHC=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_PHYLIB=y
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CONFIG_PHY_ATHEROS=y
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@ -84,7 +84,7 @@ CONFIG_DM_I2C=y
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CONFIG_DM_KEYBOARD=y
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CONFIG_SUPPORT_EMMC_RPMB=y
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CONFIG_SUPPORT_EMMC_BOOT=y
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CONFIG_FSL_ESDHC_IMX=y
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CONFIG_FSL_USDHC=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_PHYLIB=y
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CONFIG_PHY_ATHEROS=y
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@ -60,7 +60,7 @@ CONFIG_MMC_IO_VOLTAGE=y
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CONFIG_MMC_UHS_SUPPORT=y
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CONFIG_MMC_HS400_ES_SUPPORT=y
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CONFIG_MMC_HS400_SUPPORT=y
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CONFIG_FSL_ESDHC_IMX=y
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CONFIG_FSL_USDHC=y
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CONFIG_PHYLIB=y
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CONFIG_PHY_ATHEROS=y
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CONFIG_DM_ETH=y
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@ -63,7 +63,7 @@ CONFIG_MMC_IO_VOLTAGE=y
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CONFIG_MMC_UHS_SUPPORT=y
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CONFIG_MMC_HS400_ES_SUPPORT=y
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CONFIG_MMC_HS400_SUPPORT=y
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CONFIG_FSL_ESDHC_IMX=y
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CONFIG_FSL_USDHC=y
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CONFIG_PHYLIB=y
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CONFIG_DM_ETH=y
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CONFIG_PINCTRL=y
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@ -65,7 +65,7 @@ CONFIG_MMC_IO_VOLTAGE=y
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CONFIG_MMC_UHS_SUPPORT=y
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CONFIG_MMC_HS400_ES_SUPPORT=y
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CONFIG_MMC_HS400_SUPPORT=y
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CONFIG_FSL_ESDHC_IMX=y
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CONFIG_FSL_USDHC=y
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CONFIG_PHYLIB=y
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CONFIG_DM_ETH=y
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CONFIG_PINCTRL=y
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@ -71,7 +71,7 @@ CONFIG_MMC_IO_VOLTAGE=y
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CONFIG_MMC_UHS_SUPPORT=y
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CONFIG_MMC_HS400_ES_SUPPORT=y
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CONFIG_MMC_HS400_SUPPORT=y
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CONFIG_FSL_ESDHC_IMX=y
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CONFIG_FSL_USDHC=y
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CONFIG_PHY_REALTEK=y
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CONFIG_DM_ETH=y
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CONFIG_DM_ETH_PHY=y
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@ -60,7 +60,7 @@ CONFIG_I2C_MUX=y
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CONFIG_I2C_MUX_PCA954x=y
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CONFIG_MISC=y
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CONFIG_SUPPORT_EMMC_BOOT=y
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CONFIG_FSL_ESDHC_IMX=y
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CONFIG_FSL_USDHC=y
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CONFIG_PHYLIB=y
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CONFIG_PHY_ADDR_ENABLE=y
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CONFIG_PHY_ATHEROS=y
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@ -79,7 +79,7 @@ CONFIG_MMC_IO_VOLTAGE=y
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CONFIG_MMC_UHS_SUPPORT=y
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CONFIG_MMC_HS400_ES_SUPPORT=y
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CONFIG_MMC_HS400_SUPPORT=y
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CONFIG_FSL_ESDHC_IMX=y
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CONFIG_FSL_USDHC=y
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CONFIG_MTD=y
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CONFIG_DM_MTD=y
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CONFIG_DM_SPI_FLASH=y
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@ -80,7 +80,7 @@ CONFIG_MMC_IO_VOLTAGE=y
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CONFIG_MMC_UHS_SUPPORT=y
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CONFIG_MMC_HS400_ES_SUPPORT=y
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CONFIG_MMC_HS400_SUPPORT=y
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CONFIG_FSL_ESDHC_IMX=y
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CONFIG_FSL_USDHC=y
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CONFIG_MTD=y
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CONFIG_DM_MTD=y
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CONFIG_DM_SPI_FLASH=y
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@ -81,7 +81,7 @@ CONFIG_MMC_IO_VOLTAGE=y
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CONFIG_MMC_UHS_SUPPORT=y
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CONFIG_MMC_HS400_ES_SUPPORT=y
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CONFIG_MMC_HS400_SUPPORT=y
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CONFIG_FSL_ESDHC_IMX=y
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CONFIG_FSL_USDHC=y
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CONFIG_PHYLIB=y
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CONFIG_PHY_TI_DP83867=y
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CONFIG_DM_ETH=y
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@ -76,7 +76,7 @@ CONFIG_DM_I2C=y
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CONFIG_MISC=y
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CONFIG_I2C_EEPROM=y
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CONFIG_SUPPORT_EMMC_BOOT=y
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CONFIG_FSL_ESDHC_IMX=y
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CONFIG_FSL_USDHC=y
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CONFIG_PHYLIB=y
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CONFIG_PHY_ADDR_ENABLE=y
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CONFIG_PHY_MICREL=y
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@ -21,7 +21,6 @@
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#define CONFIG_MXC_GPT_HCLK
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/* MMC */
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#define CONFIG_FSL_USDHC
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/* Boot */
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@ -165,7 +165,6 @@
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sizeof(CONFIG_SYS_PROMPT) + 16)
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/* USDHC */
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#define CONFIG_FSL_USDHC
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#define CONFIG_SYS_FSL_USDHC_NUM 2
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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@ -81,7 +81,6 @@
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sizeof(CONFIG_SYS_PROMPT) + 16)
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/* USDHC */
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#define CONFIG_FSL_USDHC
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#define CONFIG_SYS_FSL_USDHC_NUM 2
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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@ -80,7 +80,6 @@
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sizeof(CONFIG_SYS_PROMPT) + 16)
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/* USDHC */
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#define CONFIG_FSL_USDHC
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#define CONFIG_SYS_FSL_USDHC_NUM 2
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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@ -97,8 +97,6 @@
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_FSL_USDHC
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#define CONFIG_SYS_FSL_USDHC_NUM 2
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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@ -15,7 +15,6 @@
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#define CONFIG_SPL_BSS_START_ADDR 0x00128000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */
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#define CONFIG_FSL_USDHC
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#define CONFIG_SYS_BOOTMAPSZ (256 << 20)
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define USDHC1_BASE_ADDR 0x5B010000
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@ -54,7 +54,6 @@
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#define CONFIG_SYS_BOOTM_LEN SZ_64M
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#define CONFIG_SPL_MAX_SIZE (148 * SZ_1K)
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#define CONFIG_FSL_USDHC
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_SPL_STACK 0x91fff0
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@ -103,7 +103,6 @@
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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/* USDHC */
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#define CONFIG_FSL_USDHC
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#define CONFIG_SYS_FSL_USDHC_NUM 2
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
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@ -103,7 +103,6 @@
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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/* USDHC */
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#define CONFIG_FSL_USDHC
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#define CONFIG_SYS_FSL_USDHC_NUM 2
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
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@ -101,7 +101,6 @@
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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/* USDHC */
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#define CONFIG_FSL_USDHC
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#define CONFIG_SYS_FSL_USDHC_NUM 2
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
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