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sunxi: cleanup sunxi-common.h
The sunxi-common.h configs header used to contain a lot of random Allwinner platform related constants, but over the years we moved a lot of those definitions out there. Clean up the file to remove outdated comments which are leftovers from the olden days. Also remove the definition of LOW_LEVEL_SRAM_STACK, which is actually used nowhere in the whole source tree. This also uses the opportunity to add some section comments that helps structuring the header file and improving readability. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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1 changed files with 12 additions and 44 deletions
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@ -14,8 +14,9 @@
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#include <linux/stringify.h>
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/* Serial & console */
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/* ns16550 reg in the low bits of cpu reg */
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/****************************************************************************
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* base addresses for the SPL UART driver *
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****************************************************************************/
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#ifdef CONFIG_MACH_SUNIV
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/* suniv doesn't have apb2 and uart is connected to apb1 */
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#define CFG_SYS_NS16550_CLK 100000000
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@ -31,8 +32,9 @@
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# define CFG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
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#endif
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/* CPU */
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/****************************************************************************
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* DRAM base address *
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****************************************************************************/
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/*
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* The DRAM Base differs between some models. We cannot use macros for the
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* CONFIG_FOO defines which contain the DRAM base address since they end
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@ -52,16 +54,6 @@
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/* V3s do not have enough memory to place code at 0x4a000000 */
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#endif
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/*
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* The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
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* slightly bigger. Note that it is possible to map the first 32 KiB of the
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* A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
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* undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
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* the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
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* A64 and H5 also has SRAM A1 at 0x00010000, but no magic remap register
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* is known yet.
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* H6 has SRAM A1 at 0x00020000.
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*/
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#define CFG_SYS_INIT_RAM_ADDR CONFIG_SUNXI_SRAM_ADDRESS
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/* FIXME: this may be larger on some SoCs */
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#define CFG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
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@ -69,36 +61,13 @@
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#define PHYS_SDRAM_0 CFG_SYS_SDRAM_BASE
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#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
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/*
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* Miscellaneous configurable options
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*/
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/* FLASH and environment organization */
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/****************************************************************************
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* environment variables holding default load addresses *
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****************************************************************************/
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/*
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* We cannot use expressions here, because expressions won't be evaluated in
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* autoconf.mk.
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*/
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#if CONFIG_SUNXI_SRAM_ADDRESS == 0x10000
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#ifdef CONFIG_ARM64
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/* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */
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#define LOW_LEVEL_SRAM_STACK 0x00054000
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#else
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#define LOW_LEVEL_SRAM_STACK 0x00018000
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#endif /* !CONFIG_ARM64 */
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#elif CONFIG_SUNXI_SRAM_ADDRESS == 0x20000
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#ifdef CONFIG_MACH_SUN50I_H616
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#define LOW_LEVEL_SRAM_STACK 0x52a00 /* below FEL buffers */
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#else
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/* end of SRAM A2 on H6 for now */
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#define LOW_LEVEL_SRAM_STACK 0x00118000
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#endif
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#else
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#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
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#endif
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/* Ethernet support */
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#ifdef CONFIG_ARM64
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/*
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* Boards seem to come with at least 512MB of DRAM.
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@ -174,15 +143,11 @@
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"ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
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#ifdef CONFIG_ARM64
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#define MEM_LAYOUT_ENV_EXTRA_SETTINGS \
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"kernel_comp_addr_r=" KERNEL_COMP_ADDR_R "\0" \
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"kernel_comp_size=" KERNEL_COMP_SIZE "\0"
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#else
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#define MEM_LAYOUT_ENV_EXTRA_SETTINGS ""
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#endif
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#define DFU_ALT_INFO_RAM \
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"fdt ram " FDT_ADDR_R " 0x100000;" \
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"ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
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/****************************************************************************
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* definitions for the distro boot system *
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****************************************************************************/
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#ifdef CONFIG_MMC
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#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
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#define BOOTENV_DEV_MMC_AUTO(devtypeu, devtypel, instance) \
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