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configs: P1010RDB: Enable DM_ETH config
Enable the DM_ETH and DM_MDIO config. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This commit is contained in:
parent
c5166ceb13
commit
1e944259f5
16 changed files with 32 additions and 0 deletions
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@ -75,8 +75,10 @@ CONFIG_PHY_SMSC=y
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CONFIG_PHY_VITESSE=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_DM_ETH=y
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CONFIG_MII=y
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CONFIG_TSEC_ENET=y
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CONFIG_DM_MDIO=y
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CONFIG_DM_PCI=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -57,8 +57,10 @@ CONFIG_PHY_SMSC=y
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CONFIG_PHY_VITESSE=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_DM_ETH=y
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CONFIG_MII=y
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CONFIG_TSEC_ENET=y
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CONFIG_DM_MDIO=y
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CONFIG_DM_PCI=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -69,8 +69,10 @@ CONFIG_PHY_SMSC=y
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CONFIG_PHY_VITESSE=y
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CONFIG_PHY_GIGE=y
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||||
CONFIG_E1000=y
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CONFIG_DM_ETH=y
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CONFIG_MII=y
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CONFIG_TSEC_ENET=y
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CONFIG_DM_MDIO=y
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CONFIG_DM_PCI=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -71,8 +71,10 @@ CONFIG_PHY_SMSC=y
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CONFIG_PHY_VITESSE=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_DM_ETH=y
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CONFIG_MII=y
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CONFIG_TSEC_ENET=y
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CONFIG_DM_MDIO=y
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CONFIG_DM_PCI=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -74,8 +74,10 @@ CONFIG_PHY_SMSC=y
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CONFIG_PHY_VITESSE=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_DM_ETH=y
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CONFIG_MII=y
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CONFIG_TSEC_ENET=y
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CONFIG_DM_MDIO=y
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CONFIG_DM_PCI=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -56,8 +56,10 @@ CONFIG_PHY_SMSC=y
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CONFIG_PHY_VITESSE=y
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||||
CONFIG_PHY_GIGE=y
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||||
CONFIG_E1000=y
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CONFIG_DM_ETH=y
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CONFIG_MII=y
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CONFIG_TSEC_ENET=y
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CONFIG_DM_MDIO=y
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CONFIG_DM_PCI=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -68,8 +68,10 @@ CONFIG_PHY_SMSC=y
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CONFIG_PHY_VITESSE=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_DM_ETH=y
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CONFIG_MII=y
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CONFIG_TSEC_ENET=y
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CONFIG_DM_MDIO=y
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CONFIG_DM_PCI=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -70,8 +70,10 @@ CONFIG_PHY_SMSC=y
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CONFIG_PHY_VITESSE=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_DM_ETH=y
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CONFIG_MII=y
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CONFIG_TSEC_ENET=y
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CONFIG_DM_MDIO=y
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CONFIG_DM_PCI=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -75,8 +75,10 @@ CONFIG_PHY_SMSC=y
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CONFIG_PHY_VITESSE=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_DM_ETH=y
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CONFIG_MII=y
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CONFIG_TSEC_ENET=y
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CONFIG_DM_MDIO=y
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CONFIG_DM_PCI=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -57,8 +57,10 @@ CONFIG_PHY_SMSC=y
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CONFIG_PHY_VITESSE=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_DM_ETH=y
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CONFIG_MII=y
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CONFIG_TSEC_ENET=y
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CONFIG_DM_MDIO=y
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CONFIG_DM_PCI=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -69,8 +69,10 @@ CONFIG_PHY_SMSC=y
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CONFIG_PHY_VITESSE=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_DM_ETH=y
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CONFIG_MII=y
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CONFIG_TSEC_ENET=y
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CONFIG_DM_MDIO=y
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CONFIG_DM_PCI=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -71,8 +71,10 @@ CONFIG_PHY_SMSC=y
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CONFIG_PHY_VITESSE=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_DM_ETH=y
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CONFIG_MII=y
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CONFIG_TSEC_ENET=y
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CONFIG_DM_MDIO=y
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CONFIG_DM_PCI=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -74,8 +74,10 @@ CONFIG_PHY_SMSC=y
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CONFIG_PHY_VITESSE=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_DM_ETH=y
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CONFIG_MII=y
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CONFIG_TSEC_ENET=y
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CONFIG_DM_MDIO=y
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CONFIG_DM_PCI=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -56,8 +56,10 @@ CONFIG_PHY_SMSC=y
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CONFIG_PHY_VITESSE=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_DM_ETH=y
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CONFIG_MII=y
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CONFIG_TSEC_ENET=y
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CONFIG_DM_MDIO=y
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CONFIG_DM_PCI=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -68,8 +68,10 @@ CONFIG_PHY_SMSC=y
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CONFIG_PHY_VITESSE=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_DM_ETH=y
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CONFIG_MII=y
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CONFIG_TSEC_ENET=y
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CONFIG_DM_MDIO=y
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CONFIG_DM_PCI=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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@ -70,8 +70,10 @@ CONFIG_PHY_SMSC=y
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CONFIG_PHY_VITESSE=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_DM_ETH=y
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CONFIG_MII=y
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CONFIG_TSEC_ENET=y
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CONFIG_DM_MDIO=y
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CONFIG_DM_PCI=y
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CONFIG_DM_PCI_COMPAT=y
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CONFIG_PCIE_FSL=y
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