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mmc: sh_mmcif: Migrate configs to CONFIG_SH_MMCIF
Migrate the U-Boot configs to Kconfig CONFIG_SH_MMCIF . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Jaehoon Chung <jh80.chung@samsung.com>
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f3dca4aac6
commit
1ddbcf46bf
13 changed files with 6 additions and 7 deletions
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@ -25,6 +25,7 @@ CONFIG_CMD_EXT4_WRITE=y
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CONFIG_CMD_FAT=y
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CONFIG_OF_CONTROL=y
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_SH_MMCIF=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_BAR=y
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CONFIG_SPI_FLASH_SPANSION=y
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@ -25,6 +25,7 @@ CONFIG_CMD_EXT4_WRITE=y
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CONFIG_CMD_FAT=y
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CONFIG_OF_CONTROL=y
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_SH_MMCIF=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_BAR=y
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CONFIG_SPI_FLASH_SPANSION=y
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@ -31,6 +31,7 @@ CONFIG_MAC_PARTITION=y
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CONFIG_DOS_PARTITION=y
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_MMC=y
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CONFIG_SH_MMCIF=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SPI_FLASH_STMICRO=y
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@ -30,6 +30,7 @@ CONFIG_MAC_PARTITION=y
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CONFIG_DOS_PARTITION=y
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_MMC=y
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CONFIG_SH_MMCIF=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SPI_FLASH_STMICRO=y
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@ -33,6 +33,7 @@ CONFIG_MAC_PARTITION=y
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CONFIG_DOS_PARTITION=y
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_MMC=y
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CONFIG_SH_MMCIF=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_NETDEVICES=y
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@ -25,6 +25,7 @@ CONFIG_CMD_EXT4_WRITE=y
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CONFIG_CMD_FAT=y
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CONFIG_OF_CONTROL=y
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_SH_MMCIF=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_BAR=y
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CONFIG_SPI_FLASH_SPANSION=y
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@ -73,7 +73,6 @@
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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/* MMCIF */
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#define CONFIG_SH_MMCIF
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#define CONFIG_SH_MMCIF_ADDR 0xee200000
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#define CONFIG_SH_MMCIF_CLK 48000000
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@ -72,7 +72,6 @@
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
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/* MMC */
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#define CONFIG_SH_MMCIF
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#define CONFIG_SH_MMCIF_ADDR 0xEE220000
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#define CONFIG_SH_MMCIF_CLK 97500000
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@ -60,7 +60,6 @@
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#define CONFIG_SH_SPI_BASE 0xfe002000
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/* MMCIF */
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#define CONFIG_SH_MMCIF 1
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#define CONFIG_SH_MMCIF_ADDR 0xffcb0000
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#define CONFIG_SH_MMCIF_CLK 48000000
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@ -60,7 +60,6 @@
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#define CONFIG_SH_SPI_BASE 0xfe002000
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/* MMCIF */
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#define CONFIG_SH_MMCIF 1
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#define CONFIG_SH_MMCIF_ADDR 0xffcb0000
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#define CONFIG_SH_MMCIF_CLK 48000000
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@ -64,7 +64,6 @@
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#define CONFIG_SH_SPI_BASE 0xfe002000
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/* MMCIF */
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#define CONFIG_SH_MMCIF 1
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#define CONFIG_SH_MMCIF_ADDR 0xffcb0000
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#define CONFIG_SH_MMCIF_CLK 48000000
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@ -74,7 +74,6 @@
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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/* MMCIF */
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#define CONFIG_SH_MMCIF
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#define CONFIG_SH_MMCIF_ADDR 0xee200000
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#define CONFIG_SH_MMCIF_CLK 48000000
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@ -1820,7 +1820,6 @@ CONFIG_SH_I2C_8BIT
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CONFIG_SH_I2C_CLOCK
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CONFIG_SH_I2C_DATA_HIGH
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CONFIG_SH_I2C_DATA_LOW
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CONFIG_SH_MMCIF
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CONFIG_SH_MMCIF_ADDR
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CONFIG_SH_MMCIF_CLK
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CONFIG_SH_QSPI_BASE
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