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arm: mvebu: a37xx: Add support for writing Security OTP values
Implement write support for Security OTP values via mailbox API commands MBOX_CMD_OTP_WRITE_32B and MBOX_CMD_OTP_WRITE. Write support for North and South Bridge OTPs are not implemented as these OTPs are already burned in factory with some data. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz>
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2975bba6df
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1d71bbca45
1 changed files with 48 additions and 2 deletions
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@ -113,6 +113,41 @@ static int rwtm_otp_read(u8 row, u32 word, u32 *data)
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return res;
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}
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static int rwtm_otp_write(u8 row, u32 word, u32 data)
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{
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u32 in[4];
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int res = -EINVAL;
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if (word < 2) {
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/*
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* MBOX_CMD_OTP_WRITE_32B command is supported by Marvell
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* fuse.bin firmware and also by new CZ.NIC wtmi firmware.
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* This command writes only selected bits to OTP and does
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* not calculate ECC bits. It does not allow to write the
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* lock bit.
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*/
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in[0] = row;
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in[1] = word * 32;
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in[2] = data;
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res = mbox_do_cmd(MBOX_CMD_OTP_WRITE_32B, in, 3, NULL, 0);
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} else if (word == 2 && !(data & ~0x1)) {
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/*
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* MBOX_CMD_OTP_WRITE command is supported only by new CZ.NIC
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* wtmi firmware and allows to write any bit to OTP, including
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* the lock bit. It does not calculate or write ECC bits too.
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* For compatibility with Marvell fuse.bin firmware, use this
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* command only for writing the lock bit.
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*/
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in[0] = row;
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in[1] = 0;
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in[2] = 0;
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in[3] = data;
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res = mbox_do_cmd(MBOX_CMD_OTP_WRITE, in, 4, NULL, 0);
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}
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return res;
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}
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/*
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* Banks 0-43 are used for accessing Security OTP (44 rows with 67 bits via 44 banks and words 0-2)
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* Bank 44 is used for accessing North Bridge OTP (69 bits via words 0-2)
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@ -154,8 +189,19 @@ int fuse_read(u32 bank, u32 word, u32 *val)
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int fuse_prog(u32 bank, u32 word, u32 val)
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{
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if (bank <= RWTM_MAX_BANK) {
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if (word >= RWTM_ROW_WORDS)
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return -EINVAL;
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return rwtm_otp_write(bank, word, val);
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} else if (bank == OTP_NB_BANK) {
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/* TODO: not implemented yet */
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return -ENOSYS;
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} else if (bank == OTP_SB_BANK) {
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/* TODO: not implemented yet */
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return -ENOSYS;
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} else {
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return -EINVAL;
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}
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}
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int fuse_sense(u32 bank, u32 word, u32 *val)
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