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powerpc/85xx: Add the workaround for erratum CPC-A002 (enable on P4080)
CoreNet Platform Cache single-bit tag error scrubbing will cause tag corruption. Disable the feature to workaround the issue. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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4 changed files with 11 additions and 1 deletions
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@ -59,6 +59,10 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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#if defined(CONFIG_SYS_FSL_ERRATUM_ESDHC136)
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puts("Work-around for Erratum ESDHC136 enabled\n");
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#endif
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#ifdef CONFIG_SYS_FSL_ERRATUM_CPC_A002
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puts("Work-around for Erratum CPC-A002 enabled\n");
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#endif
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return 0;
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}
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@ -142,6 +142,10 @@ static void enable_cpc(void)
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u32 cpccfg0 = in_be32(&cpc->cpccfg0);
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size += CPC_CFG0_SZ_K(cpccfg0);
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#ifdef CONFIG_SYS_FSL_ERRATUM_CPC_A002
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setbits_be32(&cpc->cpchdbcr0, CPC_HDBCR0_TAG_ECC_SCRUB_DIS);
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#endif
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out_be32(&cpc->cpccsr0, CPC_CSR0_CE | CPC_CSR0_PE);
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/* Read back to sync write */
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in_be32(&cpc->cpccsr0);
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@ -1,7 +1,7 @@
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/*
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* MPC85xx Internal Memory Map
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*
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* Copyright 2007-2010 Freescale Semiconductor, Inc.
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* Copyright 2007-2011 Freescale Semiconductor, Inc.
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*
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* Copyright(c) 2002,2003 Motorola Inc.
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* Xianghua Xiao (x.xiao@motorola.com)
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@ -1619,6 +1619,7 @@ typedef struct cpc_corenet {
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#define CPC_SRCR0_SRAMEN 0x00000001
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#define CPC_ERRDIS_TMHITDIS 0x00000080 /* multi-way hit disable */
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#define CPC_HDBCR0_CDQ_SPEC_DIS 0x08000000
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#define CPC_HDBCR0_TAG_ECC_SCRUB_DIS 0x01000000
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#endif /* CONFIG_SYS_FSL_CPC */
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/* Global Utilities Block */
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@ -40,6 +40,7 @@
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#define CONFIG_SYS_FSL_ERRATUM_ESDHC136
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#define CONFIG_SYS_P4080_ERRATUM_CPU22
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#define CONFIG_SYS_FSL_ERRATUM_CPC_A002
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#define CONFIG_SYS_P4080_ERRATUM_SERDES8
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#include "corenet_ds.h"
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