mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-28 15:41:40 +00:00
strider: Support con-dp flavor
There is a new strider console flavor with DisplayPort video. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Reviewed-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Dirk Eibach
Tom Rini
parent
df3223f9f7
commit
1d2541ba32
5 changed files with 121 additions and 6 deletions
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@ -16,3 +16,4 @@ obj-$(CONFIG_HRCON) += osd.o mclink.o dp501.o phy.o ioep-fpga.o fanctrl.o
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obj-$(CONFIG_STRIDER) += mclink.o dp501.o phy.o ioep-fpga.o adv7611.o ch7301.o
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obj-$(CONFIG_STRIDER) += fanctrl.o
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obj-$(CONFIG_STRIDER_CON) += osd.o
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obj-$(CONFIG_STRIDER_CON_DP) += osd.o
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@ -133,6 +133,9 @@ int last_stage_init(void)
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unsigned char mclink_controllers_dp[] = { 0x24, 0x25, 0x26 };
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#endif
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bool hw_type_cat = pca9698_get_value(0x20, 18);
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#ifdef CONFIG_STRIDER_CON_DP
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bool is_dh = pca9698_get_value(0x20, 25);
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#endif
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bool ch0_sgmii2_present = false;
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/* Turn on Analog Devices ADV7611 */
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@ -140,6 +143,7 @@ int last_stage_init(void)
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/* Turn on Parade DP501 */
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pca9698_direction_output(0x20, 10, 1);
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pca9698_direction_output(0x20, 11, 1);
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ch0_sgmii2_present = !pca9698_get_value(0x20, 37);
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@ -202,6 +206,14 @@ int last_stage_init(void)
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osd_probe(0);
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#endif
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#ifdef CONFIG_STRIDER_CON_DP
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if (ioep_fpga_has_osd(0)) {
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osd_probe(0);
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if (is_dh)
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osd_probe(4);
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}
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#endif
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#ifdef CONFIG_STRIDER_CPU
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ch7301_probe(0, false);
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dp501_probe(0, false);
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@ -226,6 +238,13 @@ int last_stage_init(void)
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if (ioep_fpga_has_osd(k))
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osd_probe(k);
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#endif
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#ifdef CONFIG_STRIDER_CON_DP
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if (ioep_fpga_has_osd(k)) {
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osd_probe(k);
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if (is_dh)
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osd_probe(k + 4);
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}
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#endif
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#ifdef CONFIG_STRIDER_CPU
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if (!adv7611_probe(k))
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printf(" Advantiv ADV7611 HDMI Receiver\n");
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@ -270,6 +289,24 @@ int fpga_gpio_get(unsigned int bus, int pin)
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return val & pin;
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}
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#ifdef CONFIG_STRIDER_CON_DP
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void fpga_control_set(unsigned int bus, int pin)
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{
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u16 val;
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FPGA_GET_REG(bus, control, &val);
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FPGA_SET_REG(bus, control, val | pin);
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}
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void fpga_control_clear(unsigned int bus, int pin)
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{
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u16 val;
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FPGA_GET_REG(bus, control, &val);
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FPGA_SET_REG(bus, control, val & ~pin);
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}
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#endif
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void mpc8308_init(void)
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{
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pca9698_direction_output(0x20, 26, 1);
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20
configs/strider_con_dp_defconfig
Normal file
20
configs/strider_con_dp_defconfig
Normal file
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@ -0,0 +1,20 @@
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CONFIG_PPC=y
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CONFIG_MPC83xx=y
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CONFIG_TARGET_STRIDER=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_SYS_EXTRA_OPTIONS="STRIDER_CON_DP"
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CONFIG_HUSH_PARSER=y
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CONFIG_AUTOBOOT_KEYED=y
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CONFIG_AUTOBOOT_STOP_STR=" "
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CONFIG_CMD_MEMTEST=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_I2C=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_EXT2=y
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CONFIG_SYS_NS16550=y
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CONFIG_OF_LIBFDT=y
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@ -22,6 +22,8 @@
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#ifdef CONFIG_STRIDER_CPU
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#define CONFIG_IDENT_STRING " strider cpu 0.01"
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#elif defined(CONFIG_STRIDER_CON_DP)
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#define CONFIG_IDENT_STRING " strider con dp 0.01"
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#else
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#define CONFIG_IDENT_STRING " strider con 0.01"
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#endif
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@ -225,15 +227,11 @@
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/*
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* FLASH on the Local Bus
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*/
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#if 1
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#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */
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#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */
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#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
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#define CONFIG_FLASH_CFI_LEGACY
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#define CONFIG_SYS_FLASH_LEGACY_512Kx16
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#else
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#define CONFIG_SYS_NO_FLASH
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#endif
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#define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */
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#define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size is up to 8M */
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@ -341,6 +339,22 @@
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#define CONFIG_SYS_I2C_IHS_SPEED_3 50000
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#define CONFIG_SYS_I2C_IHS_SLAVE_3 0x7F
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#ifdef CONFIG_STRIDER_CON_DP
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#define CONFIG_SYS_I2C_IHS_DUAL
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#define CONFIG_SYS_I2C_IHS_CH0_1
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#define CONFIG_SYS_I2C_IHS_SPEED_0_1 50000
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#define CONFIG_SYS_I2C_IHS_SLAVE_0_1 0x7F
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#define CONFIG_SYS_I2C_IHS_CH1_1
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#define CONFIG_SYS_I2C_IHS_SPEED_1_1 50000
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#define CONFIG_SYS_I2C_IHS_SLAVE_1_1 0x7F
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#define CONFIG_SYS_I2C_IHS_CH2_1
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#define CONFIG_SYS_I2C_IHS_SPEED_2_1 50000
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#define CONFIG_SYS_I2C_IHS_SLAVE_2_1 0x7F
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#define CONFIG_SYS_I2C_IHS_CH3_1
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#define CONFIG_SYS_I2C_IHS_SPEED_3_1 50000
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#define CONFIG_SYS_I2C_IHS_SLAVE_3_1 0x7F
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#endif
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/*
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* Software (bit-bang) I2C driver configuration
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*/
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@ -357,7 +371,7 @@
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#define I2C_SOFT_DECLARATIONS4
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#define CONFIG_SYS_I2C_SOFT_SPEED_4 50000
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#define CONFIG_SYS_I2C_SOFT_SLAVE_4 0x7F
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#ifdef CONFIG_STRIDER_CON
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#if defined(CONFIG_STRIDER_CON) || defined(CONFIG_STRIDER_CON_DP)
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#define I2C_SOFT_DECLARATIONS5
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#define CONFIG_SYS_I2C_SOFT_SPEED_5 50000
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#define CONFIG_SYS_I2C_SOFT_SLAVE_5 0x7F
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@ -371,12 +385,33 @@
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#define CONFIG_SYS_I2C_SOFT_SPEED_8 50000
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#define CONFIG_SYS_I2C_SOFT_SLAVE_8 0x7F
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#endif
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#ifdef CONFIG_STRIDER_CON_DP
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#define I2C_SOFT_DECLARATIONS9
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#define CONFIG_SYS_I2C_SOFT_SPEED_9 50000
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#define CONFIG_SYS_I2C_SOFT_SLAVE_9 0x7F
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#define I2C_SOFT_DECLARATIONS10
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#define CONFIG_SYS_I2C_SOFT_SPEED_10 50000
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#define CONFIG_SYS_I2C_SOFT_SLAVE_10 0x7F
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#define I2C_SOFT_DECLARATIONS11
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#define CONFIG_SYS_I2C_SOFT_SPEED_11 50000
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#define CONFIG_SYS_I2C_SOFT_SLAVE_11 0x7F
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#define I2C_SOFT_DECLARATIONS12
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#define CONFIG_SYS_I2C_SOFT_SPEED_12 50000
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#define CONFIG_SYS_I2C_SOFT_SLAVE_12 0x7F
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#endif
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#ifdef CONFIG_STRIDER_CON
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#define CONFIG_SYS_ICS8N3QV01_I2C {5, 6, 7, 8}
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#define CONFIG_SYS_CH7301_I2C {5, 6, 7, 8}
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#define CONFIG_SYS_ADV7611_I2C {5, 6, 7, 8}
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#define CONFIG_SYS_DP501_I2C {1, 2, 3, 4}
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#define CONFIG_STRIDER_FANS { {10, 0x4c}, {11, 0x4c}, \
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{12, 0x4c} }
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#elif defined(CONFIG_STRIDER_CON_DP)
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#define CONFIG_SYS_ICS8N3QV01_I2C {13, 14, 15, 16, 17, 18, 19, 20}
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#define CONFIG_SYS_CH7301_I2C {1, 3, 5, 7}
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#define CONFIG_SYS_ADV7611_I2C {1, 3, 5, 7}
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#define CONFIG_SYS_DP501_I2C {1, 3, 5, 7, 2, 4, 6, 8}
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#define CONFIG_STRIDER_FANS { {10, 0x4c}, {11, 0x4c}, \
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{12, 0x4c} }
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#else
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@ -391,6 +426,8 @@
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void fpga_gpio_set(unsigned int bus, int pin);
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void fpga_gpio_clear(unsigned int bus, int pin);
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int fpga_gpio_get(unsigned int bus, int pin);
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void fpga_control_set(unsigned int bus, int pin);
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void fpga_control_clear(unsigned int bus, int pin);
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#endif
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#ifdef CONFIG_STRIDER_CON
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@ -398,12 +435,28 @@ int fpga_gpio_get(unsigned int bus, int pin);
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#define I2C_SCL_GPIO ((I2C_ADAP_HWNR > 3) ? 0x0100 : 0x0020)
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#define I2C_FPGA_IDX ((I2C_ADAP_HWNR > 3) ? \
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(I2C_ADAP_HWNR - 4) : I2C_ADAP_HWNR)
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#elif defined(CONFIG_STRIDER_CON_DP)
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#define I2C_SDA_GPIO ((I2C_ADAP_HWNR > 3) ? 0x0040 : 0x0200)
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#define I2C_SCL_GPIO ((I2C_ADAP_HWNR > 3) ? 0x0020 : 0x0100)
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#define I2C_FPGA_IDX (I2C_ADAP_HWNR % 4)
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#else
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#define I2C_SDA_GPIO 0x0040
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#define I2C_SCL_GPIO 0x0020
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#define I2C_FPGA_IDX I2C_ADAP_HWNR
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#endif
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#ifdef CONFIG_STRIDER_CON_DP
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#define I2C_ACTIVE \
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do { \
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if (I2C_ADAP_HWNR > 7) \
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fpga_control_set(I2C_FPGA_IDX, 0x0004); \
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else \
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fpga_control_clear(I2C_FPGA_IDX, 0x0004); \
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} while (0)
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#else
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#define I2C_ACTIVE { }
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#endif
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#define I2C_TRISTATE { }
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#define I2C_READ \
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(fpga_gpio_get(I2C_FPGA_IDX, I2C_SDA_GPIO) ? 1 : 0)
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@ -436,6 +489,10 @@ int fpga_gpio_get(unsigned int bus, int pin);
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#define CONFIG_SYS_DP501_DIFFERENTIAL
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#define CONFIG_SYS_DP501_VCAPCTRL0 0x01 /* DDR mode 0, DE for H/VSYNC */
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#ifdef CONFIG_STRIDER_CON_DP
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#define CONFIG_SYS_OSD_DH
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#endif
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/*
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* General PCI
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* Addresses are mapped 1-1.
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@ -163,7 +163,7 @@ struct ihs_fpga {
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};
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#endif
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#ifdef CONFIG_HRCON
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#if defined(CONFIG_HRCON) || defined(CONFIG_STRIDER_CON_DP)
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struct ihs_fpga {
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u16 reflection_low; /* 0x0000 */
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u16 versions; /* 0x0002 */
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