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arm: fsl-layerscape: Move QSGMII wriop_init to SoC file
MAC number used per QSGMII is not fixed. It may wary from SoC to SoC. So move QSGMII wriop_init_dpmac() to SoC file. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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commit
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4 changed files with 41 additions and 23 deletions
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@ -23,6 +23,11 @@ int xfi_dpmac[XFI8 + 1];
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int sgmii_dpmac[SGMII16 + 1];
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#endif
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__weak void wriop_init_dpmac_qsgmii(int sd, int lane_prtcl)
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{
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return;
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}
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int is_serdes_configured(enum srds_prtcl device)
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{
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int ret = 0;
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@ -106,28 +111,10 @@ void serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift,
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#ifdef CONFIG_FSL_MC_ENET
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switch (lane_prtcl) {
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case QSGMII_A:
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wriop_init_dpmac(sd, 5, (int)lane_prtcl);
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wriop_init_dpmac(sd, 6, (int)lane_prtcl);
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wriop_init_dpmac(sd, 7, (int)lane_prtcl);
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wriop_init_dpmac(sd, 8, (int)lane_prtcl);
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break;
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case QSGMII_B:
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wriop_init_dpmac(sd, 1, (int)lane_prtcl);
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wriop_init_dpmac(sd, 2, (int)lane_prtcl);
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wriop_init_dpmac(sd, 3, (int)lane_prtcl);
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wriop_init_dpmac(sd, 4, (int)lane_prtcl);
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break;
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case QSGMII_C:
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wriop_init_dpmac(sd, 13, (int)lane_prtcl);
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wriop_init_dpmac(sd, 14, (int)lane_prtcl);
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wriop_init_dpmac(sd, 15, (int)lane_prtcl);
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wriop_init_dpmac(sd, 16, (int)lane_prtcl);
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break;
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case QSGMII_D:
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wriop_init_dpmac(sd, 9, (int)lane_prtcl);
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wriop_init_dpmac(sd, 10, (int)lane_prtcl);
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wriop_init_dpmac(sd, 11, (int)lane_prtcl);
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wriop_init_dpmac(sd, 12, (int)lane_prtcl);
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wriop_init_dpmac_qsgmii(sd, (int)lane_prtcl);
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break;
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default:
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if (lane_prtcl >= XFI1 && lane_prtcl <= XFI8)
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@ -48,10 +48,10 @@ enum srds_prtcl {
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SGMII14,
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SGMII15,
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SGMII16,
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QSGMII_A, /* A indicates MACs 1-4 */
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QSGMII_B, /* B indicates MACs 5-8 */
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QSGMII_C, /* C indicates MACs 9-12 */
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QSGMII_D, /* D indicates MACs 12-16 */
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QSGMII_A,
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QSGMII_B,
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QSGMII_C,
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QSGMII_D,
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SERDES_PRCTL_COUNT
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};
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@ -79,3 +79,33 @@ phy_interface_t wriop_dpmac_enet_if(int dpmac_id, int lane_prtcl)
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return PHY_INTERFACE_MODE_NONE;
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}
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void wriop_init_dpmac_qsgmii(int sd, int lane_prtcl)
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{
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switch (lane_prtcl) {
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case QSGMII_A:
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wriop_init_dpmac(sd, 5, (int)lane_prtcl);
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wriop_init_dpmac(sd, 6, (int)lane_prtcl);
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wriop_init_dpmac(sd, 7, (int)lane_prtcl);
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wriop_init_dpmac(sd, 8, (int)lane_prtcl);
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break;
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case QSGMII_B:
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wriop_init_dpmac(sd, 1, (int)lane_prtcl);
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wriop_init_dpmac(sd, 2, (int)lane_prtcl);
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wriop_init_dpmac(sd, 3, (int)lane_prtcl);
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wriop_init_dpmac(sd, 4, (int)lane_prtcl);
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break;
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case QSGMII_C:
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wriop_init_dpmac(sd, 13, (int)lane_prtcl);
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wriop_init_dpmac(sd, 14, (int)lane_prtcl);
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wriop_init_dpmac(sd, 15, (int)lane_prtcl);
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wriop_init_dpmac(sd, 16, (int)lane_prtcl);
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break;
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case QSGMII_D:
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wriop_init_dpmac(sd, 9, (int)lane_prtcl);
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wriop_init_dpmac(sd, 10, (int)lane_prtcl);
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wriop_init_dpmac(sd, 11, (int)lane_prtcl);
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wriop_init_dpmac(sd, 12, (int)lane_prtcl);
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break;
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}
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}
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@ -68,4 +68,5 @@ phy_interface_t wriop_get_enet_if(int);
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void wriop_dpmac_disable(int);
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void wriop_dpmac_enable(int);
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phy_interface_t wriop_dpmac_enet_if(int, int);
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void wriop_init_dpmac_qsgmii(int, int);
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#endif /* __LDPAA_WRIOP_H */
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