mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-25 22:20:45 +00:00
ram: k3-ddrss: Add support for multiple instances of DDR subsystems
The current driver only supports single instance of DRR subsystem. Add support for probing multiple instances of DDR subsystem. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
This commit is contained in:
parent
3e3d836f92
commit
1a99bec018
1 changed files with 87 additions and 51 deletions
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@ -30,6 +30,9 @@
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#define DDRSS_V2A_R1_MAT_REG 0x0020
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#define DDRSS_ECC_CTRL_REG 0x0120
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#define SINGLE_DDR_SUBSYSTEM 0x1
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#define MULTI_DDR_SUBSYSTEM 0x2
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struct k3_ddrss_desc {
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struct udevice *dev;
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void __iomem *ddrss_ss_cfg;
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@ -42,14 +45,12 @@ struct k3_ddrss_desc {
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u32 ddr_freq2;
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u32 ddr_fhs_cnt;
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struct udevice *vtt_supply;
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u32 instance;
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lpddr4_obj *driverdt;
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lpddr4_config config;
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lpddr4_privatedata pd;
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};
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static lpddr4_obj *driverdt;
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static lpddr4_config config;
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static lpddr4_privatedata pd;
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static struct k3_ddrss_desc *ddrss;
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struct reginitdata {
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u32 ctl_regs[LPDDR4_INTR_CTL_REG_COUNT];
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u16 ctl_regs_offs[LPDDR4_INTR_CTL_REG_COUNT];
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@ -83,15 +84,16 @@ struct reginitdata {
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offset = offset * 10 + (*i - '0'); } \
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} while (0)
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static u32 k3_lpddr4_read_ddr_type(void)
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static u32 k3_lpddr4_read_ddr_type(const lpddr4_privatedata *pd)
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{
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u32 status = 0U;
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u32 offset = 0U;
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u32 regval = 0U;
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u32 dram_class = 0U;
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struct k3_ddrss_desc *ddrss = (struct k3_ddrss_desc *)pd->ddr_instance;
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TH_OFFSET_FROM_REG(LPDDR4__DRAM_CLASS__REG, CTL_SHIFT, offset);
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status = driverdt->readreg(&pd, LPDDR4_CTL_REGS, offset, ®val);
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status = ddrss->driverdt->readreg(pd, LPDDR4_CTL_REGS, offset, ®val);
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if (status > 0U) {
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printf("%s: Failed to read DRAM_CLASS\n", __func__);
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hang();
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@ -102,23 +104,23 @@ static u32 k3_lpddr4_read_ddr_type(void)
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return dram_class;
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}
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static void k3_lpddr4_freq_update(void)
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static void k3_lpddr4_freq_update(struct k3_ddrss_desc *ddrss)
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{
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unsigned int req_type, counter;
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for (counter = 0; counter < ddrss->ddr_fhs_cnt; counter++) {
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if (wait_for_bit_le32(ddrss->ddrss_ctrl_mmr +
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CTRLMMR_DDR4_FSP_CLKCHNG_REQ_OFFS, 0x80,
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CTRLMMR_DDR4_FSP_CLKCHNG_REQ_OFFS + ddrss->instance * 0x10, 0x80,
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true, 10000, false)) {
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printf("Timeout during frequency handshake\n");
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hang();
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}
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req_type = readl(ddrss->ddrss_ctrl_mmr +
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CTRLMMR_DDR4_FSP_CLKCHNG_REQ_OFFS) & 0x03;
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CTRLMMR_DDR4_FSP_CLKCHNG_REQ_OFFS + ddrss->instance * 0x10) & 0x03;
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debug("%s: received freq change req: req type = %d, req no. = %d\n",
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__func__, req_type, counter);
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debug("%s: received freq change req: req type = %d, req no. = %d, instance = %d\n",
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__func__, req_type, counter, ddrss->instance);
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if (req_type == 1)
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clk_set_rate(&ddrss->ddr_clk, ddrss->ddr_freq1);
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@ -132,31 +134,32 @@ static void k3_lpddr4_freq_update(void)
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printf("%s: Invalid freq request type\n", __func__);
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writel(0x1, ddrss->ddrss_ctrl_mmr +
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CTRLMMR_DDR4_FSP_CLKCHNG_ACK_OFFS);
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CTRLMMR_DDR4_FSP_CLKCHNG_ACK_OFFS + ddrss->instance * 0x10);
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if (wait_for_bit_le32(ddrss->ddrss_ctrl_mmr +
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CTRLMMR_DDR4_FSP_CLKCHNG_REQ_OFFS, 0x80,
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CTRLMMR_DDR4_FSP_CLKCHNG_REQ_OFFS + ddrss->instance * 0x10, 0x80,
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false, 10, false)) {
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printf("Timeout during frequency handshake\n");
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hang();
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}
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writel(0x0, ddrss->ddrss_ctrl_mmr +
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CTRLMMR_DDR4_FSP_CLKCHNG_ACK_OFFS);
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CTRLMMR_DDR4_FSP_CLKCHNG_ACK_OFFS + ddrss->instance * 0x10);
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}
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}
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static void k3_lpddr4_ack_freq_upd_req(void)
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static void k3_lpddr4_ack_freq_upd_req(const lpddr4_privatedata *pd)
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{
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u32 dram_class;
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struct k3_ddrss_desc *ddrss = (struct k3_ddrss_desc *)pd->ddr_instance;
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debug("--->>> LPDDR4 Initialization is in progress ... <<<---\n");
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dram_class = k3_lpddr4_read_ddr_type();
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dram_class = k3_lpddr4_read_ddr_type(pd);
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switch (dram_class) {
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case DENALI_CTL_0_DRAM_CLASS_DDR4:
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break;
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case DENALI_CTL_0_DRAM_CLASS_LPDDR4:
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k3_lpddr4_freq_update();
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k3_lpddr4_freq_update(ddrss);
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break;
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default:
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printf("Unrecognized dram_class cannot update frequency!\n");
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@ -167,8 +170,9 @@ static int k3_ddrss_init_freq(struct k3_ddrss_desc *ddrss)
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{
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u32 dram_class;
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int ret;
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lpddr4_privatedata *pd = &ddrss->pd;
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dram_class = k3_lpddr4_read_ddr_type();
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dram_class = k3_lpddr4_read_ddr_type(pd);
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switch (dram_class) {
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case DENALI_CTL_0_DRAM_CLASS_DDR4:
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@ -196,7 +200,7 @@ static void k3_lpddr4_info_handler(const lpddr4_privatedata *pd,
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lpddr4_infotype infotype)
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{
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if (infotype == LPDDR4_DRV_SOC_PLL_UPDATE)
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k3_lpddr4_ack_freq_upd_req();
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k3_lpddr4_ack_freq_upd_req(pd);
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}
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static int k3_ddrss_power_on(struct k3_ddrss_desc *ddrss)
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@ -235,6 +239,7 @@ static int k3_ddrss_power_on(struct k3_ddrss_desc *ddrss)
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static int k3_ddrss_ofdata_to_priv(struct udevice *dev)
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{
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struct k3_ddrss_desc *ddrss = dev_get_priv(dev);
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struct k3_ddrss_data *ddrss_data = (struct k3_ddrss_data *)dev_get_driver_data(dev);
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phys_addr_t reg;
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int ret;
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@ -274,6 +279,17 @@ static int k3_ddrss_ofdata_to_priv(struct udevice *dev)
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if (ret)
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dev_err(dev, "clk get failed for osc clk %d\n", ret);
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/* Reading instance number for multi ddr subystems */
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if (ddrss_data->flags & MULTI_DDR_SUBSYSTEM) {
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ret = dev_read_u32(dev, "instance", &ddrss->instance);
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if (ret) {
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dev_err(dev, "missing instance property");
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return -EINVAL;
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}
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} else {
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ddrss->instance = 0;
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}
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ret = dev_read_u32(dev, "ti,ddr-freq1", &ddrss->ddr_freq1);
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if (ret)
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dev_err(dev, "ddr freq1 not populated %d\n", ret);
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@ -289,12 +305,13 @@ static int k3_ddrss_ofdata_to_priv(struct udevice *dev)
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return ret;
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}
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void k3_lpddr4_probe(void)
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void k3_lpddr4_probe(struct k3_ddrss_desc *ddrss)
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{
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u32 status = 0U;
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u16 configsize = 0U;
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lpddr4_config *config = &ddrss->config;
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status = driverdt->probe(&config, &configsize);
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status = ddrss->driverdt->probe(config, &configsize);
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if ((status != 0) || (configsize != sizeof(lpddr4_privatedata))
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|| (configsize > SRAM_MAX)) {
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@ -305,25 +322,30 @@ void k3_lpddr4_probe(void)
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}
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}
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void k3_lpddr4_init(void)
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void k3_lpddr4_init(struct k3_ddrss_desc *ddrss)
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{
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u32 status = 0U;
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lpddr4_config *config = &ddrss->config;
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lpddr4_obj *driverdt = ddrss->driverdt;
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lpddr4_privatedata *pd = &ddrss->pd;
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if ((sizeof(pd) != sizeof(lpddr4_privatedata))
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|| (sizeof(pd) > SRAM_MAX)) {
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if ((sizeof(*pd) != sizeof(lpddr4_privatedata)) || (sizeof(*pd) > SRAM_MAX)) {
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printf("%s: FAIL\n", __func__);
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hang();
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}
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config.ctlbase = (struct lpddr4_ctlregs_s *)ddrss->ddrss_ss_cfg;
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config.infohandler = (lpddr4_infocallback) k3_lpddr4_info_handler;
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config->ctlbase = (struct lpddr4_ctlregs_s *)ddrss->ddrss_ss_cfg;
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config->infohandler = (lpddr4_infocallback) k3_lpddr4_info_handler;
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status = driverdt->init(&pd, &config);
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status = driverdt->init(pd, config);
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/* linking ddr instance to lpddr4 */
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pd->ddr_instance = (void *)ddrss;
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if ((status > 0U) ||
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(pd.ctlbase != (struct lpddr4_ctlregs_s *)config.ctlbase) ||
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(pd.ctlinterrupthandler != config.ctlinterrupthandler) ||
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(pd.phyindepinterrupthandler != config.phyindepinterrupthandler)) {
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(pd->ctlbase != (struct lpddr4_ctlregs_s *)config->ctlbase) ||
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(pd->ctlinterrupthandler != config->ctlinterrupthandler) ||
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(pd->phyindepinterrupthandler != config->phyindepinterrupthandler)) {
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printf("%s: FAIL\n", __func__);
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hang();
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} else {
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@ -331,7 +353,8 @@ void k3_lpddr4_init(void)
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}
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}
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void populate_data_array_from_dt(struct reginitdata *reginit_data)
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void populate_data_array_from_dt(struct k3_ddrss_desc *ddrss,
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struct reginitdata *reginit_data)
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{
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int ret, i;
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@ -363,22 +386,24 @@ void populate_data_array_from_dt(struct reginitdata *reginit_data)
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reginit_data->phy_regs_offs[i] = i;
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}
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void k3_lpddr4_hardware_reg_init(void)
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void k3_lpddr4_hardware_reg_init(struct k3_ddrss_desc *ddrss)
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{
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u32 status = 0U;
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struct reginitdata reginitdata;
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lpddr4_obj *driverdt = ddrss->driverdt;
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lpddr4_privatedata *pd = &ddrss->pd;
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populate_data_array_from_dt(®initdata);
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populate_data_array_from_dt(ddrss, ®initdata);
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status = driverdt->writectlconfig(&pd, reginitdata.ctl_regs,
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status = driverdt->writectlconfig(pd, reginitdata.ctl_regs,
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reginitdata.ctl_regs_offs,
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LPDDR4_INTR_CTL_REG_COUNT);
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if (!status)
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status = driverdt->writephyindepconfig(&pd, reginitdata.pi_regs,
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status = driverdt->writephyindepconfig(pd, reginitdata.pi_regs,
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reginitdata.pi_regs_offs,
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LPDDR4_INTR_PHY_INDEP_REG_COUNT);
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if (!status)
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status = driverdt->writephyconfig(&pd, reginitdata.phy_regs,
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status = driverdt->writephyconfig(pd, reginitdata.phy_regs,
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reginitdata.phy_regs_offs,
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LPDDR4_INTR_PHY_REG_COUNT);
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if (status) {
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@ -387,27 +412,29 @@ void k3_lpddr4_hardware_reg_init(void)
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}
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}
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void k3_lpddr4_start(void)
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void k3_lpddr4_start(struct k3_ddrss_desc *ddrss)
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{
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u32 status = 0U;
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u32 regval = 0U;
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u32 offset = 0U;
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lpddr4_obj *driverdt = ddrss->driverdt;
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lpddr4_privatedata *pd = &ddrss->pd;
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TH_OFFSET_FROM_REG(LPDDR4__START__REG, CTL_SHIFT, offset);
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status = driverdt->readreg(&pd, LPDDR4_CTL_REGS, offset, ®val);
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status = driverdt->readreg(pd, LPDDR4_CTL_REGS, offset, ®val);
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if ((status > 0U) || ((regval & TH_FLD_MASK(LPDDR4__START__FLD)) != 0U)) {
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printf("%s: Pre start FAIL\n", __func__);
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hang();
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}
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status = driverdt->start(&pd);
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status = driverdt->start(pd);
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if (status > 0U) {
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printf("%s: FAIL\n", __func__);
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hang();
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}
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status = driverdt->readreg(&pd, LPDDR4_CTL_REGS, offset, ®val);
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status = driverdt->readreg(pd, LPDDR4_CTL_REGS, offset, ®val);
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if ((status > 0U) || ((regval & TH_FLD_MASK(LPDDR4__START__FLD)) != 1U)) {
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printf("%s: Post start FAIL\n", __func__);
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hang();
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@ -419,8 +446,7 @@ void k3_lpddr4_start(void)
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static int k3_ddrss_probe(struct udevice *dev)
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{
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int ret;
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ddrss = dev_get_priv(dev);
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struct k3_ddrss_desc *ddrss = dev_get_priv(dev);
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debug("%s(dev=%p)\n", __func__, dev);
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writel(0x0, ddrss->ddrss_ss_cfg + DDRSS_ECC_CTRL_REG);
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#endif
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driverdt = lpddr4_getinstance();
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k3_lpddr4_probe();
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k3_lpddr4_init();
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k3_lpddr4_hardware_reg_init();
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ddrss->driverdt = lpddr4_getinstance();
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k3_lpddr4_probe(ddrss);
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k3_lpddr4_init(ddrss);
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k3_lpddr4_hardware_reg_init(ddrss);
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ret = k3_ddrss_init_freq(ddrss);
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if (ret)
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return ret;
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k3_lpddr4_start();
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k3_lpddr4_start(ddrss);
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return ret;
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}
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@ -462,9 +489,18 @@ static struct ram_ops k3_ddrss_ops = {
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.get_info = k3_ddrss_get_info,
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};
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static const struct k3_ddrss_data k3_data = {
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.flags = SINGLE_DDR_SUBSYSTEM,
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};
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static const struct k3_ddrss_data j721s2_data = {
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.flags = MULTI_DDR_SUBSYSTEM,
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};
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static const struct udevice_id k3_ddrss_ids[] = {
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{.compatible = "ti,am64-ddrss"},
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{.compatible = "ti,j721e-ddrss"},
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{.compatible = "ti,am64-ddrss", .data = (ulong)&k3_data, },
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{.compatible = "ti,j721e-ddrss", .data = (ulong)&k3_data, },
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{.compatible = "ti,j721s2-ddrss", .data = (ulong)&j721s2_data, },
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{}
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};
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