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powerpc: dts: p2020: Make PCIe nodes compatible for Linux kernel driver
Linux P2020 PCIe kernel driver uses compatible string fsl,mpc8548-pcie and needs more DT properties. Copy P2020 PCIe nodes and definitions from upstream Linux kernel. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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1 changed files with 62 additions and 3 deletions
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@ -59,32 +59,91 @@
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/* PCIe controller base address 0x8000 */
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&pci2 {
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compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq";
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compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq", "fsl,mpc8548-pcie";
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law_trgt_if = <0>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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bus-range = <0x0 0xff>;
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clock-frequency = <33333333>;
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interrupts = <24 2 0 0>;
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pcie@0 {
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reg = <0 0 0 0 0>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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device_type = "pci";
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interrupts = <24 2 0 0>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x0 */
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0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
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0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
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0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
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0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
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>;
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};
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};
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/* PCIe controller base address 0x9000 */
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&pci1 {
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compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq";
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compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq", "fsl,mpc8548-pcie";
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law_trgt_if = <1>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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bus-range = <0x0 0xff>;
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clock-frequency = <33333333>;
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interrupts = <25 2 0 0>;
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pcie@0 {
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reg = <0 0 0 0 0>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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device_type = "pci";
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interrupts = <25 2 0 0>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x0 */
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0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
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0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
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0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
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0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
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>;
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};
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};
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/* PCIe controller base address 0xa000 */
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&pci0 {
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compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq";
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compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq", "fsl,mpc8548-pcie";
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law_trgt_if = <2>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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bus-range = <0x0 0xff>;
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clock-frequency = <33333333>;
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interrupts = <26 2 0 0>;
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pcie@0 {
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reg = <0 0 0 0 0>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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device_type = "pci";
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interrupts = <26 2 0 0>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x0 */
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0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
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0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
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0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
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0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
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>;
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};
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};
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&lbc {
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