Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2024-11-10 15:14:43 +00:00
Code Issues Projects Releases Packages Wiki Activity

fdt: Add another Altera Arria10 clock init compatible

Browse source 
The DT bindings for the Arria10 clock init have changed, add another
compatible to make them work with U-Boot until a proper clock driver
gets written.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
This commit is contained in:
Marek Vasut 2018-05-12 11:56:10 +02:00
parent 233719cc40
commit 19c8fc77e1
2 changed files with 2 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
include/fdtdec.h
View file

@ -160,6 +160,7 @@ enum fdt_compat_id {
COMPAT_ALTERA_SOCFPGA_F2SDR2, /* SoCFPGA fpga2SDRAM2 bridge */
COMPAT_ALTERA_SOCFPGA_FPGA0, /* SOCFPGA FPGA manager */
COMPAT_ALTERA_SOCFPGA_NOC, /* SOCFPGA Arria 10 NOC */
COMPAT_ALTERA_SOCFPGA_CLK_INIT, /* SOCFPGA Arria 10 clk init */
COMPAT_COUNT,
};

1
lib/fdtdec.c
View file

@ -72,6 +72,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
};
const char *fdtdec_get_compatible(enum fdt_compat_id id)