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Merge branch 'master' of git://git.denx.de/u-boot-coldfire

Browse source 
- Watchdog updates, and more MAINTAINERS entries
This commit is contained in:
Tom Rini 2023-07-25 17:37:39 -04:00
commit 197aa22e65
25 changed files with 204 additions and 140 deletions
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1
MAINTAINERS
View file

@ -876,6 +876,7 @@ S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-coldfire.git
F: arch/m68k/
F: doc/arch/m68k.rst
F: drivers/watchdog/mcf_wdt.c
CYCLIC
M: Stefan Roese <sr@denx.de>

42
arch/m68k/cpu/mcf523x/cpu.c
View file

@ -12,7 +12,6 @@
#include <init.h>
#include <net.h>
#include <vsprintf.h>
#include <watchdog.h>
#include <command.h>
#include <netdev.h>
#include <asm/global_data.h>
@ -62,47 +61,6 @@ int print_cpuinfo(void)
};
#endif /* CONFIG_DISPLAY_CPUINFO */
#if defined(CONFIG_WATCHDOG)
/* Called by macro WATCHDOG_RESET */
void watchdog_reset(void)
{
wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
/* Count register */
out_be16(&wdp->sr, 0x5555);
asm("nop");
out_be16(&wdp->sr, 0xaaaa);
}
int watchdog_disable(void)
{
wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
/* UserManual, once the wdog is disabled, wdog cannot be re-enabled */
/* halted watchdog timer */
setbits_be16(&wdp->cr, WTM_WCR_HALTED);
puts("WATCHDOG:disabled\n");
return (0);
}
int watchdog_init(void)
{
wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
u32 wdog_module = 0;
/* set timeout and enable watchdog */
wdog_module = ((CFG_SYS_CLK / CONFIG_SYS_HZ) * CONFIG_WATCHDOG_TIMEOUT_MSECS);
wdog_module |= (wdog_module / 8192);
out_be16(&wdp->mr, wdog_module);
out_be16(&wdp->cr, WTM_WCR_EN);
puts("WATCHDOG:enabled\n");
return (0);
}
#endif /* CONFIG_WATCHDOG */
#if defined(CONFIG_MCFFEC)
/* Default initializations for MCFFEC controllers. To override,
* create a board-specific function called:

47
arch/m68k/cpu/mcf52x2/cpu.c
View file

@ -17,7 +17,6 @@
#include <init.h>
#include <net.h>
#include <vsprintf.h>
#include <watchdog.h>
#include <command.h>
#include <asm/global_data.h>
#include <asm/immap.h>
@ -53,51 +52,7 @@ int print_cpuinfo(void)
return 0;
};
#endif /* CONFIG_DISPLAY_CPUINFO */
#if defined(CONFIG_WATCHDOG)
/* Called by macro WATCHDOG_RESET */
void watchdog_reset(void)
{
wdog_t *wdt = (wdog_t *)(MMAP_WDOG);
out_be16(&wdt->sr, 0x5555);
out_be16(&wdt->sr, 0xaaaa);
}
int watchdog_disable(void)
{
wdog_t *wdt = (wdog_t *)(MMAP_WDOG);
/* reset watchdog counter */
out_be16(&wdt->sr, 0x5555);
out_be16(&wdt->sr, 0xaaaa);
/* disable watchdog timer */
out_be16(&wdt->cr, 0);
puts("WATCHDOG:disabled\n");
return (0);
}
int watchdog_init(void)
{
wdog_t *wdt = (wdog_t *)(MMAP_WDOG);
/* disable watchdog */
out_be16(&wdt->cr, 0);
/* set timeout and enable watchdog */
out_be16(&wdt->mr,
(CONFIG_WATCHDOG_TIMEOUT_MSECS * CONFIG_SYS_HZ) / (32768 * 1000) - 1);
/* reset watchdog counter */
out_be16(&wdt->sr, 0x5555);
out_be16(&wdt->sr, 0xaaaa);
puts("WATCHDOG:enabled\n");
return (0);
}
#endif /* #ifdef CONFIG_WATCHDOG */
#endif /* #ifdef CONFIG_M5208 */
#endif /* #ifdef CONFIG_M5208 */
#ifdef CONFIG_M5271
#if defined(CONFIG_DISPLAY_CPUINFO)

44
arch/m68k/cpu/mcf532x/cpu.c
View file

@ -12,7 +12,6 @@
#include <init.h>
#include <net.h>
#include <vsprintf.h>
#include <watchdog.h>
#include <command.h>
#include <netdev.h>
#include <asm/global_data.h>
@ -102,49 +101,6 @@ int print_cpuinfo(void)
};
#endif /* CONFIG_DISPLAY_CPUINFO */
#if defined(CONFIG_WATCHDOG)
/* Called by macro WATCHDOG_RESET */
void watchdog_reset(void)
{
wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
/* Count register */
out_be16(&wdp->sr, 0x5555);
out_be16(&wdp->sr, 0xaaaa);
}
int watchdog_disable(void)
{
wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
/* UserManual, once the wdog is disabled, wdog cannot be re-enabled */
/* halted watchdog timer */
setbits_be16(&wdp->cr, WTM_WCR_HALTED);
puts("WATCHDOG:disabled\n");
return (0);
}
int watchdog_init(void)
{
wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
u32 wdog_module = 0;
/* set timeout and enable watchdog */
wdog_module = ((CFG_SYS_CLK / 1000) * CONFIG_WATCHDOG_TIMEOUT_MSECS);
#ifdef CONFIG_M5329
out_be16(&wdp->mr, wdog_module / 8192);
#else
out_be16(&wdp->mr, wdog_module / 4096);
#endif
out_be16(&wdp->cr, WTM_WCR_EN);
puts("WATCHDOG:enabled\n");
return (0);
}
#endif /* CONFIG_WATCHDOG */
#if defined(CONFIG_MCFFEC)
/* Default initializations for MCFFEC controllers. To override,
* create a board-specific function called:

5
arch/m68k/dts/M5208EVBE.dts
View file

@ -15,6 +15,11 @@
};
};
&wdog0 {
timeout-sec = <32>;
status = "okay";
};
&uart0 {
bootph-all;
status = "okay";

6
arch/m68k/dts/mcf5208.dtsi
View file

@ -16,6 +16,12 @@
#address-cells = <1>;
#size-cells = <1>;
wdog0: watchdog@fc08c000 {
compatible = "fsl,mcf5208-wdt";
reg = <0xfc08c000 0x10>;
status = "disabled";
};
uart0: uart@fc060000 {
compatible = "fsl,mcf-uart";
reg = <0xfc060000 0x40>;

6
arch/m68k/dts/mcf523x.dtsi
View file

@ -23,6 +23,12 @@
ranges = <0x00000000 0x40000000 0x40000000>;
reg = <0x40000000 0x40000000>;
wdog0: watchdog@140000 {
compatible = "fsl,mcf5208-wdt";
reg = <0x140000 0x10>;
status = "disabled";
};
uart0: uart@200 {
compatible = "fsl,mcf-uart";
reg = <0x200 0x40>;

6
arch/m68k/dts/mcf5271.dtsi
View file

@ -23,6 +23,12 @@
ranges = <0x00000000 0x40000000 0x40000000>;
reg = <0x40000000 0x40000000>;
wdog0: watchdog@140000 {
compatible = "fsl,mcf5208-wdt";
reg = <0x140000 0x10>;
status = "disabled";
};
uart0: uart@200 {
compatible = "fsl,mcf-uart";
reg = <0x200 0x40>;

6
arch/m68k/dts/mcf5275.dtsi
View file

@ -24,6 +24,12 @@
ranges = <0x00000000 0x40000000 0x40000000>;
reg = <0x40000000 0x40000000>;
wdog0: watchdog@140000 {
compatible = "fsl,mcf5208-wdt";
reg = <0x140000 0x10>;
status = "disabled";
};
uart0: uart@200 {
compatible = "fsl,mcf-uart";
reg = <0x200 0x40>;

6
arch/m68k/dts/mcf5282.dtsi
View file

@ -23,6 +23,12 @@
ranges = <0x00000000 0x40000000 0x40000000>;
reg = <0x40000000 0x40000000>;
wdog0: watchdog@140000 {
compatible = "fsl,mcf5282-wdt";
reg = <0x140000 0x10>;
status = "disabled";
};
uart0: uart@200 {
compatible = "fsl,mcf-uart";
reg = <0x200 0x40>;

6
arch/m68k/dts/mcf5329.dtsi
View file

@ -16,6 +16,12 @@
#address-cells = <1>;
#size-cells = <1>;
wdog0: watchdog@fc098000 {
compatible = "fsl,mcf5208-wdt";
reg = <0xfc08c000 0x10>;
status = "disabled";
};
uart0: uart@fc060000 {
compatible = "fsl,mcf-uart";
reg = <0xfc060000 0x40>;

6
arch/m68k/dts/mcf537x.dtsi
View file

@ -16,6 +16,12 @@
#address-cells = <1>;
#size-cells = <1>;
wdog0: watchdog@fc098000 {
compatible = "fsl,mcf5208-wdt";
reg = <0xfc08c000 0x10>;
status = "disabled";
};
uart0: uart@fc060000 {
compatible = "fsl,mcf-uart";
reg = <0xfc060000 0x40>;

2
board/cobra5272/MAINTAINERS
View file

@ -1,5 +1,5 @@
COBRA5272 BOARD
#M: -
M: Angelo Dureghello <angelo@kernel-space.org>
S: Maintained
F: board/cobra5272/
F: include/configs/cobra5272.h

2
board/freescale/m5208evbe/MAINTAINERS
View file

@ -1,5 +1,5 @@
M5208EVBE BOARD
#M: -
M: Angelo Dureghello <angelo@kernel-space.org>
S: Maintained
F: board/freescale/m5208evbe/
F: include/configs/M5208EVBE.h

2
board/freescale/m5249evb/MAINTAINERS
View file

@ -1,5 +1,5 @@
M5249EVB BOARD
#M: -
M: Angelo Dureghello <angelo@kernel-space.org>
S: Maintained
F: board/freescale/m5249evb/
F: include/configs/M5249EVB.h

2
board/freescale/m5272c3/MAINTAINERS
View file

@ -1,5 +1,5 @@
M5272C3 BOARD
#M: -
M: Angelo Dureghello <angelo@kernel-space.org>
S: Maintained
F: board/freescale/m5272c3/
F: include/configs/M5272C3.h

2
board/freescale/m5275evb/MAINTAINERS
View file

@ -1,5 +1,5 @@
M5275EVB BOARD
#M: -
M: Angelo Dureghello <angelo@kernel-space.org>
S: Maintained
F: board/freescale/m5275evb/
F: include/configs/M5275EVB.h

2
board/freescale/m5282evb/MAINTAINERS
View file

@ -1,5 +1,5 @@
M5282EVB BOARD
#M: -
M: Angelo Dureghello <angelo@kernel-space.org>
S: Maintained
F: board/freescale/m5282evb/
F: include/configs/M5282EVB.h

2
configs/M5208EVBE_defconfig
View file

@ -50,3 +50,5 @@ CONFIG_MCFFEC=y
CONFIG_MII=y
CONFIG_MCFUART=y
CONFIG_WATCHDOG_TIMEOUT_MSECS=5000
CONFIG_WDT=y
CONFIG_WDT_MCF=y

4
configs/astro_mcf5373l_defconfig
View file

@ -46,5 +46,5 @@ CONFIG_DM_RTC=y
CONFIG_MCFRTC=y
CONFIG_SYS_MCFRTC_BASE=0xFC0A8000
CONFIG_MCFUART=y
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_TIMEOUT_MSECS=3355
CONFIG_WDT=y
CONFIG_WDT_MCF=y

1
configs/eb_cpu5282_defconfig
View file

@ -52,3 +52,4 @@ CONFIG_MII=y
CONFIG_DM_RTC=y
CONFIG_RTC_DS1338=y
CONFIG_MCFUART=y
CONFIG_WDT=y

1
configs/eb_cpu5282_internal_defconfig
View file

@ -50,3 +50,4 @@ CONFIG_MII=y
CONFIG_DM_RTC=y
CONFIG_RTC_DS1338=y
CONFIG_MCFUART=y
CONFIG_WDT=y

7
drivers/watchdog/Kconfig
View file

@ -178,6 +178,13 @@ config WDT_MAX6370
help
Select this to enable max6370 watchdog timer.
config WDT_MCF
bool "ColdFire family watchdog timer support"
depends on WDT
help
Select this to enable ColdFire watchdog timer,
which supports mcf52x2 mcf532x mcf523x families.
config WDT_MESON_GXBB
bool "Amlogic watchdog timer support"
depends on WDT

1
drivers/watchdog/Makefile
View file

@ -31,6 +31,7 @@ obj-$(CONFIG_WDT_CDNS) += cdns_wdt.o
obj-$(CONFIG_WDT_FTWDT010) += ftwdt010_wdt.o
obj-$(CONFIG_WDT_GPIO) += gpio_wdt.o
obj-$(CONFIG_WDT_MAX6370) += max6370_wdt.o
obj-$(CONFIG_WDT_MCF) += mcf_wdt.o
obj-$(CONFIG_WDT_MESON_GXBB) += meson_gxbb_wdt.o
obj-$(CONFIG_WDT_MPC8xxx) += mpc8xxx_wdt.o
obj-$(CONFIG_WDT_MT7620) += mt7620_wdt.o

135
drivers/watchdog/mcf_wdt.c Normal file
View file

@ -0,0 +1,135 @@
// SPDX-License-Identifier: GPL-2.0
/*
* mcf_wdt.c - driver for ColdFire on-chip watchdog
*
* Author: Angelo Dureghello <angelo@kernel-space.org>
*
*/
#include <common.h>
#include <dm.h>
#include <hang.h>
#include <asm/io.h>
#include <wdt.h>
#include <linux/bitops.h>
#define DIVIDER_5XXX 4096
#define DIVIDER_5282 8192
#define WCR_EN BIT(0)
#define WCR_HALTED BIT(1)
#define WCR_DOZE BIT(2)
#define WCR_WAIT BIT(3)
struct watchdog_regs {
u16 wcr; /* Control */
u16 wmr; /* Service */
u16 wcntr; /* Counter */
u16 wsr; /* Reset Status */
};
static void mcf_watchdog_reset(struct watchdog_regs *wdog)
{
if (!IS_ENABLED(CONFIG_WATCHDOG_RESET_DISABLE)) {
writew(0x5555, &wdog->wsr);
writew(0xaaaa, &wdog->wsr);
}
}
static void mcf_watchdog_init(struct watchdog_regs *wdog, u32 fixed_divider,
u64 timeout_msecs)
{
u32 wdog_module, cycles_per_sec;
cycles_per_sec = CFG_SYS_CLK / fixed_divider;
wdog_module = cycles_per_sec * ((u32)timeout_msecs / 1000);
wdog_module += (cycles_per_sec / 1000) * ((u32)timeout_msecs % 1000);
/* Limit check, max 16 bits */
if (wdog_module > 0xffff)
wdog_module = 0xffff;
/* Set timeout and enable watchdog */
writew((u16)wdog_module, &wdog->wmr);
writew(WCR_EN, &wdog->wcr);
mcf_watchdog_reset(wdog);
}
struct mcf_wdt_priv {
void __iomem *base;
u32 fixed_divider;
};
static int mcf_wdt_expire_now(struct udevice *dev, ulong flags)
{
hang();
return 0;
}
static int mcf_wdt_reset(struct udevice *dev)
{
struct mcf_wdt_priv *priv = dev_get_priv(dev);
mcf_watchdog_reset(priv->base);
return 0;
}
static int mcf_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
{
struct mcf_wdt_priv *priv = dev_get_priv(dev);
/* Timeout from fdt (timeout) comes in milliseconds */
mcf_watchdog_init(priv->base, priv->fixed_divider, timeout);
return 0;
}
static int mcf_wdt_stop(struct udevice *dev)
{
struct mcf_wdt_priv *priv = dev_get_priv(dev);
struct watchdog_regs *wdog = (struct watchdog_regs *)priv->base;
setbits_be16(&wdog->wcr, WCR_HALTED);
return 0;
}
static int mcf_wdt_probe(struct udevice *dev)
{
struct mcf_wdt_priv *priv = dev_get_priv(dev);
priv->base = dev_read_addr_ptr(dev);
if (!priv->base)
return -ENOENT;
priv->fixed_divider = (u32)dev_get_driver_data(dev);
return 0;
}
static const struct wdt_ops mcf_wdt_ops = {
.start = mcf_wdt_start,
.stop = mcf_wdt_stop,
.reset = mcf_wdt_reset,
.expire_now = mcf_wdt_expire_now,
};
static const struct udevice_id mcf_wdt_ids[] = {
{ .compatible = "fsl,mcf5208-wdt", .data = DIVIDER_5XXX },
{ .compatible = "fsl,mcf5282-wdt", .data = DIVIDER_5282 },
{}
};
U_BOOT_DRIVER(mcf_wdt) = {
.name = "mcf_wdt",
.id = UCLASS_WDT,
.of_match = mcf_wdt_ids,
.probe = mcf_wdt_probe,
.ops = &mcf_wdt_ops,
.priv_auto = sizeof(struct mcf_wdt_priv),
.flags = DM_FLAG_PRE_RELOC,
};