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board: sama5d3_xplained: Update to support DM/DT
Update the configuration files to support the device tree and driver model, so do SPL. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Fix build error with sama5d3_xplained_mmc: Signed-off-by: Simon Glass <sjg@chromium.org>
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098d15bc77
commit
1878804a2b
4 changed files with 60 additions and 25 deletions
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@ -136,7 +136,9 @@ int board_mmc_init(bd_t *bis)
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void spl_board_init(void)
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{
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#ifdef CONFIG_SYS_USE_MMC
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#ifdef CONFIG_GENERIC_ATMEL_MCI
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sama5d3_xplained_mci0_hw_init();
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#endif
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#elif CONFIG_SYS_USE_NANDFLASH
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sama5d3_xplained_nand_hw_init();
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#endif
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@ -4,15 +4,19 @@ CONFIG_TARGET_SAMA5D3_XPLAINED=y
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CONFIG_SPL_GPIO_SUPPORT=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_SPL_MMC_SUPPORT=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
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CONFIG_SPL_LIBDISK_SUPPORT=y
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CONFIG_SPL_FAT_SUPPORT=y
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CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained"
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CONFIG_FIT=y
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CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_MMC"
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CONFIG_BOOTDELAY=3
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# CONFIG_DISPLAY_BOARDINFO is not set
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CONFIG_SPL=y
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CONFIG_SPL_SEPARATE_BSS=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_BOOTZ=y
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# CONFIG_CMD_IMI is not set
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@ -29,6 +33,29 @@ CONFIG_CMD_EXT4=y
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CONFIG_CMD_EXT4_WRITE=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_UBI=y
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CONFIG_OF_CONTROL=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names"
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CONFIG_DM=y
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CONFIG_SPL_DM=y
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_CLK=y
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CONFIG_SPL_CLK=y
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CONFIG_CLK_AT91=y
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CONFIG_AT91_UTMI=y
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CONFIG_AT91_H32MX=y
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CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_GENERIC_ATMEL_MCI=y
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CONFIG_DM_ETH=y
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CONFIG_MACB=y
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CONFIG_PINCTRL=y
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CONFIG_SPL_PINCTRL=y
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CONFIG_PINCTRL_AT91=y
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CONFIG_DM_SERIAL=y
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CONFIG_ATMEL_USART=y
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CONFIG_USB=y
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CONFIG_DM_USB=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_STORAGE=y
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CONFIG_OF_LIBFDT=y
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@ -6,6 +6,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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CONFIG_SPL_NAND_SUPPORT=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
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CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained"
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CONFIG_FIT=y
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CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH"
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CONFIG_BOOTDELAY=3
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@ -27,6 +30,29 @@ CONFIG_CMD_EXT4=y
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CONFIG_CMD_EXT4_WRITE=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_UBI=y
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CONFIG_OF_CONTROL=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names"
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CONFIG_DM=y
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CONFIG_SPL_DM=y
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_CLK=y
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CONFIG_SPL_CLK=y
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CONFIG_CLK_AT91=y
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CONFIG_AT91_UTMI=y
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CONFIG_AT91_H32MX=y
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CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_GENERIC_ATMEL_MCI=y
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CONFIG_DM_ETH=y
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CONFIG_MACB=y
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CONFIG_PINCTRL=y
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CONFIG_SPL_PINCTRL=y
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CONFIG_PINCTRL_AT91=y
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CONFIG_DM_SERIAL=y
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CONFIG_ATMEL_USART=y
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CONFIG_USB=y
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CONFIG_DM_USB=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_STORAGE=y
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CONFIG_OF_LIBFDT=y
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@ -12,11 +12,6 @@
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#include "at91-sama5_common.h"
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/* serial console */
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#define CONFIG_ATMEL_USART
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#define CONFIG_USART_BASE ATMEL_BASE_DBGU
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#define CONFIG_USART_ID ATMEL_ID_DBGU
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/*
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* This needs to be defined for the OHCI code to work but it is defined as
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* ATMEL_ID_UHPHS in the CPU specific header files.
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@ -34,10 +29,10 @@
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#define CONFIG_SYS_SDRAM_SIZE 0x10000000
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_SYS_INIT_SP_ADDR 0x310000
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#define CONFIG_SYS_INIT_SP_ADDR 0x318000
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#else
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
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(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
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#endif
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/* NAND flash */
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@ -67,21 +62,6 @@
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#define CONFIG_CMD_UBIFS
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#endif
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/* Ethernet Hardware */
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#define CONFIG_MACB
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#define CONFIG_RMII
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#define CONFIG_NET_RETRY_COUNT 20
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#define CONFIG_MACB_SEARCH_PHY
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#define CONFIG_RGMII
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#define CONFIG_PHYLIB
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/* MMC */
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#ifdef CONFIG_CMD_MMC
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#define CONFIG_GENERIC_ATMEL_MCI
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#define CONFIG_ATMEL_MCI_8BIT
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#endif
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/* USB */
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#ifdef CONFIG_CMD_USB
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@ -111,7 +91,7 @@
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/* SPL */
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_TEXT_BASE 0x300000
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#define CONFIG_SPL_MAX_SIZE 0x10000
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#define CONFIG_SPL_MAX_SIZE 0x18000
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#define CONFIG_SPL_BSS_START_ADDR 0x20000000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
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#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
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