Convert CONFIG_SPL_DRIVERS_MISC et al to Kconfig

This converts the following to Kconfig:
   CONFIG_SPL_DRIVERS_MISC
   CONFIG_SPL_ENV_SUPPORT
   CONFIG_SPL_GPIO
   CONFIG_SPL_I2C
   CONFIG_SPL_LDSCRIPT
   CONFIG_SPL_LIBCOMMON_SUPPORT
   CONFIG_SPL_LIBGENERIC_SUPPORT
   CONFIG_SPL_LOAD_FIT_ADDRESS
   CONFIG_SPL_MMC
   CONFIG_SPL_NAND_SUPPORT
   CONFIG_SPL_NO_CPU_SUPPORT
   CONFIG_SPL_OS_BOOT
   CONFIG_SPL_POWER
   CONFIG_SPL_STACK_R
   CONFIG_SPL_STACK_R_ADDR
   CONFIG_SPL_WATCHDOG
   CONFIG_SPL_TEXT_BASE

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2021-10-30 23:03:56 -04:00
parent 4ca10b9ee5
commit 1616626417
53 changed files with 68 additions and 94 deletions

7
README
View file

@ -1941,9 +1941,6 @@ The following options need to be configured:
CONFIG_SPL CONFIG_SPL
Enable building of SPL globally. Enable building of SPL globally.
CONFIG_SPL_LDSCRIPT
LDSCRIPT for linking the SPL binary.
CONFIG_SPL_MAX_FOOTPRINT CONFIG_SPL_MAX_FOOTPRINT
Maximum size in memory allocated to the SPL, BSS included. Maximum size in memory allocated to the SPL, BSS included.
When defined, the linker checks that the actual memory When defined, the linker checks that the actual memory
@ -1998,10 +1995,6 @@ The following options need to be configured:
CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_SPL_MALLOC_SIZE
The size of the malloc pool used in SPL. The size of the malloc pool used in SPL.
CONFIG_SPL_OS_BOOT
Enable booting directly to an OS from SPL.
See also: doc/README.falcon
CONFIG_SPL_DISPLAY_PRINT CONFIG_SPL_DISPLAY_PRINT
For ARM, enable an optional function to print more information For ARM, enable an optional function to print more information
about the running system. about the running system.

View file

@ -3,6 +3,9 @@ CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00800000 CONFIG_SYS_TEXT_BASE=0x00800000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_GPIO=y CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=2 CONFIG_NR_DRAM_BANKS=2
@ -30,6 +33,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_BOARD_LATE_INIT=y CONFIG_BOARD_LATE_INIT=y
CONFIG_LAST_STAGE_INIT=y CONFIG_LAST_STAGE_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_I2C=y
CONFIG_HUSH_PARSER=y CONFIG_HUSH_PARSER=y
# CONFIG_CMD_ELF is not set # CONFIG_CMD_ELF is not set
# CONFIG_CMD_GO is not set # CONFIG_CMD_GO is not set

View file

@ -23,6 +23,7 @@ CONFIG_FIT_VERBOSE=y
CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_BOOTDELAY=3 CONFIG_BOOTDELAY=3
CONFIG_SPL_DMA=y CONFIG_SPL_DMA=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_WATCHDOG=y CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="icorem6qdl> " CONFIG_SYS_PROMPT="icorem6qdl> "

View file

@ -11,6 +11,7 @@ CONFIG_MX6QDL=y
CONFIG_TARGET_MX6DL_MAMOJ=y CONFIG_TARGET_MX6DL_MAMOJ=y
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-mamoj" CONFIG_DEFAULT_DEVICE_TREE="imx6dl-mamoj"
CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_TEXT_BASE=0x00908000
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_IMX_HAB=y CONFIG_IMX_HAB=y
# CONFIG_CMD_BMODE is not set # CONFIG_CMD_BMODE is not set
CONFIG_DISTRO_DEFAULTS=y CONFIG_DISTRO_DEFAULTS=y

View file

@ -24,6 +24,7 @@ CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOOTDELAY=3 CONFIG_BOOTDELAY=3
CONFIG_SPL_DMA=y CONFIG_SPL_DMA=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_WATCHDOG=y CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="icorem6qdl> " CONFIG_SYS_PROMPT="icorem6qdl> "

View file

@ -14,6 +14,7 @@ CONFIG_MX6QDL=y
CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_TARGET_MX6Q_ENGICAM=y
CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-mipi" CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-mipi"
CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_TEXT_BASE=0x00908000
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y CONFIG_SPL_SERIAL=y
CONFIG_SPL=y CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0x021f0000 CONFIG_DEBUG_UART_BASE=0x021f0000
@ -29,6 +30,7 @@ CONFIG_SPL_LOAD_FIT=y
CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOOTDELAY=3 CONFIG_BOOTDELAY=3
CONFIG_SPL_RAW_IMAGE_SUPPORT=y
CONFIG_SPL_OS_BOOT=y CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_WATCHDOG=y CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y CONFIG_HUSH_PARSER=y

View file

@ -14,6 +14,7 @@ CONFIG_MX6QDL=y
CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_TARGET_MX6Q_ENGICAM=y
CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore"
CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_TEXT_BASE=0x00908000
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y CONFIG_SPL_SERIAL=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SYS_BOOTCOUNT_ADDR=0x020D8024 CONFIG_SYS_BOOTCOUNT_ADDR=0x020D8024
@ -32,6 +33,7 @@ CONFIG_SPL_LOAD_FIT=y
CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOOTDELAY=3 CONFIG_BOOTDELAY=3
CONFIG_SPL_RAW_IMAGE_SUPPORT=y
CONFIG_SPL_OS_BOOT=y CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_WATCHDOG=y CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y CONFIG_HUSH_PARSER=y

View file

@ -24,6 +24,7 @@ CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOOTDELAY=3 CONFIG_BOOTDELAY=3
CONFIG_SPL_DMA=y CONFIG_SPL_DMA=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_WATCHDOG=y CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="icorem6qdl> " CONFIG_SYS_PROMPT="icorem6qdl> "

View file

@ -14,6 +14,7 @@ CONFIG_MX6QDL=y
CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_TARGET_MX6Q_ENGICAM=y
CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-rqs" CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-rqs"
CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_TEXT_BASE=0x00908000
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y CONFIG_SPL_SERIAL=y
CONFIG_SPL=y CONFIG_SPL=y
CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y
@ -26,6 +27,7 @@ CONFIG_SPL_LOAD_FIT=y
CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOOTDELAY=3 CONFIG_BOOTDELAY=3
CONFIG_SPL_RAW_IMAGE_SUPPORT=y
CONFIG_SPL_OS_BOOT=y CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_WATCHDOG=y CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y CONFIG_HUSH_PARSER=y

View file

@ -14,6 +14,7 @@ CONFIG_MX6UL=y
CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_TARGET_MX6UL_ENGICAM=y
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-geam" CONFIG_DEFAULT_DEVICE_TREE="imx6ul-geam"
CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_TEXT_BASE=0x00908000
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y CONFIG_SPL_SERIAL=y
CONFIG_SPL=y CONFIG_SPL=y
CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y
@ -24,6 +25,7 @@ CONFIG_FIT_VERBOSE=y
CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOOTDELAY=3 CONFIG_BOOTDELAY=3
CONFIG_SPL_RAW_IMAGE_SUPPORT=y
CONFIG_SPL_WATCHDOG=y CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="geam6ul> " CONFIG_SYS_PROMPT="geam6ul> "

View file

@ -24,6 +24,7 @@ CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOOTDELAY=3 CONFIG_BOOTDELAY=3
CONFIG_SPL_DMA=y CONFIG_SPL_DMA=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_WATCHDOG=y CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="geam6ul> " CONFIG_SYS_PROMPT="geam6ul> "

View file

@ -14,6 +14,7 @@ CONFIG_MX6UL=y
CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_TARGET_MX6UL_ENGICAM=y
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-emmc" CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-emmc"
CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_TEXT_BASE=0x00908000
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y CONFIG_SPL_SERIAL=y
CONFIG_SPL=y CONFIG_SPL=y
CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y
@ -24,6 +25,7 @@ CONFIG_FIT_VERBOSE=y
CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOOTDELAY=3 CONFIG_BOOTDELAY=3
CONFIG_SPL_RAW_IMAGE_SUPPORT=y
CONFIG_SPL_WATCHDOG=y CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="isiotmx6ul> " CONFIG_SYS_PROMPT="isiotmx6ul> "

View file

@ -24,6 +24,7 @@ CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOOTDELAY=3 CONFIG_BOOTDELAY=3
CONFIG_SPL_DMA=y CONFIG_SPL_DMA=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_WATCHDOG=y CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="isiotmx6ul> " CONFIG_SYS_PROMPT="isiotmx6ul> "

View file

@ -2,6 +2,9 @@ CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y CONFIG_ARCH_IMX8M=y
CONFIG_SYS_TEXT_BASE=0x40200000 CONFIG_SYS_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x600000 CONFIG_SYS_MALLOC_LEN=0x600000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x400000 CONFIG_ENV_OFFSET=0x400000
CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C1=y
@ -11,7 +14,9 @@ CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mq-evk" CONFIG_DEFAULT_DEVICE_TREE="imx8mq-evk"
CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MQ_EVK=y CONFIG_TARGET_IMX8MQ_EVK=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_LOAD_ADDR=0x40480000 CONFIG_SYS_LOAD_ADDR=0x40480000
@ -22,6 +27,9 @@ CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_POWER=y
CONFIG_SPL_WATCHDOG=y
# CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_NETBSD is not set
# CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_IMPORTENV is not set

View file

@ -2,6 +2,9 @@ CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y CONFIG_ARCH_IMX8M=y
CONFIG_SYS_TEXT_BASE=0x40200000 CONFIG_SYS_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x600000 CONFIG_SYS_MALLOC_LEN=0x600000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x400000 CONFIG_ENV_OFFSET=0x400000
@ -12,7 +15,9 @@ CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mq-phanbell" CONFIG_DEFAULT_DEVICE_TREE="imx8mq-phanbell"
CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MQ_PHANBELL=y CONFIG_TARGET_IMX8MQ_PHANBELL=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x40480000 CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y CONFIG_FIT=y
@ -22,6 +27,8 @@ CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
CONFIG_SD_BOOT=y CONFIG_SD_BOOT=y
CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_POWER=y
CONFIG_HUSH_PARSER=y CONFIG_HUSH_PARSER=y
# CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_NETBSD is not set
# CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_EXPORTENV is not set

View file

@ -2,6 +2,8 @@ CONFIG_ARM=y
CONFIG_TARGET_LS1021AIOT=y CONFIG_TARGET_LS1021AIOT=y
CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x1002000 CONFIG_SYS_MALLOC_LEN=0x1002000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1 CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_OFFSET=0x100000
@ -11,6 +13,7 @@ CONFIG_SYS_I2C_MXC_I2C3=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart" CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart"
CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y CONFIG_SPL_SERIAL=y
CONFIG_SPL=y CONFIG_SPL=y
CONFIG_AHCI=y CONFIG_AHCI=y
@ -25,7 +28,10 @@ CONFIG_ID_EEPROM=y
CONFIG_SPL_FSL_PBL=y CONFIG_SPL_FSL_PBL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_BOOTZ=y CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y CONFIG_CMD_GREPENV=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2

View file

@ -2,6 +2,8 @@ CONFIG_ARM=y
CONFIG_TARGET_LS1046AQDS=y CONFIG_TARGET_LS1046AQDS=y
CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SYS_MALLOC_LEN=0x102000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2 CONFIG_NR_DRAM_BANKS=2
CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_SYS_MEMTEST_END=0x9fffffff
@ -17,6 +19,7 @@ CONFIG_SPL_TEXT_BASE=0x10000000
CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_FSL_LS_PPA=y CONFIG_FSL_LS_PPA=y
CONFIG_SPL_SERIAL=y CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y CONFIG_SPL=y
CONFIG_AHCI=y CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y CONFIG_DISTRO_DEFAULTS=y
@ -35,7 +38,11 @@ CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOARD_INIT=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_WATCHDOG=y
CONFIG_CMD_BOOTZ=y CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y CONFIG_CMD_GREPENV=y

View file

@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SYS_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0xa00000 CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SPL_GPIO=y CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1 CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SIZE=0x20000

View file

@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SYS_TEXT_BASE=0x17800000
CONFIG_SYS_MALLOC_LEN=0xa00000 CONFIG_SYS_MALLOC_LEN=0xa00000
CONFIG_SPL_GPIO=y CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1 CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SIZE=0x20000

View file

@ -19,6 +19,7 @@ CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_MISC_INIT=y CONFIG_ARCH_MISC_INIT=y
# CONFIG_SPL_FRAMEWORK is not set # CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_NO_CPU_SUPPORT=y
CONFIG_HUSH_PARSER=y CONFIG_HUSH_PARSER=y
CONFIG_CMD_GPIO=y CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y CONFIG_CMD_MMC=y

View file

@ -19,6 +19,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_MISC_INIT=y CONFIG_ARCH_MISC_INIT=y
# CONFIG_SPL_FRAMEWORK is not set # CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_NO_CPU_SUPPORT=y
CONFIG_HUSH_PARSER=y CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y CONFIG_CMD_BOOTZ=y
CONFIG_CMD_DM=y CONFIG_CMD_DM=y

View file

@ -18,6 +18,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_MISC_INIT=y CONFIG_ARCH_MISC_INIT=y
# CONFIG_SPL_FRAMEWORK is not set # CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_NO_CPU_SUPPORT=y
CONFIG_HUSH_PARSER=y CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set # CONFIG_CMD_FLASH is not set

View file

@ -20,6 +20,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_MISC_INIT=y CONFIG_ARCH_MISC_INIT=y
# CONFIG_SPL_FRAMEWORK is not set # CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_NO_CPU_SUPPORT=y
CONFIG_HUSH_PARSER=y CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y CONFIG_CMD_BOOTZ=y
CONFIG_CMD_DM=y CONFIG_CMD_DM=y

View file

@ -18,6 +18,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_MISC_INIT=y CONFIG_ARCH_MISC_INIT=y
# CONFIG_SPL_FRAMEWORK is not set # CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_NO_CPU_SUPPORT=y
CONFIG_HUSH_PARSER=y CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set # CONFIG_CMD_FLASH is not set

View file

@ -16,6 +16,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_MISC_INIT=y CONFIG_ARCH_MISC_INIT=y
# CONFIG_SPL_FRAMEWORK is not set # CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_NO_CPU_SUPPORT=y
CONFIG_HUSH_PARSER=y CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set # CONFIG_CMD_FLASH is not set

View file

@ -2,6 +2,9 @@ CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y CONFIG_ARCH_IMX8M=y
CONFIG_SYS_TEXT_BASE=0x40200000 CONFIG_SYS_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_LEN=0x600000 CONFIG_SYS_MALLOC_LEN=0x600000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x400000 CONFIG_ENV_OFFSET=0x400000
CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C1=y
@ -11,7 +14,9 @@ CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mq-pico-pi" CONFIG_DEFAULT_DEVICE_TREE="imx8mq-pico-pi"
CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_PICO_IMX8MQ=y CONFIG_TARGET_PICO_IMX8MQ=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x40480000 CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y CONFIG_FIT=y
@ -21,6 +26,9 @@ CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_POWER=y
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y CONFIG_HUSH_PARSER=y
# CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_NETBSD is not set
# CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_EXPORTENV is not set

View file

@ -21,6 +21,7 @@ CONFIG_SILENT_CONSOLE=y
CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_SPL_OS_BOOT=y
CONFIG_CMD_SPL=y CONFIG_CMD_SPL=y
CONFIG_CMD_GPIO=y CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y CONFIG_CMD_GPT=y

View file

@ -480,7 +480,7 @@ comment "Generic NAND options"
config SYS_NAND_BLOCK_SIZE config SYS_NAND_BLOCK_SIZE
hex "NAND chip eraseblock size" hex "NAND chip eraseblock size"
depends on ARCH_SUNXI || SPL_NAND_SUPPORT || TPL_NAND_SUPPORT depends on ARCH_SUNXI || SPL_NAND_SUPPORT || TPL_NAND_SUPPORT
depends on !NAND_MXS_DT && !NAND_DENALI_DT && !NAND_LPC32XX_MLC depends on !NAND_MXS && !NAND_DENALI_DT && !NAND_LPC32XX_MLC && !NAND_FSL_IFC
help help
Number of data bytes in one eraseblock for the NAND chip on the Number of data bytes in one eraseblock for the NAND chip on the
board. This is the multiple of NAND_PAGE_SIZE and the number of board. This is the multiple of NAND_PAGE_SIZE and the number of
@ -505,7 +505,7 @@ config SYS_NAND_PAGE_SIZE
depends on ARCH_SUNXI || NAND_OMAP_GPMC || NAND_LPC32XX_SLC || \ depends on ARCH_SUNXI || NAND_OMAP_GPMC || NAND_LPC32XX_SLC || \
SPL_NAND_SIMPLE || (NAND_MXC && SPL_NAND_SUPPORT) || \ SPL_NAND_SIMPLE || (NAND_MXC && SPL_NAND_SUPPORT) || \
(NAND_ATMEL && SPL_NAND_SUPPORT) || SPL_GENERATE_ATMEL_PMECC_HEADER (NAND_ATMEL && SPL_NAND_SUPPORT) || SPL_GENERATE_ATMEL_PMECC_HEADER
depends on !NAND_MXS_DT && !NAND_DENALI_DT && !NAND_LPC32XX_MLC depends on !NAND_MXS && !NAND_DENALI_DT && !NAND_LPC32XX_MLC
help help
Number of data bytes in one page for the NAND chip on the Number of data bytes in one page for the NAND chip on the
board, not including the OOB area. board, not including the OOB area.
@ -515,7 +515,7 @@ config SYS_NAND_OOBSIZE
depends on ARCH_SUNXI || NAND_OMAP_GPMC || NAND_LPC32XX_SLC || \ depends on ARCH_SUNXI || NAND_OMAP_GPMC || NAND_LPC32XX_SLC || \
SPL_NAND_SIMPLE || (NAND_MXC && SPL_NAND_SUPPORT) || \ SPL_NAND_SIMPLE || (NAND_MXC && SPL_NAND_SUPPORT) || \
(NAND_ATMEL && SPL_NAND_SUPPORT) || SPL_GENERATE_ATMEL_PMECC_HEADER (NAND_ATMEL && SPL_NAND_SUPPORT) || SPL_GENERATE_ATMEL_PMECC_HEADER
depends on !NAND_MXS_DT && !NAND_DENALI_DT && !NAND_LPC32XX_MLC depends on !NAND_MXS && !NAND_DENALI_DT && !NAND_LPC32XX_MLC
help help
Number of bytes in the Out-Of-Band area for the NAND chip on Number of bytes in the Out-Of-Band area for the NAND chip on
the board. the board.

View file

@ -21,7 +21,6 @@
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_STACK 0x013E000 #define CONFIG_SPL_STACK 0x013E000
#define CONFIG_SPL_BSS_START_ADDR 0x00128000 #define CONFIG_SPL_BSS_START_ADDR 0x00128000
#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */ #define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */

View file

@ -12,13 +12,11 @@
#include <asm/arch/imx-regs.h> #include <asm/arch/imx-regs.h>
#ifdef CONFIG_SPL_BUILD #ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_TEXT_BASE 0x0
#define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SPL_MAX_SIZE (124 * 1024)
#define CONFIG_SYS_MONITOR_LEN (1024 * 1024) #define CONFIG_SYS_MONITOR_LEN (1024 * 1024)
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_STACK 0x013E000 #define CONFIG_SPL_STACK 0x013E000
#define CONFIG_SPL_BSS_START_ADDR 0x00128000 #define CONFIG_SPL_BSS_START_ADDR 0x00128000
#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */ #define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */

View file

@ -72,13 +72,8 @@
#define CONFIG_SPL_STACK (0x40000000 + ((212 - 16) << 10)) #define CONFIG_SPL_STACK (0x40000000 + ((212 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_I2C
#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
/* SPL related MMC defines */ /* SPL related MMC defines */
#define CONFIG_SPL_MMC
#ifdef CONFIG_SPL_BUILD #ifdef CONFIG_SPL_BUILD
#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */ #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
#endif #endif

View file

@ -162,12 +162,6 @@
/* SPL */ /* SPL */
#ifdef CONFIG_SPL #ifdef CONFIG_SPL
# ifdef CONFIG_ENV_IS_IN_NAND
# define CONFIG_SPL_NAND_SUPPORT
# else
# define CONFIG_SPL_MMC
# endif
# include "imx6_spl.h" # include "imx6_spl.h"
#endif #endif

View file

@ -20,7 +20,6 @@
#ifdef CONFIG_SPL_BUILD #ifdef CONFIG_SPL_BUILD
/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_STACK 0x960000 #define CONFIG_SPL_STACK 0x960000
#define CONFIG_SPL_BSS_START_ADDR 0x0098FC00 #define CONFIG_SPL_BSS_START_ADDR 0x0098FC00
#define CONFIG_SPL_BSS_MAX_SIZE 0x400 /* 1 KB */ #define CONFIG_SPL_BSS_MAX_SIZE 0x400 /* 1 KB */

View file

@ -19,16 +19,7 @@
#ifdef CONFIG_SPL_BUILD #ifdef CONFIG_SPL_BUILD
/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
#define CONFIG_SPL_WATCHDOG
#define CONFIG_SPL_DRIVERS_MISC
#define CONFIG_SPL_POWER
#define CONFIG_SPL_I2C
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_STACK 0x187FF0 #define CONFIG_SPL_STACK 0x187FF0
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_GPIO
#define CONFIG_SPL_MMC
#define CONFIG_SPL_BSS_START_ADDR 0x00180000 #define CONFIG_SPL_BSS_START_ADDR 0x00180000
#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */ #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000

View file

@ -16,16 +16,7 @@
#ifdef CONFIG_SPL_BUILD #ifdef CONFIG_SPL_BUILD
/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
#define CONFIG_SPL_WATCHDOG
#define CONFIG_SPL_DRIVERS_MISC
#define CONFIG_SPL_POWER
#define CONFIG_SPL_I2C
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_STACK 0x187FF0 #define CONFIG_SPL_STACK 0x187FF0
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_GPIO
#define CONFIG_SPL_MMC
#define CONFIG_SPL_BSS_START_ADDR 0x00180000 #define CONFIG_SPL_BSS_START_ADDR 0x00180000
#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */ #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000

View file

@ -18,7 +18,6 @@
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_STACK 0x013E000 #define CONFIG_SPL_STACK 0x013E000
#define CONFIG_SPL_BSS_START_ADDR 0x00128000 #define CONFIG_SPL_BSS_START_ADDR 0x00128000
#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */ #define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */

View file

@ -16,7 +16,6 @@
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_STACK 0x013E000 #define CONFIG_SPL_STACK 0x013E000
#define CONFIG_SPL_BSS_START_ADDR 0x00128000 #define CONFIG_SPL_BSS_START_ADDR 0x00128000
#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */ #define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */

View file

@ -18,7 +18,6 @@
#define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
#ifdef CONFIG_SPL_BUILD #ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_STACK 0x22050000 #define CONFIG_SPL_STACK 0x22050000
#define CONFIG_SPL_BSS_START_ADDR 0x22048000 #define CONFIG_SPL_BSS_START_ADDR 0x22048000
#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */ #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
@ -27,8 +26,6 @@
#define CONFIG_MALLOC_F_ADDR 0x22040000 #define CONFIG_MALLOC_F_ADDR 0x22040000
#define CONFIG_SPL_LOAD_FIT_ADDRESS 0x95000000 /* SPL_RAM needed */
#define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ #define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */
#endif #endif

View file

@ -48,12 +48,6 @@
#define SDRAM_CFG_BI 0x00000001 #define SDRAM_CFG_BI 0x00000001
#ifdef CONFIG_SD_BOOT #ifdef CONFIG_SD_BOOT
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_I2C
#define CONFIG_SPL_WATCHDOG
#define CONFIG_SPL_MMC
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xe8 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xe8
#define CONFIG_SPL_MAX_SIZE 0x1a000 #define CONFIG_SPL_MAX_SIZE 0x1a000

View file

@ -95,14 +95,7 @@
/* NAND SPL */ /* NAND SPL */
#ifdef CONFIG_NAND_BOOT #ifdef CONFIG_NAND_BOOT
#define CONFIG_SPL_PBL_PAD #define CONFIG_SPL_PBL_PAD
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_WATCHDOG
#define CONFIG_SPL_I2C
#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_DRIVERS_MISC
#define CONFIG_SPL_MAX_SIZE 0x17000 /* 90 KiB */ #define CONFIG_SPL_MAX_SIZE 0x17000 /* 90 KiB */
#define CONFIG_SPL_STACK 0x1001f000 #define CONFIG_SPL_STACK 0x1001f000
#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE

View file

@ -204,7 +204,6 @@ unsigned long long get_qixis_addr(void);
#ifdef CONFIG_SPL #ifdef CONFIG_SPL
#define CONFIG_SPL_BSS_START_ADDR 0x80100000 #define CONFIG_SPL_BSS_START_ADDR 0x80100000
#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 #define CONFIG_SPL_BSS_MAX_SIZE 0x00100000
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_MAX_SIZE 0x16000 #define CONFIG_SPL_MAX_SIZE 0x16000
#define CONFIG_SPL_STACK (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0) #define CONFIG_SPL_STACK (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0)
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"

View file

@ -9,7 +9,6 @@
#include "mx6_common.h" #include "mx6_common.h"
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#include "imx6_spl.h" #include "imx6_spl.h"
#define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + 0x80000) #define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + 0x80000)

View file

@ -39,8 +39,4 @@
/* MMC */ /* MMC */
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_DRIVERS_MISC
#endif
#endif #endif

View file

@ -38,10 +38,6 @@
#define CONFIG_ARMV7_SECURE_BASE 0x00900000 #define CONFIG_ARMV7_SECURE_BASE 0x00900000
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_DRIVERS_MISC
#endif
/* /*
* If we have defined the OPTEE ram size and not OPTEE it means that we were * If we have defined the OPTEE ram size and not OPTEE it means that we were
* launched by OPTEE, because of that we shall skip all the low level * launched by OPTEE, because of that we shall skip all the low level

View file

@ -45,7 +45,6 @@
/* SPL */ /* SPL */
#ifndef CONFIG_SPL_FRAMEWORK #ifndef CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_NO_CPU_SUPPORT
#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs" #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
#endif #endif

View file

@ -20,7 +20,6 @@
(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
#ifdef CONFIG_SPL_BUILD #ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_STACK 0x960000 #define CONFIG_SPL_STACK 0x960000
#define CONFIG_SPL_BSS_START_ADDR 0x98FC00 #define CONFIG_SPL_BSS_START_ADDR 0x98FC00
#define CONFIG_SPL_BSS_MAX_SIZE SZ_1K #define CONFIG_SPL_BSS_MAX_SIZE SZ_1K

View file

@ -16,16 +16,7 @@
#ifdef CONFIG_SPL_BUILD #ifdef CONFIG_SPL_BUILD
/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
#define CONFIG_SPL_WATCHDOG
#define CONFIG_SPL_DRIVERS_MISC
#define CONFIG_SPL_POWER
#define CONFIG_SPL_I2C
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_STACK 0x187FF0 #define CONFIG_SPL_STACK 0x187FF0
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_GPIO
#define CONFIG_SPL_MMC
#define CONFIG_SPL_BSS_START_ADDR 0x00180000 #define CONFIG_SPL_BSS_START_ADDR 0x00180000
#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */ #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000

View file

@ -27,7 +27,6 @@
#endif #endif
/* SPL */ /* SPL */
#define CONFIG_SPL_TEXT_BASE 0x200000
#define CONFIG_SPL_MAX_SIZE 0x10000 #define CONFIG_SPL_MAX_SIZE 0x10000
#define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000
#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000

View file

@ -137,8 +137,6 @@
#ifdef CONFIG_SPL_BUILD #ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_INIT_SP_ADDR 0x301000 #define CONFIG_SYS_INIT_SP_ADDR 0x301000
#define CONFIG_SPL_STACK_R
#define CONFIG_SPL_STACK_R_ADDR CONFIG_SYS_TEXT_BASE
#else #else
/* /*
* Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,

View file

@ -48,7 +48,6 @@
/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
* since it needs to fit in with the other values. By also #defining it * since it needs to fit in with the other values. By also #defining it
* we get warnings if the Kconfig value mismatches. */ * we get warnings if the Kconfig value mismatches. */
#define CONFIG_SPL_STACK_R_ADDR 0x2fe00000
#define CONFIG_SPL_BSS_START_ADDR 0x2ff80000 #define CONFIG_SPL_BSS_START_ADDR 0x2ff80000
#else #else
#define SDRAM_OFFSET(x) 0x4##x #define SDRAM_OFFSET(x) 0x4##x
@ -57,7 +56,6 @@
/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
* since it needs to fit in with the other values. By also #defining it * since it needs to fit in with the other values. By also #defining it
* we get warnings if the Kconfig value mismatches. */ * we get warnings if the Kconfig value mismatches. */
#define CONFIG_SPL_STACK_R_ADDR 0x4fe00000
#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000
#endif #endif

View file

@ -22,9 +22,6 @@
#define CONFIG_SPL_MAX_FOOTPRINT CONFIG_SYS_SPI_U_BOOT_OFFS #define CONFIG_SPL_MAX_FOOTPRINT CONFIG_SYS_SPI_U_BOOT_OFFS
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
/* No falcon support */
#undef CONFIG_SPL_OS_BOOT
/* FPGA commands that we don't use */ /* FPGA commands that we don't use */
/* Extras */ /* Extras */

View file

@ -21,9 +21,6 @@
func(MMC, mmc, 1) \ func(MMC, mmc, 1) \
#ifndef CONFIG_TPL_BUILD #ifndef CONFIG_TPL_BUILD
#define CONFIG_SPL_OS_BOOT
/* Falcon Mode */ /* Falcon Mode */
#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" #define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"

View file

@ -251,7 +251,6 @@
#endif #endif
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU) #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU)
# define CONFIG_SPL_ENV_SUPPORT
# define CONFIG_SPL_HASH # define CONFIG_SPL_HASH
# define CONFIG_ENV_MAX_ENTRIES 10 # define CONFIG_ENV_MAX_ENTRIES 10
#endif #endif