arm: dts: imx8mp-venice-gw74xx: add dsa phy handles to u-boot dtsi

The upstream Linux DSA drivers do not require phy-handle nodes in
the DSA ports yet the U-Boot DSA drivers do. Add a phy-handle and
the mdio nodes to the u-boot.dtsi file so that future dts file
syncrhonization between Linux and U-Boot don't break networking.

Fixes: e0caa84ca6 ("imx8mp: synchronise device tree with linux")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>

arch/arm/dts/imx8mp-venice-gw74xx-u-boot.dtsi

@@ -162,6 +162,65 @@
 	u-boot,dm-spl;
 };
 
+&switch {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		lan1: port@0 {
+			phy-handle = <&sw_phy0>;
+		};
+
+		lan2: port@1 {
+			phy-handle = <&sw_phy1>;
+		};
+
+		lan3: port@2 {
+			phy-handle = <&sw_phy2>;
+		};
+
+		lan4: port@3 {
+			phy-handle = <&sw_phy3>;
+		};
+
+		lan5: port@4 {
+			phy-handle = <&sw_phy4>;
+		};
+	};
+
+	mdios {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		mdio@0 {
+			reg = <0>;
+			compatible = "microchip,ksz-mdio";
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			sw_phy0: ethernet-phy@0 {
+				reg = <0x0>;
+			};
+
+			sw_phy1: ethernet-phy@1 {
+				reg = <0x1>;
+			};
+
+			sw_phy2: ethernet-phy@2 {
+				reg = <0x2>;
+			};
+
+			sw_phy3: ethernet-phy@3 {
+				reg = <0x3>;
+			};
+
+			sw_phy4: ethernet-phy@4 {
+				reg = <0x4>;
+			};
+		};
+	};
+};
+
 &usdhc2 {
 	assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_400M>;
 	assigned-clock-rates = <400000000>;