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ARM: armv7: move ARMV7_PSCI_NR_CPUS to Kconfig

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Move this option to Kconfig and set its default value to 4; this
increases the number of supported CPUs for some boards.

It consumes 1KB memory per CPU for PSCI stack, but it should not
be a big deal, given the amount of memory used for the modern OSes.

Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit is contained in:
Masahiro Yamada 2016-08-30 16:22:23 +09:00 • committed by Tom Rini
parent 217f92bb79
commit 1544698816
12 changed files with 9 additions and 22 deletions

9
arch/arm/cpu/armv7/Kconfig
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@ -41,6 +41,15 @@ config ARMV7_PSCI
help help
Say Y here to enable PSCI support. Say Y here to enable PSCI support.
config ARMV7_PSCI_NR_CPUS
int "Maximum supported CPUs for PSCI"
depends on ARMV7_NONSEC
default 4
help
The maximum number of CPUs supported in the PSCI firmware.
It is no problem to set a larger value than the number of
CPUs in the actual hardware implementation.
config ARMV7_LPAE config ARMV7_LPAE
bool "Use LPAE page table format" if EXPERT bool "Use LPAE page table format" if EXPERT
depends on CPU_V7 depends on CPU_V7

1
include/configs/arndale.h
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@ -45,7 +45,6 @@
#define CONFIG_S5P_PA_SYSRAM 0x02020000 #define CONFIG_S5P_PA_SYSRAM 0x02020000
#define CONFIG_SMP_PEN_ADDR CONFIG_S5P_PA_SYSRAM #define CONFIG_SMP_PEN_ADDR CONFIG_S5P_PA_SYSRAM
#define CONFIG_ARMV7_PSCI_NR_CPUS 4
/* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */ /* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */
#define CONFIG_ARM_GIC_BASE_ADDRESS 0x10480000 #define CONFIG_ARM_GIC_BASE_ADDRESS 0x10480000

1
include/configs/bcm_ep_board.h
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@ -91,6 +91,5 @@
/* Misc utility code */ /* Misc utility code */
#define CONFIG_BOUNCE_BUFFER #define CONFIG_BOUNCE_BUFFER
#define CONFIG_CRC32_VERIFY #define CONFIG_CRC32_VERIFY
#define CONFIG_ARMV7_PSCI_NR_CPUS 4
#endif /* __BCM_EP_BOARD_H */ #endif /* __BCM_EP_BOARD_H */

1
include/configs/jetson-tk1.h
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@ -60,7 +60,6 @@
#include "tegra-common-usb-gadget.h" #include "tegra-common-usb-gadget.h"
#include "tegra-common-post.h" #include "tegra-common-post.h"
#define CONFIG_ARMV7_PSCI_NR_CPUS 4
/* Reserve top 1M for secure RAM */ /* Reserve top 1M for secure RAM */
#define CONFIG_ARMV7_SECURE_BASE 0xfff00000 #define CONFIG_ARMV7_SECURE_BASE 0xfff00000
#define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x00100000 #define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x00100000

1
include/configs/ls1021aqds.h
View file

@ -10,7 +10,6 @@
#define CONFIG_LS102XA #define CONFIG_LS102XA
#define CONFIG_ARMV7_PSCI_1_0 #define CONFIG_ARMV7_PSCI_1_0
#define CONFIG_ARMV7_PSCI_NR_CPUS CONFIG_MAX_CPUS
#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR #define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR

1
include/configs/ls1021atwr.h
View file

@ -10,7 +10,6 @@
#define CONFIG_LS102XA #define CONFIG_LS102XA
#define CONFIG_ARMV7_PSCI_1_0 #define CONFIG_ARMV7_PSCI_1_0
#define CONFIG_ARMV7_PSCI_NR_CPUS CONFIG_MAX_CPUS
#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR #define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR

1
include/configs/mx7_common.h
View file

@ -72,7 +72,6 @@
#define CONFIG_CMD_FUSE #define CONFIG_CMD_FUSE
#define CONFIG_MXC_OCOTP #define CONFIG_MXC_OCOTP
#define CONFIG_ARMV7_PSCI_NR_CPUS 2
#define CONFIG_ARMV7_SECURE_BASE 0x00900000 #define CONFIG_ARMV7_SECURE_BASE 0x00900000
#endif #endif

1
include/configs/sun6i.h
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@ -22,7 +22,6 @@
#define CONFIG_SUNXI_USB_PHYS 3 #define CONFIG_SUNXI_USB_PHYS 3
#define CONFIG_ARMV7_PSCI_NR_CPUS 4
#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE #define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE
#define CONFIG_ARMV7_SECURE_MAX_SIZE (64 * 1024) /* 64 KB */ #define CONFIG_ARMV7_SECURE_MAX_SIZE (64 * 1024) /* 64 KB */

1
include/configs/sun7i.h
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@ -20,7 +20,6 @@
#define CONFIG_SUNXI_USB_PHYS 3 #define CONFIG_SUNXI_USB_PHYS 3
#define CONFIG_ARMV7_PSCI_NR_CPUS 2
#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE #define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE
#define CONFIG_ARMV7_SECURE_MAX_SIZE (64 * 1024) /* 64 KB */ #define CONFIG_ARMV7_SECURE_MAX_SIZE (64 * 1024) /* 64 KB */

12
include/configs/sun8i.h
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@ -26,18 +26,6 @@
#define CONFIG_SUNXI_USB_PHYS 2 #define CONFIG_SUNXI_USB_PHYS 2
#endif #endif
#ifndef CONFIG_MACH_SUN8I_A83T
#if defined(CONFIG_MACH_SUN8I_A23)
#define CONFIG_ARMV7_PSCI_NR_CPUS 2
#elif defined(CONFIG_MACH_SUN8I_A33)
#define CONFIG_ARMV7_PSCI_NR_CPUS 4
#elif defined(CONFIG_MACH_SUN8I_H3)
#define CONFIG_ARMV7_PSCI_NR_CPUS 4
#else
#error Unsupported sun8i variant
#endif
#endif
/* /*
* Include common sunxi configuration where most the settings are * Include common sunxi configuration where most the settings are
*/ */

1
include/configs/uniphier.h
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@ -12,7 +12,6 @@
#define __CONFIG_UNIPHIER_COMMON_H__ #define __CONFIG_UNIPHIER_COMMON_H__
#define CONFIG_ARMV7_PSCI_1_0 #define CONFIG_ARMV7_PSCI_1_0
#define CONFIG_ARMV7_PSCI_NR_CPUS 4
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10

1
include/configs/vexpress_ca15_tc2.h
View file

@ -16,6 +16,5 @@
#define CONFIG_SYSFLAGS_ADDR 0x1c010030 #define CONFIG_SYSFLAGS_ADDR 0x1c010030
#define CONFIG_SMP_PEN_ADDR CONFIG_SYSFLAGS_ADDR #define CONFIG_SMP_PEN_ADDR CONFIG_SYSFLAGS_ADDR
#define CONFIG_ARMV7_PSCI_NR_CPUS 4
#endif #endif