From 9184c92f46da7a0cd53a806046e56911b61c90e2 Mon Sep 17 00:00:00 2001 From: Tien Fong Chee Date: Tue, 12 Feb 2019 20:41:34 +0800 Subject: [PATCH 01/20] fpga: Add support for getting external data address and length This function supports getting both data address and length for existing FPGA subimage and FPGA external data. Signed-off-by: Tien Fong Chee Signed-off-by: Michal Simek --- cmd/fpga.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/cmd/fpga.c b/cmd/fpga.c index 88a8e3f318..b1f224bc6a 100644 --- a/cmd/fpga.c +++ b/cmd/fpga.c @@ -343,9 +343,9 @@ static int do_fpga_loadmk(cmd_tbl_t *cmdtp, int flag, int argc, return CMD_RET_FAILURE; } - /* get fpga subimage data address and length */ - if (fit_image_get_data(fit_hdr, noffset, &fit_data, - &data_size)) { + /* get fpga subimage/external data address and length */ + if (fit_image_get_data_and_size(fit_hdr, noffset, + &fit_data, &data_size)) { puts("Fpga subimage data not found\n"); return CMD_RET_FAILURE; } From 3003c445b3cb1d1ca7e2304bfa3e2faf2ae02f80 Mon Sep 17 00:00:00 2001 From: Tien Fong Chee Date: Fri, 15 Feb 2019 15:57:07 +0800 Subject: [PATCH 02/20] fpga: Replace char * with const char * for filename Ensure the string for filename is always constant, otherwise it can be corrupted by the writing. Signed-off-by: Tien Fong Chee Signed-off-by: Michal Simek --- drivers/fpga/zynqpl.c | 3 ++- include/fpga.h | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c index 499310d0c0..683cf14b47 100644 --- a/drivers/fpga/zynqpl.c +++ b/drivers/fpga/zynqpl.c @@ -421,7 +421,8 @@ static int zynq_loadfs(xilinx_desc *desc, const void *buf, size_t bsize, loff_t blocksize, actread; loff_t pos = 0; int fstype; - char *interface, *dev_part, *filename; + char *interface, *dev_part; + const char *filename; blocksize = fsinfo->blocksize; interface = fsinfo->interface; diff --git a/include/fpga.h b/include/fpga.h index 195f0bdd57..51de5c55f8 100644 --- a/include/fpga.h +++ b/include/fpga.h @@ -41,7 +41,7 @@ typedef struct { /* typedef fpga_desc */ unsigned int blocksize; char *interface; char *dev_part; - char *filename; + const char *filename; int fstype; } fpga_fs_info; From 963482120d182835e58d234961c5f7c3d5f78202 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 18 Feb 2019 13:22:56 +0100 Subject: [PATCH 03/20] test: py: Extend fpga test with fit image with external data Images are created mkimage -f fit.its -E download-fit-external.ub and test expects these entries. env__fpga_under_test = { ... "mkimage_fit_external": download-fit-external.ub", "mkimage_fit_external_size": xxxxx, ... } Test download file and loads it to fpga. Signed-off-by: Michal Simek Reviewed-by: Simon Glass --- test/py/tests/test_fpga.py | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/test/py/tests/test_fpga.py b/test/py/tests/test_fpga.py index 798f6eed3d..e3bb7b41c7 100644 --- a/test/py/tests/test_fpga.py +++ b/test/py/tests/test_fpga.py @@ -353,6 +353,19 @@ def test_fpga_loadmk_legacy_gz(u_boot_console): output = u_boot_console.run_command('fpga loadmk %x %x && echo %s' % (dev, addr, expected_text)) assert expected_text in output +@pytest.mark.buildconfigspec('cmd_fpga') +@pytest.mark.buildconfigspec('cmd_fpga_loadmk') +@pytest.mark.buildconfigspec('fit') +@pytest.mark.buildconfigspec('cmd_echo') +def test_fpga_loadmk_fit_external(u_boot_console): + f, dev, addr, bit, bit_size = load_file_from_var(u_boot_console, 'mkimage_fit_external') + + u_boot_console.run_command('imi %x' % (addr)) + + expected_text = 'FPGA loaded successfully' + output = u_boot_console.run_command('fpga loadmk %x %x:fpga && echo %s' % (dev, addr, expected_text)) + assert expected_text in output + @pytest.mark.buildconfigspec('cmd_fpga') @pytest.mark.buildconfigspec('cmd_fpga_loadmk') @pytest.mark.buildconfigspec('fit') From d6cedcc0cd455f608bbf603e666875dddbb9df2f Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 14 Feb 2019 14:22:48 +0100 Subject: [PATCH 04/20] arm64: zynqmp: Disable WDT for zcu100 Do not enable WDT by default on this target because distributions are not enabling watchdog driver to service it. Feature has been enabled by: "arm64: zynqmp: Enable cadence WDT for zcu100" (sha1: 767afebbcda59f3ccb04f6c94de8cab2fb7905b6) And WDT is still enabled in rebranded Avnet Ultra 96 board support. Signed-off-by: Michal Simek --- configs/xilinx_zynqmp_zcu100_revC_defconfig | 2 -- 1 file changed, 2 deletions(-) diff --git a/configs/xilinx_zynqmp_zcu100_revC_defconfig b/configs/xilinx_zynqmp_zcu100_revC_defconfig index 6e0767164c..cd7d2f5376 100644 --- a/configs/xilinx_zynqmp_zcu100_revC_defconfig +++ b/configs/xilinx_zynqmp_zcu100_revC_defconfig @@ -85,8 +85,6 @@ CONFIG_USB_ETHER=y CONFIG_USB_ETH_CDC=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y -CONFIG_WDT=y -CONFIG_WDT_CDNS=y CONFIG_SPL_GZIP=y CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y From 1a474381b6f709582c5d71d0d7cc826ab96f8411 Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Thu, 7 Mar 2019 16:08:48 +0530 Subject: [PATCH 05/20] spi: zynqmp_gqspi: Fix tap delay values at 100MHz and 150MHz This patch fixes the tap delay values to be set at 100MHz and 150MHz as per TRM by fixing the if condition to use <= instead of <. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- drivers/spi/zynqmp_gqspi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c index da9413c066..04ea42cbcc 100644 --- a/drivers/spi/zynqmp_gqspi.c +++ b/drivers/spi/zynqmp_gqspi.c @@ -267,7 +267,7 @@ void zynqmp_qspi_set_tapdelay(struct udevice *bus, u32 baudrateval) zynqmp_mmio_read(IOU_TAPDLY_BYPASS_OFST, &tapdlybypass); tapdlybypass |= (TAP_DLY_BYPASS_LQSPI_RX_VALUE << TAP_DLY_BYPASS_LQSPI_RX_SHIFT); - } else if (reqhz < GQSPI_FREQ_100MHZ) { + } else if (reqhz <= GQSPI_FREQ_100MHZ) { zynqmp_mmio_read(IOU_TAPDLY_BYPASS_OFST, &tapdlybypass); tapdlybypass |= (TAP_DLY_BYPASS_LQSPI_RX_VALUE << TAP_DLY_BYPASS_LQSPI_RX_SHIFT); @@ -277,7 +277,7 @@ void zynqmp_qspi_set_tapdelay(struct udevice *bus, u32 baudrateval) datadlyadj |= ((GQSPI_USE_DATA_DLY << GQSPI_USE_DATA_DLY_SHIFT) | (GQSPI_DATA_DLY_ADJ_VALUE << GQSPI_DATA_DLY_ADJ_SHIFT)); - } else if (reqhz < GQSPI_FREQ_150MHZ) { + } else if (reqhz <= GQSPI_FREQ_150MHZ) { lpbkdlyadj = readl(®s->lpbkdly); lpbkdlyadj |= ((GQSPI_LPBK_DLY_ADJ_LPBK_MASK) | GQSPI_LPBK_DLY_ADJ_DLY_0); From be52372ff1bb52872e20543562b095424f040564 Mon Sep 17 00:00:00 2001 From: T Karthik Reddy Date: Wed, 13 Mar 2019 20:24:18 +0530 Subject: [PATCH 06/20] arm64: zynqmp: Use zynqmp_mmio_read/write functions Changed the return type of reset_reason() to int from u32, because zynqmp_mmio_read/write() returns signed value on error. Replaced readl and writel functions with zynqmp_mmio_read & zynqmp_mmio_write functions to access RESET_REASON(CRL_APB) registers. Signed-off-by: T Karthik Reddy Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- board/xilinx/zynqmp/zynqmp.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index db27247850..1e9e441758 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -482,18 +482,20 @@ static const struct { {} }; -static u32 reset_reason(void) +static int reset_reason(void) { - u32 ret; - int i; + u32 reg; + int i, ret; const char *reason = NULL; - ret = readl(&crlapb_base->reset_reason); + ret = zynqmp_mmio_read((ulong)&crlapb_base->reset_reason, ®); + if (ret) + return -EINVAL; puts("Reset reason:\t"); for (i = 0; i < ARRAY_SIZE(reset_reasons); i++) { - if (ret & reset_reasons[i].bit) { + if (reg & reset_reasons[i].bit) { reason = reset_reasons[i].name; printf("%s ", reset_reasons[i].name); break; @@ -504,7 +506,9 @@ static u32 reset_reason(void) env_set("reset_reason", reason); - writel(~0, &crlapb_base->reset_reason); + ret = zynqmp_mmio_write(~0, ~0, (ulong)&crlapb_base->reset_reason); + if (ret) + return -EINVAL; return ret; } From 958d1b18828d017623c2a48da312921437b86b93 Mon Sep 17 00:00:00 2001 From: T Karthik Reddy Date: Tue, 12 Mar 2019 20:20:21 +0530 Subject: [PATCH 07/20] ARM: zynq: Check zynq aes & rsa command parameters count This patch checks for zynq aes & rsa commands max parameters count. Also checks minimum number of parameters count for aes command. Signed-off-by: T Karthik Reddy Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- board/xilinx/zynq/cmds.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/board/xilinx/zynq/cmds.c b/board/xilinx/zynq/cmds.c index 8b48ea3a03..27d44b760d 100644 --- a/board/xilinx/zynq/cmds.c +++ b/board/xilinx/zynq/cmds.c @@ -414,9 +414,13 @@ static int do_zynq_rsa(cmd_tbl_t *cmdtp, int flag, int argc, u32 src_ptr; char *endp; + if (argc != cmdtp->maxargs) + return CMD_RET_FAILURE; + src_ptr = simple_strtoul(argv[2], &endp, 16); if (*argv[2] == 0 || *endp != 0) return CMD_RET_USAGE; + if (zynq_verify_image(src_ptr)) return CMD_RET_FAILURE; @@ -432,6 +436,9 @@ static int zynq_decrypt_image(cmd_tbl_t *cmdtp, int flag, int argc, u32 srcaddr, srclen, dstaddr, dstlen; int status; + if (argc < 5 && argc > cmdtp->maxargs) + return CMD_RET_USAGE; + srcaddr = simple_strtoul(argv[2], &endp, 16); if (*argv[2] == 0 || *endp != 0) return CMD_RET_USAGE; @@ -485,7 +492,7 @@ static int do_zynq(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return CMD_RET_USAGE; zynq_cmd = find_cmd_tbl(argv[1], zynq_commands, ARRAY_SIZE(zynq_commands)); - if (!zynq_cmd || argc != zynq_cmd->maxargs) + if (!zynq_cmd) return CMD_RET_USAGE; ret = zynq_cmd->cmd(zynq_cmd, flag, argc, argv); From ba4f52bd427a7fe1654292f9be8f85d3cd1b2e11 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 21 Feb 2019 10:42:40 +0100 Subject: [PATCH 08/20] arm64: zynqmp: Add debug message about clearing BSS Just have better view on system. Signed-off-by: Michal Simek --- arch/arm/mach-zynqmp/spl.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-zynqmp/spl.c b/arch/arm/mach-zynqmp/spl.c index f6f5414201..f95a264230 100644 --- a/arch/arm/mach-zynqmp/spl.c +++ b/arch/arm/mach-zynqmp/spl.c @@ -27,6 +27,7 @@ void board_init_f(ulong dummy) /* Delay is required for clocks to be propagated */ udelay(1000000); + debug("Clearing BSS 0x%p - 0x%p\n", __bss_start, __bss_end); /* Clear the BSS */ memset(__bss_start, 0, __bss_end - __bss_start); From 8bc8991f223f9697a6a2c33784e5a0dc6ba34228 Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Tue, 19 Mar 2019 11:50:49 +0530 Subject: [PATCH 09/20] arm64: zynqmp: Add spi-flash compatible string to flash node spi-flash compatible string is needed for reading tx and rx bus widths, hence add this compatible string to flash node. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-mini-qspi.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/zynqmp-mini-qspi.dts b/arch/arm/dts/zynqmp-mini-qspi.dts index c235a5f731..49e8a42f6b 100644 --- a/arch/arm/dts/zynqmp-mini-qspi.dts +++ b/arch/arm/dts/zynqmp-mini-qspi.dts @@ -64,7 +64,7 @@ &qspi { status = "okay"; flash@0 { - compatible = "n25q512a11"; + compatible = "n25q512a11", "spi-flash"; #address-cells = <1>; #size-cells = <1>; reg = <0x0>; From 3b4146f133c31ca1004461a08dd9d36148262ff0 Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Tue, 19 Mar 2019 11:50:50 +0530 Subject: [PATCH 10/20] arm64: zynqmp: Define label for flash node Define a label for flash node so that it can be referenced easily as required. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-mini-qspi.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/zynqmp-mini-qspi.dts b/arch/arm/dts/zynqmp-mini-qspi.dts index 49e8a42f6b..1716d5179d 100644 --- a/arch/arm/dts/zynqmp-mini-qspi.dts +++ b/arch/arm/dts/zynqmp-mini-qspi.dts @@ -63,7 +63,7 @@ &qspi { status = "okay"; - flash@0 { + flash0: flash@0 { compatible = "n25q512a11", "spi-flash"; #address-cells = <1>; #size-cells = <1>; From 1922a7b39a961dd5ec4b39e92cd2f2e56d0248f6 Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Tue, 19 Mar 2019 11:50:52 +0530 Subject: [PATCH 11/20] arm64: xilinx: zynqmp: Remove unneeded configs Remove unneeded configs from mini qspi configuration so that it saves space for this mini configuration. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- configs/xilinx_zynqmp_mini_qspi_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index ba521876b7..ec92104f0c 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -6,8 +6,10 @@ CONFIG_ENV_SIZE=0x80 CONFIG_SPL=y CONFIG_SYS_MEM_RSVD_FOR_MMU=y CONFIG_ZYNQMP_NO_DDR=y +# CONFIG_PSCI_RESET is not set # CONFIG_CMD_ZYNQMP is not set CONFIG_NR_DRAM_BANKS=1 +# CONFIG_EXPERT is not set # CONFIG_IMAGE_FORMAT_LEGACY is not set # CONFIG_BOARD_LATE_INIT is not set # CONFIG_DISPLAY_CPUINFO is not set From 2aff722629bd7372c2f58dc65e1029440957ae77 Mon Sep 17 00:00:00 2001 From: Hannes Schmelzer Date: Thu, 14 Feb 2019 08:54:42 +0100 Subject: [PATCH 12/20] ARM: zynq: Add missing i2c get_rate for fixing i2c SPL The commit 'f48ef0d81aa837a33020f8d61abb3929ba613774' did break I2C support because requesting the clock for the I2C ip-block isn't supported during SPL. To fixup this we add support requesting clocks for: - i2c0 - i2c1 Signed-off-by: Hannes Schmelzer Reviewed-by: Heiko Schocher Signed-off-by: Michal Simek --- drivers/clk/clk_zynq.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clk/clk_zynq.c b/drivers/clk/clk_zynq.c index 482f0937cb..b09c37db40 100644 --- a/drivers/clk/clk_zynq.c +++ b/drivers/clk/clk_zynq.c @@ -434,6 +434,8 @@ static ulong zynq_clk_get_rate(struct clk *clk) case lqspi_clk ... pcap_clk: case sdio0_clk ... spi1_clk: return zynq_clk_get_peripheral_rate(priv, id, 0); + case i2c0_aper_clk ... i2c1_aper_clk: + return zynq_clk_get_cpu_rate(priv, cpu_1x_clk); default: return -ENXIO; } From e8f4f1f5d4c95a2ad01893228cc2c102fea3cf98 Mon Sep 17 00:00:00 2001 From: Melin Tomas Date: Wed, 10 Apr 2019 07:26:07 +0000 Subject: [PATCH 13/20] ARM: zynq: fix environment command syntax Update EXTRA_ENV_SETTINGS and related commands to use 'setenv' instead of short name 'set' in commands. E.g. in case command setexpr is enabled the short form does not work properly as the name becomes ambigous. Fixes error messages like: U-Boot> set Unknown command 'set' - try 'help' Signed-off-by: Tomas Melin Signed-off-by: Michal Simek --- include/configs/zynq-common.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 94177c6fcb..3ab783e3a8 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -69,7 +69,7 @@ # define CONFIG_THOR_RESET_OFF # define DFU_ALT_INFO_RAM \ "dfu_ram_info=" \ - "set dfu_alt_info " \ + "setenv dfu_alt_info " \ "${kernel_image} ram 0x3000000 0x500000\\\\;" \ "${devicetree_image} ram 0x2A00000 0x20000\\\\;" \ "${ramdisk_image} ram 0x2000000 0x600000\0" \ @@ -79,7 +79,7 @@ # if defined(CONFIG_MMC_SDHCI_ZYNQ) # define DFU_ALT_INFO_MMC \ "dfu_mmc_info=" \ - "set dfu_alt_info " \ + "setenv dfu_alt_info " \ "${kernel_image} fat 0 1\\\\;" \ "${devicetree_image} fat 0 1\\\\;" \ "${ramdisk_image} fat 0 1\0" \ @@ -227,9 +227,9 @@ "env run importbootenv; " \ "fi; " \ "fi; \0" \ - "sd_loadbootenv=set bootenv_dev mmc && " \ + "sd_loadbootenv=setenv bootenv_dev mmc && " \ "run setbootenv \0" \ - "usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv \0" \ + "usb_loadbootenv=setenv bootenv_dev usb && usb start && run setbootenv \0" \ "preboot=if test $modeboot = sdboot; then " \ "run sd_loadbootenv; " \ "echo Checking if uenvcmd is set ...; " \ From c7490907d17b2b7abb2ff5fc787cf537db9f7640 Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Sat, 23 Mar 2019 15:00:06 +0530 Subject: [PATCH 14/20] arm64: zynqmp: Add idcode for new RFSoC silicon ZU39DR This patch adds "zu39dr" to the list of zynqmp devices The zu39DR is the new RFSoC silicon with id value of 0x66. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- board/xilinx/zynqmp/zynqmp.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 1e9e441758..5189925beb 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -170,6 +170,10 @@ static const struct { .id = 0x62, .name = "29dr", }, + { + .id = 0x66, + .name = "39dr", + }, }; #endif From 31f7ce7f9bfd41c996b33f7568718462bbfe5b45 Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Sat, 23 Mar 2019 16:01:36 +0530 Subject: [PATCH 15/20] arm: zynq: Add an info message about post config Post configuration cant be run at u-boot as u-boot didn't has any info about the design.So,this patch adds an info message that post config was not run and needs to be run manually if needed. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- drivers/fpga/zynqpl.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c index 683cf14b47..069c63ba45 100644 --- a/drivers/fpga/zynqpl.c +++ b/drivers/fpga/zynqpl.c @@ -408,6 +408,8 @@ static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize, if (bstype != BIT_PARTIAL) zynq_slcr_devcfg_enable(); + puts("INFO:post config was not run, please run manually if needed\n"); + return FPGA_SUCCESS; } From c8c5e2b84d5d928472b68a51854b727ee90295b2 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Sat, 23 Mar 2019 11:13:00 +0530 Subject: [PATCH 16/20] Makefile: Prioritize external dtb if defined Prioritize external dtb if its passed via EXT_DTB than the dtb that was built in the tree. With this patch it appends the specified external dtb to the u-boot image. Signed-off-by: Michal Simek Signed-off-by: Siva Durga Prasad Paladugu Reviewed-by: Simon Glass --- Makefile | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Makefile b/Makefile index 2824a6e159..66a09ac900 100644 --- a/Makefile +++ b/Makefile @@ -1052,8 +1052,13 @@ MKIMAGEFLAGS_fit-dtb.blob = -f auto -A $(ARCH) -T firmware -C none -O u-boot \ -a 0 -e 0 -E \ $(patsubst %,-b arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) -d /dev/null +ifneq ($(EXT_DTB),) +u-boot-fit-dtb.bin: u-boot-nodtb.bin $(EXT_DTB) + $(call if_changed,cat) +else u-boot-fit-dtb.bin: u-boot-nodtb.bin $(FINAL_DTB_CONTAINER) $(call if_changed,cat) +endif u-boot.bin: u-boot-fit-dtb.bin FORCE $(call if_changed,copy) From 51c019ff8cb530b96fca037dd5728cce255cb6e5 Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Wed, 27 Mar 2019 17:39:59 +0530 Subject: [PATCH 17/20] net: zynq_gem: Modify phy supported features after max-speed was set The phydev supported features were reset in phy_set_supported() so, move the setting of driver supported features after this so that it wont lost in phy_set_supported(). Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- drivers/net/zynq_gem.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 3bd0093b7a..94a04fe750 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -359,14 +359,15 @@ static int zynq_phy_init(struct udevice *dev) if (!priv->phydev) return -ENODEV; - priv->phydev->supported &= supported | ADVERTISED_Pause | - ADVERTISED_Asym_Pause; if (priv->max_speed) { ret = phy_set_supported(priv->phydev, priv->max_speed); if (ret) return ret; } + priv->phydev->supported &= supported | ADVERTISED_Pause | + ADVERTISED_Asym_Pause; + priv->phydev->advertising = priv->phydev->supported; priv->phydev->node = priv->phy_of_node; From c19d4c72aa7026c82c1b1a310c3bb26e1e7a8f1d Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 29 Mar 2019 09:25:09 +0100 Subject: [PATCH 18/20] net: gem: Remove phy autodetection code There is no reason to detect phy when core is doing it for us. Signed-off-by: Michal Simek --- drivers/net/zynq_gem.c | 48 ------------------------------------------ 1 file changed, 48 deletions(-) diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 94a04fe750..033efb8195 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -261,45 +261,6 @@ static int phywrite(struct zynq_gem_priv *priv, u32 phy_addr, ZYNQ_GEM_PHYMNTNC_OP_W_MASK, &data); } -static int phy_detection(struct udevice *dev) -{ - int i; - u16 phyreg = 0; - struct zynq_gem_priv *priv = dev->priv; - - if (priv->phyaddr != -1) { - phyread(priv, priv->phyaddr, PHY_DETECT_REG, &phyreg); - if ((phyreg != 0xFFFF) && - ((phyreg & PHY_DETECT_MASK) == PHY_DETECT_MASK)) { - /* Found a valid PHY address */ - debug("Default phy address %d is valid\n", - priv->phyaddr); - return 0; - } else { - debug("PHY address is not setup correctly %d\n", - priv->phyaddr); - priv->phyaddr = -1; - } - } - - debug("detecting phy address\n"); - if (priv->phyaddr == -1) { - /* detect the PHY address */ - for (i = 31; i >= 0; i--) { - phyread(priv, i, PHY_DETECT_REG, &phyreg); - if ((phyreg != 0xFFFF) && - ((phyreg & PHY_DETECT_MASK) == PHY_DETECT_MASK)) { - /* Found a valid PHY address */ - priv->phyaddr = i; - debug("Found valid phy address, %d\n", i); - return 0; - } - } - } - printf("PHY is not detected\n"); - return -1; -} - static int zynq_gem_setup_mac(struct udevice *dev) { u32 i, macaddrlow, macaddrhigh; @@ -345,15 +306,6 @@ static int zynq_phy_init(struct udevice *dev) /* Enable only MDIO bus */ writel(ZYNQ_GEM_NWCTRL_MDEN_MASK, ®s->nwctrl); - if ((priv->interface != PHY_INTERFACE_MODE_SGMII) && - (priv->interface != PHY_INTERFACE_MODE_GMII)) { - ret = phy_detection(dev); - if (ret) { - printf("GEM PHY init failed\n"); - return ret; - } - } - priv->phydev = phy_connect(priv->bus, priv->phyaddr, dev, priv->interface); if (!priv->phydev) From cc9f55e241c3d50ffcdb076abbf5a7a47e96c4fb Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 25 Feb 2019 10:01:22 +0100 Subject: [PATCH 19/20] arm64: zynqmp: Remove eeprom setting By moving to DM_I2C there is no need to specify any eeprom configuration because it is read from DT. Reported-by: Sreeja Vadakattu Signed-off-by: Michal Simek --- include/configs/xilinx_zynqmp.h | 9 --------- 1 file changed, 9 deletions(-) diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 27a8e4d490..91ae7088a5 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -108,15 +108,6 @@ # define PHY_ANEG_TIMEOUT 20000 #endif -/* EEPROM */ -#ifdef CONFIG_ZYNQMP_EEPROM -# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 -# define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 -# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 -# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 -# define CONFIG_SYS_EEPROM_SIZE (64 * 1024) -#endif - #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) #define CONFIG_CLOCKS From 350cfe79a8fb288e9066d5668af7c5ab6857edea Mon Sep 17 00:00:00 2001 From: Luca Ceresoli Date: Mon, 15 Apr 2019 16:18:18 +0200 Subject: [PATCH 20/20] arm64: zynqmp: fix preprocessor check for SPL_ZYNQMP_TWO_SDHCI A missing CONFIG_ prefix while checking for this Kconfig variable makes the check always fail. Fix it. While there also switch from the '#if defined' form to the '#ifdef' form as the other checks in this function. Fixes: 35e2b92344b1 ("arm64: zynqmp: Fix logic around CONFIG_ZYNQ_SDHCI") Signed-off-by: Luca Ceresoli Signed-off-by: Michal Simek --- arch/arm/mach-zynqmp/spl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-zynqmp/spl.c b/arch/arm/mach-zynqmp/spl.c index f95a264230..b52ac17853 100644 --- a/arch/arm/mach-zynqmp/spl.c +++ b/arch/arm/mach-zynqmp/spl.c @@ -86,7 +86,7 @@ u32 spl_boot_device(void) case SD_MODE1: case SD1_LSHFT_MODE: /* not working on silicon v1 */ /* if both controllers enabled, then these two are the second controller */ -#if defined(SPL_ZYNQMP_TWO_SDHCI) +#ifdef CONFIG_SPL_ZYNQMP_TWO_SDHCI return BOOT_DEVICE_MMC2; /* else, fall through, the one SDHCI controller that is enabled is number 1 */ #endif