mirror of
https://github.com/AsahiLinux/u-boot
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arm: at91: wdt: Convert watchdog driver to dm/dt
Convert the Watchdog driver for AT91SAM9x processors to support the driver model and device tree. Changes "CONFIG_AT91SAM9_WATCHDOG" to new "CONFIG_WDT_AT91" Kconfig option. Signed-off-by: Prasanthi Chellakumar <prasanthi.chellakumar@microchip.com>
This commit is contained in:
parent
eb13dddd2c
commit
1473f6ac88
19 changed files with 114 additions and 51 deletions
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@ -89,6 +89,7 @@
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};
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};
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watchdog@fffffd40 {
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watchdog@fffffd40 {
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timeout-sec = <15>;
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status = "okay";
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status = "okay";
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};
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};
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@ -98,6 +98,7 @@
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};
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};
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watchdog@fffffd40 {
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watchdog@fffffd40 {
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timeout-sec = <15>;
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status = "okay";
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status = "okay";
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};
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};
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@ -4,7 +4,7 @@
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*
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*
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* Copyright (C) 2008 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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* Copyright (C) 2008 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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* Copyright (C) 2007 Andrew Victor
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* Copyright (C) 2007 Andrew Victor
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* Copyright (C) 2007 Atmel Corporation.
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* Copyright (C) 2018 Microchip Technology Inc.
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*
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*
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* Watchdog Timer (WDT) - System peripherals regsters.
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* Watchdog Timer (WDT) - System peripherals regsters.
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* Based on AT91SAM9261 datasheet revision D.
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* Based on AT91SAM9261 datasheet revision D.
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@ -27,9 +27,13 @@ typedef struct at91_wdt {
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#endif
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#endif
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/* Watchdog Control Register */
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#define AT91_WDT_CR 0x00
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#define AT91_WDT_CR_WDRSTT 1
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#define AT91_WDT_CR_WDRSTT 1
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#define AT91_WDT_CR_KEY 0xa5000000 /* KEY Password */
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#define AT91_WDT_CR_KEY 0xa5000000 /* KEY Password */
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/* Watchdog Mode Register*/
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#define AT91_WDT_MR 0X04
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#define AT91_WDT_MR_WDV(x) (x & 0xfff)
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#define AT91_WDT_MR_WDV(x) (x & 0xfff)
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#define AT91_WDT_MR_WDFIEN 0x00001000
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#define AT91_WDT_MR_WDFIEN 0x00001000
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#define AT91_WDT_MR_WDRSTEN 0x00002000
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#define AT91_WDT_MR_WDRSTEN 0x00002000
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@ -11,7 +11,7 @@
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#include <asm/arch/clk.h>
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#include <asm/arch/clk.h>
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#include <spl.h>
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#include <spl.h>
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#if !defined(CONFIG_AT91SAM9_WATCHDOG)
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#if !defined(CONFIG_WDT_AT91)
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void at91_disable_wdt(void)
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void at91_disable_wdt(void)
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{
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{
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struct at91_wdt *wdt = (struct at91_wdt *)ATMEL_BASE_WDT;
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struct at91_wdt *wdt = (struct at91_wdt *)ATMEL_BASE_WDT;
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@ -76,7 +76,7 @@ void __weak spl_board_init(void)
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void board_init_f(ulong dummy)
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void board_init_f(ulong dummy)
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{
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{
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lowlevel_clock_init();
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lowlevel_clock_init();
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#if !defined(CONFIG_AT91SAM9_WATCHDOG)
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#if !defined(CONFIG_WDT_AT91)
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at91_disable_wdt();
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at91_disable_wdt();
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#endif
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#endif
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@ -98,7 +98,7 @@ void board_init_f(ulong dummy)
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configure_2nd_sram_as_l2_cache();
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configure_2nd_sram_as_l2_cache();
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#endif
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#endif
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#if !defined(CONFIG_AT91SAM9_WATCHDOG)
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#if !defined(CONFIG_WDT_AT91)
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/* disable watchdog */
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/* disable watchdog */
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at91_disable_wdt();
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at91_disable_wdt();
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#endif
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#endif
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@ -91,7 +91,7 @@ static int init_func_watchdog_init(void)
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{
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{
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# if defined(CONFIG_HW_WATCHDOG) && \
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# if defined(CONFIG_HW_WATCHDOG) && \
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(defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
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(defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
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defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
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defined(CONFIG_SH) || \
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defined(CONFIG_DESIGNWARE_WATCHDOG) || \
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defined(CONFIG_DESIGNWARE_WATCHDOG) || \
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defined(CONFIG_IMX_WATCHDOG))
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defined(CONFIG_IMX_WATCHDOG))
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hw_watchdog_init();
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hw_watchdog_init();
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@ -40,3 +40,7 @@ CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_STORAGE=y
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CONFIG_USB_STORAGE=y
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CONFIG_LCD=y
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CONFIG_LCD=y
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CONFIG_OF_LIBFDT=y
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CONFIG_OF_LIBFDT=y
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CONFIG_DM=y
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CONFIG_SPL_DM=y
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CONFIG_WDT=y
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CONFIG_WDT_AT91=y
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@ -59,3 +59,6 @@ CONFIG_USB_ETHER_ASIX=y
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CONFIG_USB_ETHER_MCS7830=y
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CONFIG_USB_ETHER_MCS7830=y
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CONFIG_SPL_TINY_MEMSET=y
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CONFIG_SPL_TINY_MEMSET=y
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# CONFIG_EFI_LOADER is not set
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# CONFIG_EFI_LOADER is not set
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CONFIG_WDT=y
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CONFIG_WDT_AT91=y
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CONFIG_AT91_HW_WDT_TIMEOUT=y
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@ -61,3 +61,6 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0908
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CONFIG_USB_GADGET_PRODUCT_NUM=0x02d2
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CONFIG_USB_GADGET_PRODUCT_NUM=0x02d2
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CONFIG_USB_GADGET_DOWNLOAD=y
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CONFIG_USB_GADGET_DOWNLOAD=y
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CONFIG_USE_TINY_PRINTF=y
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CONFIG_USE_TINY_PRINTF=y
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CONFIG_WDT=y
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CONFIG_WDT_AT91=y
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CONFIG_AT91_HW_WDT_TIMEOUT=y
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@ -171,4 +171,4 @@ III. Watchdog support
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your code (make sure not to disable it in AT91Bootstrap for instance).
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your code (make sure not to disable it in AT91Bootstrap for instance).
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In the U-Boot configuration, the AT91 watchdog support is enabled using
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In the U-Boot configuration, the AT91 watchdog support is enabled using
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the CONFIG_AT91SAM9_WATCHDOG and CONFIG_HW_WATCHDOG options.
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the CONFIG_WDT and CONFIG_WDT_AT91 options.
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@ -14,7 +14,7 @@ CONFIG_WATCHDOG_TIMEOUT_MSECS
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If not given, will default to maximum timeout. This would
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If not given, will default to maximum timeout. This would
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be 128000 msec for i.mx31/35/5x/6x.
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be 128000 msec for i.mx31/35/5x/6x.
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CONFIG_AT91SAM9_WATCHDOG
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CONFIG_WDT_AT91
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Available for AT91SAM9 to service the watchdog.
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Available for AT91SAM9 to service the watchdog.
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CONFIG_FTWDT010_WATCHDOG
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CONFIG_FTWDT010_WATCHDOG
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@ -118,4 +118,14 @@ config IMX_WATCHDOG
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Select this to enable the IMX and LSCH2 of Layerscape watchdog
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Select this to enable the IMX and LSCH2 of Layerscape watchdog
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driver.
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driver.
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config WDT_AT91
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bool "AT91 watchdog timer support"
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depends on WDT
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help
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Select this to enable Microchip watchdog timer, which can be found on
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some AT91 devices.
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config AT91_HW_WDT_TIMEOUT
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bool "AT91 watchdog timeout specified"
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depends on WDT_AT91
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endmenu
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endmenu
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@ -3,7 +3,7 @@
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# (C) Copyright 2008
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# (C) Copyright 2008
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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obj-$(CONFIG_AT91SAM9_WATCHDOG) += at91sam9_wdt.o
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obj-$(CONFIG_WDT_AT91) += at91sam9_wdt.o
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obj-$(CONFIG_FTWDT010_WATCHDOG) += ftwdt010_wdt.o
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obj-$(CONFIG_FTWDT010_WATCHDOG) += ftwdt010_wdt.o
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ifneq (,$(filter $(SOC), mx25 mx31 mx35 mx5 mx6 mx7 vf610))
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ifneq (,$(filter $(SOC), mx25 mx31 mx35 mx5 mx6 mx7 vf610))
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obj-y += imx_watchdog.o
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obj-y += imx_watchdog.o
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@ -2,7 +2,7 @@
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/*
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/*
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* [origin: Linux kernel drivers/watchdog/at91sam9_wdt.c]
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* [origin: Linux kernel drivers/watchdog/at91sam9_wdt.c]
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*
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*
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* Watchdog driver for Atmel AT91SAM9x processors.
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* Watchdog driver for AT91SAM9x processors.
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*
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*
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* Copyright (C) 2008 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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* Copyright (C) 2008 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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* Copyright (C) 2008 Renaud CERRATO r.cerrato@til-technologies.fr
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* Copyright (C) 2008 Renaud CERRATO r.cerrato@til-technologies.fr
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* write to this register. Inform Linux to it too
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* write to this register. Inform Linux to it too
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*/
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*/
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#include <common.h>
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#include <watchdog.h>
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#include <asm/arch/hardware.h>
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#include <asm/io.h>
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#include <asm/io.h>
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#include <asm/arch/at91_wdt.h>
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#include <asm/arch/at91_wdt.h>
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <wdt.h>
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DECLARE_GLOBAL_DATA_PTR;
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/*
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/*
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* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
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* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
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* use this to convert a watchdog
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* use this to convert a watchdog
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* value from/to milliseconds.
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* value from seconds.
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*/
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*/
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#define ms_to_ticks(t) (((t << 8) / 1000) - 1)
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#define WDT_SEC2TICKS(s) (((s) << 8) - 1)
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#define ticks_to_ms(t) (((t + 1) * 1000) >> 8)
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/* Hardware timeout in seconds */
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/* Hardware timeout in seconds */
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#if !defined(CONFIG_AT91_HW_WDT_TIMEOUT)
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#define WDT_MAX_TIMEOUT 16
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#define WDT_HW_TIMEOUT 2
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#define WDT_MIN_TIMEOUT 0
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#else
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#define WDT_DEFAULT_TIMEOUT 2
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#define WDT_HW_TIMEOUT CONFIG_AT91_HW_WDT_TIMEOUT
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#endif
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struct at91_wdt_priv {
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void __iomem *regs;
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u32 regval;
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u32 timeout;
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};
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/*
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/*
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* Set the watchdog time interval in 1/256Hz (write-once)
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* Set the watchdog time interval in 1/256Hz (write-once)
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* Counter is 12 bit.
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* Counter is 12 bit.
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*/
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*/
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static int at91_wdt_settimeout(unsigned int timeout)
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static int at91_wdt_start(struct udevice *dev, u64 timeout_s, ulong flags)
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{
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{
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unsigned int reg;
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struct at91_wdt_priv *priv = dev_get_priv(dev);
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at91_wdt_t *wd = (at91_wdt_t *) ATMEL_BASE_WDT;
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u32 timeout = WDT_SEC2TICKS(timeout_s);
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if (timeout_s > WDT_MAX_TIMEOUT || timeout_s < WDT_MIN_TIMEOUT)
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timeout = priv->timeout;
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/* Check if disabled */
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/* Check if disabled */
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if (readl(&wd->mr) & AT91_WDT_MR_WDDIS) {
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if (readl(priv->regs + AT91_WDT_MR) & AT91_WDT_MR_WDDIS) {
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printf("sorry, watchdog is disabled\n");
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printf("sorry, watchdog is disabled\n");
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return -1;
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return -1;
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}
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}
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* 4096 / 256 = 16 seconds.
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* 4096 / 256 = 16 seconds.
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*/
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*/
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reg = AT91_WDT_MR_WDRSTEN /* causes watchdog reset */
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priv->regval = AT91_WDT_MR_WDRSTEN /* causes watchdog reset */
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| AT91_WDT_MR_WDDBGHLT /* disabled in debug mode */
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| AT91_WDT_MR_WDDBGHLT /* disabled in debug mode */
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| AT91_WDT_MR_WDD(0xfff) /* restart at any time */
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| AT91_WDT_MR_WDD(0xfff) /* restart at any time */
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| AT91_WDT_MR_WDV(timeout); /* timer value */
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| AT91_WDT_MR_WDV(timeout); /* timer value */
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writel(reg, &wd->mr);
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writel(priv->regval, priv->regs + AT91_WDT_MR);
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return 0;
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return 0;
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}
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}
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void hw_watchdog_reset(void)
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static int at91_wdt_stop(struct udevice *dev)
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{
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{
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at91_wdt_t *wd = (at91_wdt_t *) ATMEL_BASE_WDT;
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struct at91_wdt_priv *priv = dev_get_priv(dev);
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writel(AT91_WDT_CR_WDRSTT | AT91_WDT_CR_KEY, &wd->cr);
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/* Disable Watchdog Timer */
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priv->regval |= AT91_WDT_MR_WDDIS;
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writel(priv->regval, priv->regs + AT91_WDT_MR);
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return 0;
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}
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}
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void hw_watchdog_init(void)
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static int at91_wdt_reset(struct udevice *dev)
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{
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{
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/* 16 seconds timer, resets enabled */
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struct at91_wdt_priv *priv = dev_get_priv(dev);
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at91_wdt_settimeout(ms_to_ticks(WDT_HW_TIMEOUT * 1000));
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writel(AT91_WDT_CR_WDRSTT | AT91_WDT_CR_KEY, priv->regs + AT91_WDT_CR);
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return 0;
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}
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}
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static const struct wdt_ops at91_wdt_ops = {
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.start = at91_wdt_start,
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.stop = at91_wdt_stop,
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.reset = at91_wdt_reset,
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};
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static const struct udevice_id at91_wdt_ids[] = {
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{ .compatible = "atmel,at91sam9260-wdt" },
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{}
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};
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static int at91_wdt_probe(struct udevice *dev)
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{
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struct at91_wdt_priv *priv = dev_get_priv(dev);
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priv->regs = dev_remap_addr(dev);
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if (!priv->regs)
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return -EINVAL;
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#ifdef CONFIG_AT91_HW_WDT_TIMEOUT
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priv->timeout = dev_read_u32_default(dev, "timeout-sec",
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WDT_DEFAULT_TIMEOUT);
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debug("%s: timeout %d", __func__, priv->timeout);
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#endif
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debug("%s: Probing wdt%u\n", __func__, dev->seq);
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return 0;
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}
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U_BOOT_DRIVER(at91_wdt) = {
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.name = "at91_wdt",
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.id = UCLASS_WDT,
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.of_match = at91_wdt_ids,
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.priv_auto_alloc_size = sizeof(struct at91_wdt_priv),
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.ops = &at91_wdt_ops,
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.probe = at91_wdt_probe,
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};
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@ -57,10 +57,6 @@
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*/
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTFILESIZE
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/* Enable the watchdog */
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#define CONFIG_AT91SAM9_WATCHDOG
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#define CONFIG_HW_WATCHDOG
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/*
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/*
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* Command line configuration.
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* Command line configuration.
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*/
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*/
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@ -112,13 +112,6 @@
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"root=/dev/nfs ip=dhcp nfsroot=${serverip}:/srv/nfs/rootfs; " \
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"root=/dev/nfs ip=dhcp nfsroot=${serverip}:/srv/nfs/rootfs; " \
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"dhcp"
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"dhcp"
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/* Enable the watchdog */
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#define CONFIG_AT91SAM9_WATCHDOG
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#if !defined(CONFIG_SPL_BUILD)
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#define CONFIG_HW_WATCHDOG
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#endif
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#define CONFIG_AT91_HW_WDT_TIMEOUT 15
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#if !defined(CONFIG_SPL_BUILD)
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#if !defined(CONFIG_SPL_BUILD)
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/* USB configuration */
|
/* USB configuration */
|
||||||
#define CONFIG_USB_ATMEL
|
#define CONFIG_USB_ATMEL
|
||||||
|
|
|
@ -85,13 +85,6 @@
|
||||||
#define CONFIG_RMII
|
#define CONFIG_RMII
|
||||||
#define CONFIG_AT91_WANTS_COMMON_PHY
|
#define CONFIG_AT91_WANTS_COMMON_PHY
|
||||||
|
|
||||||
#define CONFIG_AT91SAM9_WATCHDOG
|
|
||||||
#define CONFIG_AT91_HW_WDT_TIMEOUT 15
|
|
||||||
#if !defined(CONFIG_SPL_BUILD)
|
|
||||||
/* Enable the watchdog */
|
|
||||||
#define CONFIG_HW_WATCHDOG
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* USB */
|
/* USB */
|
||||||
#if defined(CONFIG_BOARD_TAURUS)
|
#if defined(CONFIG_BOARD_TAURUS)
|
||||||
#define CONFIG_USB_ATMEL
|
#define CONFIG_USB_ATMEL
|
||||||
|
|
|
@ -82,7 +82,6 @@ CONFIG_AT91SAM9G20EK_2MMC
|
||||||
CONFIG_AT91SAM9G45EKES
|
CONFIG_AT91SAM9G45EKES
|
||||||
CONFIG_AT91SAM9G45_LCD_BASE
|
CONFIG_AT91SAM9G45_LCD_BASE
|
||||||
CONFIG_AT91SAM9M10G45EK
|
CONFIG_AT91SAM9M10G45EK
|
||||||
CONFIG_AT91SAM9_WATCHDOG
|
|
||||||
CONFIG_AT91_CAN
|
CONFIG_AT91_CAN
|
||||||
CONFIG_AT91_EFLASH
|
CONFIG_AT91_EFLASH
|
||||||
CONFIG_AT91_GPIO_PULLUP
|
CONFIG_AT91_GPIO_PULLUP
|
||||||
|
|
Loading…
Reference in a new issue