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x86: bios: Allow pci config read/write to host bridge in int1a_handler

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We should allow pci config read/write to host bridge (b.d.f = 0.0.0)
in the int1a_handler() which is a valid pci device.

Signed-off-by: Jian Luo <jian.luo4@boschrexroth.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Jian Luo 2015-07-06 16:31:28 +08:00 committed by Simon Glass
parent 7b5c349890
commit 1441d81a79
1 changed files with 1 additions and 9 deletions
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10
arch/x86/lib/bios_interrupts.c
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@ -161,15 +161,7 @@ int int1a_handler(void)
bus = M.x86.R_EBX >> 8; bus = M.x86.R_EBX >> 8;
reg = M.x86.R_EDI; reg = M.x86.R_EDI;
dev = PCI_BDF(bus, devfn >> 3, devfn & 7); dev = PCI_BDF(bus, devfn >> 3, devfn & 7);
if (!dev) {
debug("0x%x: BAD DEVICE bus %d devfn 0x%x\n", func,
bus, devfn);
/* Or are we supposed to return PCIBIOS_NODEV? */
M.x86.R_EAX &= 0xffff00ff; /* Clear AH */
M.x86.R_EAX |= PCIBIOS_BADREG;
retval = 0;
return retval;
}
switch (func) { switch (func) {
case 0xb108: /* Read Config Byte */ case 0xb108: /* Read Config Byte */
byte = x86_pci_read_config8(dev, reg); byte = x86_pci_read_config8(dev, reg);