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atmel_usart: change register access to C structure

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This patch introduces C structure definition for register footprint of atmel's
 usart.

Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
This commit is contained in:
Andreas Bießmann 2010-09-03 10:28:05 +02:00 committed by Reinhard Meyer
parent b944ad22b4
commit 125637c572
2 changed files with 46 additions and 46 deletions
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36
drivers/serial/atmel_usart.c
View file

@ -1,6 +1,9 @@
/*
* Copyright (C) 2004-2006 Atmel Corporation
*
* Modified to support C structur SoC access by
* Andreas Bießmann <biessmann@corscience.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
@ -16,10 +19,6 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <common.h>
#ifndef CONFIG_AT91_LEGACY
#define CONFIG_AT91_LEGACY
#warning Please update to use C structur SoC access !
#endif
#include <watchdog.h>
#include <asm/io.h>
@ -46,6 +45,7 @@ DECLARE_GLOBAL_DATA_PTR;
void serial_setbrg(void)
{
atmel_usart3_t *usart = (atmel_usart3_t*)USART_BASE;
unsigned long divisor;
unsigned long usart_hz;
@ -56,32 +56,37 @@ void serial_setbrg(void)
*/
usart_hz = get_usart_clk_rate(USART_ID);
divisor = (usart_hz / 16 + gd->baudrate / 2) / gd->baudrate;
usart3_writel(BRGR, USART3_BF(CD, divisor));
writel(USART3_BF(CD, divisor), &usart->brgr);
}
int serial_init(void)
{
usart3_writel(CR, USART3_BIT(RSTRX) | USART3_BIT(RSTTX));
atmel_usart3_t *usart = (atmel_usart3_t*)USART_BASE;
writel(USART3_BIT(RSTRX) | USART3_BIT(RSTTX), &usart->cr);
serial_setbrg();
usart3_writel(CR, USART3_BIT(RXEN) | USART3_BIT(TXEN));
usart3_writel(MR, (USART3_BF(USART_MODE, USART3_USART_MODE_NORMAL)
writel(USART3_BIT(RXEN) | USART3_BIT(TXEN), &usart->cr);
writel((USART3_BF(USART_MODE, USART3_USART_MODE_NORMAL)
| USART3_BF(USCLKS, USART3_USCLKS_MCK)
| USART3_BF(CHRL, USART3_CHRL_8)
| USART3_BF(PAR, USART3_PAR_NONE)
| USART3_BF(NBSTOP, USART3_NBSTOP_1)));
| USART3_BF(NBSTOP, USART3_NBSTOP_1)),
&usart->mr);
return 0;
}
void serial_putc(char c)
{
atmel_usart3_t *usart = (atmel_usart3_t*)USART_BASE;
if (c == '\n')
serial_putc('\r');
while (!(usart3_readl(CSR) & USART3_BIT(TXRDY))) ;
usart3_writel(THR, c);
while (!(readl(&usart->csr) & USART3_BIT(TXRDY)));
writel(c, &usart->thr);
}
void serial_puts(const char *s)
@ -92,12 +97,15 @@ void serial_puts(const char *s)
int serial_getc(void)
{
while (!(usart3_readl(CSR) & USART3_BIT(RXRDY)))
atmel_usart3_t *usart = (atmel_usart3_t*)USART_BASE;
while (!(readl(&usart->csr) & USART3_BIT(RXRDY)))
WATCHDOG_RESET();
return usart3_readl(RHR);
return readl(&usart->rhr);
}
int serial_tstc(void)
{
return (usart3_readl(CSR) & USART3_BIT(RXRDY)) != 0;
atmel_usart3_t *usart = (atmel_usart3_t*)USART_BASE;
return (readl(&usart->csr) & USART3_BIT(RXRDY)) != 0;
}

56
drivers/serial/atmel_usart.h
View file

@ -3,6 +3,9 @@
*
* Copyright (C) 2005-2006 Atmel Corporation
*
* Modified to support C structure SoC access by
* Andreas Bießmann <biessmann@corscience.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
@ -20,32 +23,27 @@
#ifndef __DRIVERS_ATMEL_USART_H__
#define __DRIVERS_ATMEL_USART_H__
/* USART3 register offsets */
#define USART3_CR 0x0000
#define USART3_MR 0x0004
#define USART3_IER 0x0008
#define USART3_IDR 0x000c
#define USART3_IMR 0x0010
#define USART3_CSR 0x0014
#define USART3_RHR 0x0018
#define USART3_THR 0x001c
#define USART3_BRGR 0x0020
#define USART3_RTOR 0x0024
#define USART3_TTGR 0x0028
#define USART3_FIDI 0x0040
#define USART3_NER 0x0044
#define USART3_XXR 0x0048
#define USART3_IFR 0x004c
#define USART3_RPR 0x0100
#define USART3_RCR 0x0104
#define USART3_TPR 0x0108
#define USART3_TCR 0x010c
#define USART3_RNPR 0x0110
#define USART3_RNCR 0x0114
#define USART3_TNPR 0x0118
#define USART3_TNCR 0x011c
#define USART3_PTCR 0x0120
#define USART3_PTSR 0x0124
/* USART3 register footprint */
typedef struct atmel_usart3 {
u32 cr;
u32 mr;
u32 ier;
u32 idr;
u32 imr;
u32 csr;
u32 rhr;
u32 thr;
u32 brgr;
u32 rtor;
u32 ttgr;
u32 reserved0[5];
u32 fidi;
u32 ner;
u32 reserved1;
u32 ifr;
u32 man;
u32 reserved2[54]; // version and PDC not needed
} atmel_usart3_t;
/* Bitfields in CR */
#define USART3_RSTRX_OFFSET 2
@ -305,10 +303,4 @@
<< USART3_##name##_OFFSET)) \
| USART3_BF(name,value))
/* Register access macros */
#define usart3_readl(reg) \
readl((void *)USART_BASE + USART3_##reg)
#define usart3_writel(reg,value) \
writel((value), (void *)USART_BASE + USART3_##reg)
#endif /* __DRIVERS_ATMEL_USART_H__ */