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ppc4xx: Move 405EP pci code from cpu_init_f() to __pci_pre_init()

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This patch moves some basic PCI initialisation from the 4xx cpu_init_f()
to cpu/ppc4xx/4xx_pci.c.

The original cpu_init_f() function enabled the 405EP's internal arbiter
in all situations. Also the HCE bit in cpc0_pci is always set.
The first is not really wanted for PCI adapter designs and the latter
is a general bug for PCI adapter U-Boots. Because it enables
PCI configuration by the system CPU even when the PCI configuration has
not been setup by the 405EP. The one and only correct place is
in pci_405gp_init() (see "Set HCE bit" comment).

So for compatibility reasons the arbiter is still enabled in any case,
but from weak pci_pre_init() so that it can be replaced by board specific
code.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Matthias Fuchs 2009-07-08 13:43:55 +02:00 committed by Stefan Roese
parent c71103f9dc
commit 123f102ec0
2 changed files with 14 additions and 5 deletions
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14
cpu/ppc4xx/4xx_pci.c
View file

@ -87,6 +87,20 @@ DECLARE_GLOBAL_DATA_PTR;
*/ */
int __pci_pre_init(struct pci_controller *hose) int __pci_pre_init(struct pci_controller *hose)
{ {
#if defined (CONFIG_405EP)
/*
* Enable the internal PCI arbiter by default.
*
* On 405EP CPUs the internal arbiter can be controlled
* by the I2C strapping EEPROM. If you want to do so
* or if you want to disable the arbiter pci_pre_init()
* must be reimplemented without enabling the arbiter.
* The arbiter is enabled in this place because of
* compatibility reasons.
*/
mtdcr(cpc0_pci, mfdcr(cpc0_pci) | CPC0_PCI_ARBIT_EN);
#endif /* CONFIG_405EP */
return 1; return 1;
} }
int pci_pre_init(struct pci_controller *hose) __attribute__((weak, alias("__pci_pre_init"))); int pci_pre_init(struct pci_controller *hose) __attribute__((weak, alias("__pci_pre_init")));

5
cpu/ppc4xx/cpu_init.c
View file

@ -174,11 +174,6 @@ cpu_init_f (void)
* Set EMAC noise filter bits * Set EMAC noise filter bits
*/ */
mtdcr(cpc0_epctl, CPC0_EPRCSR_E0NFE | CPC0_EPRCSR_E1NFE); mtdcr(cpc0_epctl, CPC0_EPRCSR_E0NFE | CPC0_EPRCSR_E1NFE);
/*
* Enable the internal PCI arbiter
*/
mtdcr(cpc0_pci, mfdcr(cpc0_pci) | CPC0_PCI_HOST_CFG_EN | CPC0_PCI_ARBIT_EN);
#endif /* CONFIG_405EP */ #endif /* CONFIG_405EP */
#if defined(CONFIG_SYS_4xx_GPIO_TABLE) #if defined(CONFIG_SYS_4xx_GPIO_TABLE)