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Merge branch 'master' of git://git.denx.de/u-boot-usb

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This commit is contained in:
Tom Rini 2015-12-17 21:46:04 -05:00
commit 123b701779
30 changed files with 379 additions and 310 deletions
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6
board/altera/arria5-socdk/socfpga.c
View file

@ -9,7 +9,7 @@
#include <asm/io.h>
#include <usb.h>
#include <usb/s3c_udc.h>
#include <usb/dwc2_udc.h>
#include <usb_mass_storage.h>
#include <micrel.h>
@ -68,14 +68,14 @@ int board_phy_config(struct phy_device *phydev)
#endif
#ifdef CONFIG_USB_GADGET
struct s3c_plat_otg_data socfpga_otg_data = {
struct dwc2_plat_otg_data socfpga_otg_data = {
.regs_otg = CONFIG_USB_DWC2_REG_ADDR,
.usb_gusbcfg = 0x1417,
};
int board_usb_init(int index, enum usb_init_type init)
{
return s3c_udc_probe(&socfpga_otg_data);
return dwc2_udc_probe(&socfpga_otg_data);
}
int g_dnl_board_usb_cable_connected(void)

6
board/altera/cyclone5-socdk/socfpga.c
View file

@ -9,7 +9,7 @@
#include <asm/io.h>
#include <usb.h>
#include <usb/s3c_udc.h>
#include <usb/dwc2_udc.h>
#include <usb_mass_storage.h>
#include <micrel.h>
@ -68,14 +68,14 @@ int board_phy_config(struct phy_device *phydev)
#endif
#ifdef CONFIG_USB_GADGET
struct s3c_plat_otg_data socfpga_otg_data = {
struct dwc2_plat_otg_data socfpga_otg_data = {
.regs_otg = CONFIG_USB_DWC2_REG_ADDR,
.usb_gusbcfg = 0x1417,
};
int board_usb_init(int index, enum usb_init_type init)
{
return s3c_udc_probe(&socfpga_otg_data);
return dwc2_udc_probe(&socfpga_otg_data);
}
int g_dnl_board_usb_cable_connected(void)

8
board/broadcom/bcm28155_ap/bcm28155_ap.c
View file

@ -13,7 +13,7 @@
#include <asm/arch/sysmap.h>
#include <usb.h>
#include <usb/s3c_udc.h>
#include <usb/dwc2_udc.h>
#include <g_dnl.h>
#define SECWATCHDOG_SDOGCR_OFFSET 0x00000000
@ -95,14 +95,14 @@ int board_mmc_init(bd_t *bis)
#endif
#ifdef CONFIG_USB_GADGET
static struct s3c_plat_otg_data bcm_otg_data = {
static struct dwc2_plat_otg_data bcm_otg_data = {
.regs_otg = HSOTG_BASE_ADDR
};
int board_usb_init(int index, enum usb_init_type init)
{
debug("%s: performing s3c_udc_probe\n", __func__);
return s3c_udc_probe(&bcm_otg_data);
debug("%s: performing dwc2_udc_probe\n", __func__);
return dwc2_udc_probe(&bcm_otg_data);
}
int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)

6
board/denx/mcvevk/socfpga.c
View file

@ -9,7 +9,7 @@
#include <asm/io.h>
#include <usb.h>
#include <usb/s3c_udc.h>
#include <usb/dwc2_udc.h>
#include <usb_mass_storage.h>
DECLARE_GLOBAL_DATA_PTR;
@ -28,14 +28,14 @@ int board_init(void)
}
#ifdef CONFIG_USB_GADGET
struct s3c_plat_otg_data socfpga_otg_data = {
struct dwc2_plat_otg_data socfpga_otg_data = {
.regs_otg = CONFIG_USB_DWC2_REG_ADDR,
.usb_gusbcfg = 0x1417,
};
int board_usb_init(int index, enum usb_init_type init)
{
return s3c_udc_probe(&socfpga_otg_data);
return dwc2_udc_probe(&socfpga_otg_data);
}
int g_dnl_board_usb_cable_connected(void)

6
board/ebv/socrates/socfpga.c
View file

@ -9,7 +9,7 @@
#include <asm/io.h>
#include <usb.h>
#include <usb/s3c_udc.h>
#include <usb/dwc2_udc.h>
#include <usb_mass_storage.h>
#include <micrel.h>
@ -68,14 +68,14 @@ int board_phy_config(struct phy_device *phydev)
#endif
#ifdef CONFIG_USB_GADGET
struct s3c_plat_otg_data socfpga_otg_data = {
struct dwc2_plat_otg_data socfpga_otg_data = {
.regs_otg = CONFIG_USB_DWC2_REG_ADDR,
.usb_gusbcfg = 0x1417,
};
int board_usb_init(int index, enum usb_init_type init)
{
return s3c_udc_probe(&socfpga_otg_data);
return dwc2_udc_probe(&socfpga_otg_data);
}
int g_dnl_board_usb_cable_connected(void)

6
board/samsung/goni/goni.c
View file

@ -10,7 +10,7 @@
#include <asm/gpio.h>
#include <asm/arch/mmc.h>
#include <power/pmic.h>
#include <usb/s3c_udc.h>
#include <usb/dwc2_udc.h>
#include <asm/arch/cpu.h>
#include <power/max8998_pmic.h>
#include <samsung/misc.h>
@ -183,7 +183,7 @@ static int s5pc1xx_phy_control(int on)
return 0;
}
struct s3c_plat_otg_data s5pc110_otg_data = {
struct dwc2_plat_otg_data s5pc110_otg_data = {
.phy_control = s5pc1xx_phy_control,
.regs_phy = S5PC110_PHY_BASE,
.regs_otg = S5PC110_OTG_BASE,
@ -193,7 +193,7 @@ struct s3c_plat_otg_data s5pc110_otg_data = {
int board_usb_init(int index, enum usb_init_type init)
{
debug("USB_udc_probe\n");
return s3c_udc_probe(&s5pc110_otg_data);
return dwc2_udc_probe(&s5pc110_otg_data);
}
#endif

6
board/samsung/odroid/odroid.c
View file

@ -19,7 +19,7 @@
#include <errno.h>
#include <mmc.h>
#include <usb.h>
#include <usb/s3c_udc.h>
#include <usb/dwc2_udc.h>
#include <samsung/misc.h>
#include "setup.h"
@ -452,7 +452,7 @@ static int s5pc210_phy_control(int on)
return regulator_set_mode(dev, OPMODE_LPM);
}
struct s3c_plat_otg_data s5pc210_otg_data = {
struct dwc2_plat_otg_data s5pc210_otg_data = {
.phy_control = s5pc210_phy_control,
.regs_phy = EXYNOS4X12_USBPHY_BASE,
.regs_otg = EXYNOS4X12_USBOTG_BASE,
@ -510,6 +510,6 @@ int board_usb_init(int index, enum usb_init_type init)
}
#endif
debug("USB_udc_probe\n");
return s3c_udc_probe(&s5pc210_otg_data);
return dwc2_udc_probe(&s5pc210_otg_data);
}
#endif

8
board/samsung/trats/trats.c
View file

@ -18,7 +18,7 @@
#include <asm/arch/watchdog.h>
#include <asm/arch/power.h>
#include <power/pmic.h>
#include <usb/s3c_udc.h>
#include <usb/dwc2_udc.h>
#include <power/max8997_pmic.h>
#include <power/max8997_muic.h>
#include <power/battery.h>
@ -41,7 +41,7 @@ u32 get_board_rev(void)
#endif
static void check_hw_revision(void);
struct s3c_plat_otg_data s5pc210_otg_data;
struct dwc2_plat_otg_data s5pc210_otg_data;
int exynos_init(void)
{
@ -419,7 +419,7 @@ static int s5pc210_phy_control(int on)
return 0;
}
struct s3c_plat_otg_data s5pc210_otg_data = {
struct dwc2_plat_otg_data s5pc210_otg_data = {
.phy_control = s5pc210_phy_control,
.regs_phy = EXYNOS4_USBPHY_BASE,
.regs_otg = EXYNOS4_USBOTG_BASE,
@ -430,7 +430,7 @@ struct s3c_plat_otg_data s5pc210_otg_data = {
int board_usb_init(int index, enum usb_init_type init)
{
debug("USB_udc_probe\n");
return s3c_udc_probe(&s5pc210_otg_data);
return dwc2_udc_probe(&s5pc210_otg_data);
}
int g_dnl_board_usb_cable_connected(void)

6
board/samsung/trats2/trats2.c
View file

@ -21,7 +21,7 @@
#include <libtizen.h>
#include <errno.h>
#include <usb.h>
#include <usb/s3c_udc.h>
#include <usb/dwc2_udc.h>
#include <usb_mass_storage.h>
DECLARE_GLOBAL_DATA_PTR;
@ -303,7 +303,7 @@ static int s5pc210_phy_control(int on)
return 0;
}
struct s3c_plat_otg_data s5pc210_otg_data = {
struct dwc2_plat_otg_data s5pc210_otg_data = {
.phy_control = s5pc210_phy_control,
.regs_phy = EXYNOS4X12_USBPHY_BASE,
.regs_otg = EXYNOS4X12_USBOTG_BASE,
@ -314,7 +314,7 @@ struct s3c_plat_otg_data s5pc210_otg_data = {
int board_usb_init(int index, enum usb_init_type init)
{
debug("USB_udc_probe\n");
return s3c_udc_probe(&s5pc210_otg_data);
return dwc2_udc_probe(&s5pc210_otg_data);
}
int g_dnl_board_usb_cable_connected(void)

6
board/samsung/universal_c210/universal.c
View file

@ -17,7 +17,7 @@
#include <ld9040.h>
#include <power/pmic.h>
#include <usb.h>
#include <usb/s3c_udc.h>
#include <usb/dwc2_udc.h>
#include <asm/arch/cpu.h>
#include <power/max8998_pmic.h>
#include <libtizen.h>
@ -179,7 +179,7 @@ static int s5pc210_phy_control(int on)
return 0;
}
struct s3c_plat_otg_data s5pc210_otg_data = {
struct dwc2_plat_otg_data s5pc210_otg_data = {
.phy_control = s5pc210_phy_control,
.regs_phy = EXYNOS4_USBPHY_BASE,
.regs_otg = EXYNOS4_USBOTG_BASE,
@ -191,7 +191,7 @@ struct s3c_plat_otg_data s5pc210_otg_data = {
int board_usb_init(int index, enum usb_init_type init)
{
debug("USB_udc_probe\n");
return s3c_udc_probe(&s5pc210_otg_data);
return dwc2_udc_probe(&s5pc210_otg_data);
}
int exynos_early_init_f(void)

6
board/terasic/sockit/socfpga.c
View file

@ -9,7 +9,7 @@
#include <asm/io.h>
#include <usb.h>
#include <usb/s3c_udc.h>
#include <usb/dwc2_udc.h>
#include <usb_mass_storage.h>
#include <micrel.h>
@ -68,14 +68,14 @@ int board_phy_config(struct phy_device *phydev)
#endif
#ifdef CONFIG_USB_GADGET
struct s3c_plat_otg_data socfpga_otg_data = {
struct dwc2_plat_otg_data socfpga_otg_data = {
.regs_otg = CONFIG_USB_DWC2_REG_ADDR,
.usb_gusbcfg = 0x1417,
};
int board_usb_init(int index, enum usb_init_type init)
{
return s3c_udc_probe(&socfpga_otg_data);
return dwc2_udc_probe(&socfpga_otg_data);
}
int g_dnl_board_usb_cable_connected(void)

3
common/usb_kbd.c
View file

@ -476,6 +476,9 @@ static int usb_kbd_probe_dev(struct usb_device *dev, unsigned int ifnum)
USB_KBD_BOOT_REPORT_SIZE, data->new,
data->intinterval);
if (!data->intq) {
#elif defined(CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP)
if (usb_get_report(dev, iface->desc.bInterfaceNumber,
1, 0, data->new, USB_KBD_BOOT_REPORT_SIZE) < 0) {
#else
if (usb_submit_int_msg(dev, data->intpipe, data->new, data->intpktsize,
data->intinterval) < 0) {

4
drivers/usb/gadget/Makefile
View file

@ -13,8 +13,8 @@ ifdef CONFIG_USB_GADGET
obj-$(CONFIG_USB_GADGET_AT91) += at91_udc.o
obj-$(CONFIG_USB_GADGET_ATMEL_USBA) += atmel_usba_udc.o
obj-$(CONFIG_USB_GADGET_BCM_UDC_OTG_PHY) += bcm_udc_otg_phy.o
obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG) += s3c_udc_otg.o
obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG_PHY) += s3c_udc_otg_phy.o
obj-$(CONFIG_USB_GADGET_DWC2_OTG) += dwc2_udc_otg.o
obj-$(CONFIG_USB_GADGET_DWC2_OTG_PHY) += dwc2_udc_otg_phy.o
obj-$(CONFIG_USB_GADGET_FOTG210) += fotg210.o
obj-$(CONFIG_CI_UDC) += ci_udc.o
obj-$(CONFIG_USB_GADGET_DOWNLOAD) += g_dnl.o

6
drivers/usb/gadget/bcm_udc_otg_phy.c
View file

@ -9,10 +9,10 @@
#include <asm/io.h>
#include <asm/arch/sysmap.h>
#include <usb/s3c_udc.h>
#include "dwc2_udc_otg_priv.h"
#include "bcm_udc_otg.h"
void otg_phy_init(struct s3c_udc *dev)
void otg_phy_init(struct dwc2_udc *dev)
{
/* set Phy to driving mode */
wfld_clear(HSOTG_CTRL_BASE_ADDR + HSOTG_CTRL_PHY_P1CTL_OFFSET,
@ -37,7 +37,7 @@ void otg_phy_init(struct s3c_udc *dev)
HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK);
}
void otg_phy_off(struct s3c_udc *dev)
void otg_phy_off(struct dwc2_udc *dev)
{
/* Soft Disconnect */
wfld_set(HSOTG_BASE_ADDR + HSOTG_DCTL_OFFSET,

203
drivers/usb/gadget/s3c_udc_otg.c → drivers/usb/gadget/dwc2_udc_otg.c
View file

@ -1,6 +1,6 @@
/*
* drivers/usb/gadget/s3c_udc_otg.c
* Samsung S3C on-chip full/high speed USB OTG 2.0 device controllers
* drivers/usb/gadget/dwc2_udc_otg.c
* Designware DWC2 on-chip full/high speed USB OTG 2.0 device controllers
*
* Copyright (C) 2008 for Samsung Electronics
*
@ -32,7 +32,8 @@
#include <asm/mach-types.h>
#include "regs-otg.h"
#include "dwc2_udc_otg_regs.h"
#include "dwc2_udc_otg_priv.h"
#include <usb/lin_gadget_compat.h>
/***********************************************************/
@ -45,7 +46,7 @@
#define DEBUG_OUT_EP 0
#define DEBUG_IN_EP 0
#include <usb/s3c_udc.h>
#include <usb/dwc2_udc.h>
#define EP0_CON 0
#define EP_MASK 0xF
@ -62,12 +63,12 @@ static char *state_names[] = {
"WAIT_FOR_NULL_COMPLETE",
};
#define DRIVER_DESC "S3C HS USB OTG Device Driver, (c) Samsung Electronics"
#define DRIVER_DESC "DWC2 HS USB OTG Device Driver, (c) Samsung Electronics"
#define DRIVER_VERSION "15 March 2009"
struct s3c_udc *the_controller;
struct dwc2_udc *the_controller;
static const char driver_name[] = "s3c-udc";
static const char driver_name[] = "dwc2-udc";
static const char driver_desc[] = DRIVER_DESC;
static const char ep0name[] = "ep0-control";
@ -83,32 +84,32 @@ static dma_addr_t usb_ctrl_dma_addr;
/*
Local declarations.
*/
static int s3c_ep_enable(struct usb_ep *ep,
static int dwc2_ep_enable(struct usb_ep *ep,
const struct usb_endpoint_descriptor *);
static int s3c_ep_disable(struct usb_ep *ep);
static struct usb_request *s3c_alloc_request(struct usb_ep *ep,
static int dwc2_ep_disable(struct usb_ep *ep);
static struct usb_request *dwc2_alloc_request(struct usb_ep *ep,
gfp_t gfp_flags);
static void s3c_free_request(struct usb_ep *ep, struct usb_request *);
static void dwc2_free_request(struct usb_ep *ep, struct usb_request *);
static int s3c_queue(struct usb_ep *ep, struct usb_request *, gfp_t gfp_flags);
static int s3c_dequeue(struct usb_ep *ep, struct usb_request *);
static int s3c_fifo_status(struct usb_ep *ep);
static void s3c_fifo_flush(struct usb_ep *ep);
static void s3c_ep0_read(struct s3c_udc *dev);
static void s3c_ep0_kick(struct s3c_udc *dev, struct s3c_ep *ep);
static void s3c_handle_ep0(struct s3c_udc *dev);
static int s3c_ep0_write(struct s3c_udc *dev);
static int write_fifo_ep0(struct s3c_ep *ep, struct s3c_request *req);
static void done(struct s3c_ep *ep, struct s3c_request *req, int status);
static void stop_activity(struct s3c_udc *dev,
static int dwc2_queue(struct usb_ep *ep, struct usb_request *, gfp_t gfp_flags);
static int dwc2_dequeue(struct usb_ep *ep, struct usb_request *);
static int dwc2_fifo_status(struct usb_ep *ep);
static void dwc2_fifo_flush(struct usb_ep *ep);
static void dwc2_ep0_read(struct dwc2_udc *dev);
static void dwc2_ep0_kick(struct dwc2_udc *dev, struct dwc2_ep *ep);
static void dwc2_handle_ep0(struct dwc2_udc *dev);
static int dwc2_ep0_write(struct dwc2_udc *dev);
static int write_fifo_ep0(struct dwc2_ep *ep, struct dwc2_request *req);
static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status);
static void stop_activity(struct dwc2_udc *dev,
struct usb_gadget_driver *driver);
static int udc_enable(struct s3c_udc *dev);
static void udc_set_address(struct s3c_udc *dev, unsigned char address);
static void reconfig_usbd(struct s3c_udc *dev);
static void set_max_pktsize(struct s3c_udc *dev, enum usb_device_speed speed);
static void nuke(struct s3c_ep *ep, int status);
static int s3c_udc_set_halt(struct usb_ep *_ep, int value);
static void s3c_udc_set_nak(struct s3c_ep *ep);
static int udc_enable(struct dwc2_udc *dev);
static void udc_set_address(struct dwc2_udc *dev, unsigned char address);
static void reconfig_usbd(struct dwc2_udc *dev);
static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed);
static void nuke(struct dwc2_ep *ep, int status);
static int dwc2_udc_set_halt(struct usb_ep *_ep, int value);
static void dwc2_udc_set_nak(struct dwc2_ep *ep);
void set_udc_gadget_private_data(void *p)
{
@ -123,19 +124,19 @@ void *get_udc_gadget_private_data(struct usb_gadget *gadget)
return gadget->dev.device_data;
}
static struct usb_ep_ops s3c_ep_ops = {
.enable = s3c_ep_enable,
.disable = s3c_ep_disable,
static struct usb_ep_ops dwc2_ep_ops = {
.enable = dwc2_ep_enable,
.disable = dwc2_ep_disable,
.alloc_request = s3c_alloc_request,
.free_request = s3c_free_request,
.alloc_request = dwc2_alloc_request,
.free_request = dwc2_free_request,
.queue = s3c_queue,
.dequeue = s3c_dequeue,
.queue = dwc2_queue,
.dequeue = dwc2_dequeue,
.set_halt = s3c_udc_set_halt,
.fifo_status = s3c_fifo_status,
.fifo_flush = s3c_fifo_flush,
.set_halt = dwc2_udc_set_halt,
.fifo_status = dwc2_fifo_status,
.fifo_flush = dwc2_fifo_flush,
};
#define create_proc_files() do {} while (0)
@ -144,24 +145,24 @@ static struct usb_ep_ops s3c_ep_ops = {
/***********************************************************/
void __iomem *regs_otg;
struct s3c_usbotg_reg *reg;
struct dwc2_usbotg_reg *reg;
bool dfu_usb_get_reset(void)
{
return !!(readl(&reg->gintsts) & INT_RESET);
}
__weak void otg_phy_init(struct s3c_udc *dev) {}
__weak void otg_phy_off(struct s3c_udc *dev) {}
__weak void otg_phy_init(struct dwc2_udc *dev) {}
__weak void otg_phy_off(struct dwc2_udc *dev) {}
/***********************************************************/
#include "s3c_udc_otg_xfer_dma.c"
#include "dwc2_udc_otg_xfer_dma.c"
/*
* udc_disable - disable USB device controller
*/
static void udc_disable(struct s3c_udc *dev)
static void udc_disable(struct dwc2_udc *dev)
{
debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
@ -177,7 +178,7 @@ static void udc_disable(struct s3c_udc *dev)
/*
* udc_reinit - initialize software state
*/
static void udc_reinit(struct s3c_udc *dev)
static void udc_reinit(struct dwc2_udc *dev)
{
unsigned int i;
@ -189,8 +190,8 @@ static void udc_reinit(struct s3c_udc *dev)
dev->ep0state = WAIT_FOR_SETUP;
/* basic endpoint records init */
for (i = 0; i < S3C_MAX_ENDPOINTS; i++) {
struct s3c_ep *ep = &dev->ep[i];
for (i = 0; i < DWC2_MAX_ENDPOINTS; i++) {
struct dwc2_ep *ep = &dev->ep[i];
if (i != 0)
list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
@ -210,7 +211,7 @@ static void udc_reinit(struct s3c_udc *dev)
/* until it's enabled, this UDC should be completely invisible
* to any USB host.
*/
static int udc_enable(struct s3c_udc *dev)
static int udc_enable(struct dwc2_udc *dev)
{
debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
@ -218,7 +219,7 @@ static int udc_enable(struct s3c_udc *dev)
reconfig_usbd(dev);
debug_cond(DEBUG_SETUP != 0,
"S3C USB 2.0 OTG Controller Core Initialized : 0x%x\n",
"DWC2 USB 2.0 OTG Controller Core Initialized : 0x%x\n",
readl(&reg->gintmsk));
dev->gadget.speed = USB_SPEED_UNKNOWN;
@ -231,7 +232,7 @@ static int udc_enable(struct s3c_udc *dev)
*/
int usb_gadget_register_driver(struct usb_gadget_driver *driver)
{
struct s3c_udc *dev = the_controller;
struct dwc2_udc *dev = the_controller;
int retval = 0;
unsigned long flags = 0;
@ -280,7 +281,7 @@ int usb_gadget_register_driver(struct usb_gadget_driver *driver)
*/
int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
{
struct s3c_udc *dev = the_controller;
struct dwc2_udc *dev = the_controller;
unsigned long flags = 0;
if (!dev)
@ -304,7 +305,7 @@ int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
/*
* done - retire a request; caller blocked irqs
*/
static void done(struct s3c_ep *ep, struct s3c_request *req, int status)
static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status)
{
unsigned int stopped = ep->stopped;
@ -355,20 +356,20 @@ static void done(struct s3c_ep *ep, struct s3c_request *req, int status)
/*
* nuke - dequeue ALL requests
*/
static void nuke(struct s3c_ep *ep, int status)
static void nuke(struct dwc2_ep *ep, int status)
{
struct s3c_request *req;
struct dwc2_request *req;
debug("%s: %s %p\n", __func__, ep->ep.name, ep);
/* called with irqs blocked */
while (!list_empty(&ep->queue)) {
req = list_entry(ep->queue.next, struct s3c_request, queue);
req = list_entry(ep->queue.next, struct dwc2_request, queue);
done(ep, req, status);
}
}
static void stop_activity(struct s3c_udc *dev,
static void stop_activity(struct dwc2_udc *dev,
struct usb_gadget_driver *driver)
{
int i;
@ -379,8 +380,8 @@ static void stop_activity(struct s3c_udc *dev,
dev->gadget.speed = USB_SPEED_UNKNOWN;
/* prevent new request submissions, kill any outstanding requests */
for (i = 0; i < S3C_MAX_ENDPOINTS; i++) {
struct s3c_ep *ep = &dev->ep[i];
for (i = 0; i < DWC2_MAX_ENDPOINTS; i++) {
struct dwc2_ep *ep = &dev->ep[i];
ep->stopped = 1;
nuke(ep, -ESHUTDOWN);
}
@ -396,7 +397,7 @@ static void stop_activity(struct s3c_udc *dev,
udc_reinit(dev);
}
static void reconfig_usbd(struct s3c_udc *dev)
static void reconfig_usbd(struct dwc2_udc *dev)
{
/* 2. Soft-reset OTG Core and then unreset again. */
int i;
@ -447,7 +448,7 @@ static void reconfig_usbd(struct s3c_udc *dev)
writel(DEPCTL_EPDIS|DEPCTL_SNAK, &reg->out_endp[EP0_CON].doepctl);
writel(DEPCTL_EPDIS|DEPCTL_SNAK, &reg->in_endp[EP0_CON].diepctl);
for (i = 1; i < S3C_MAX_ENDPOINTS; i++) {
for (i = 1; i < DWC2_MAX_ENDPOINTS; i++) {
writel(DEPCTL_EPDIS|DEPCTL_SNAK, &reg->out_endp[i].doepctl);
writel(DEPCTL_EPDIS|DEPCTL_SNAK, &reg->in_endp[i].diepctl);
}
@ -469,7 +470,7 @@ static void reconfig_usbd(struct s3c_udc *dev)
writel((NPTX_FIFO_SIZE >> 2) << 16 | ((RX_FIFO_SIZE >> 2)) << 0,
&reg->gnptxfsiz);
for (i = 1; i < S3C_MAX_HW_ENDPOINTS; i++)
for (i = 1; i < DWC2_MAX_HW_ENDPOINTS; i++)
writel((PTX_FIFO_SIZE >> 2) << 16 |
((RX_FIFO_SIZE + NPTX_FIFO_SIZE +
PTX_FIFO_SIZE*(i-1)) >> 2) << 0,
@ -478,13 +479,13 @@ static void reconfig_usbd(struct s3c_udc *dev)
/* Flush the RX FIFO */
writel(RX_FIFO_FLUSH, &reg->grstctl);
while (readl(&reg->grstctl) & RX_FIFO_FLUSH)
debug("%s: waiting for S3C_UDC_OTG_GRSTCTL\n", __func__);
debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__);
/* Flush all the Tx FIFO's */
writel(TX_FIFO_FLUSH_ALL, &reg->grstctl);
writel(TX_FIFO_FLUSH_ALL | TX_FIFO_FLUSH, &reg->grstctl);
while (readl(&reg->grstctl) & TX_FIFO_FLUSH)
debug("%s: waiting for S3C_UDC_OTG_GRSTCTL\n", __func__);
debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__);
/* 13. Clear NAK bit of EP0, EP1, EP2*/
/* For Slave mode*/
@ -496,7 +497,7 @@ static void reconfig_usbd(struct s3c_udc *dev)
writel(GAHBCFG_INIT, &reg->gahbcfg);
}
static void set_max_pktsize(struct s3c_udc *dev, enum usb_device_speed speed)
static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed)
{
unsigned int ep_ctrl;
int i;
@ -514,7 +515,7 @@ static void set_max_pktsize(struct s3c_udc *dev, enum usb_device_speed speed)
}
dev->ep[0].ep.maxpacket = ep0_fifo_size;
for (i = 1; i < S3C_MAX_ENDPOINTS; i++)
for (i = 1; i < DWC2_MAX_ENDPOINTS; i++)
dev->ep[i].ep.maxpacket = ep_fifo_size;
/* EP0 - Control IN (64 bytes)*/
@ -526,16 +527,16 @@ static void set_max_pktsize(struct s3c_udc *dev, enum usb_device_speed speed)
writel(ep_ctrl|(0<<0), &reg->out_endp[EP0_CON].doepctl);
}
static int s3c_ep_enable(struct usb_ep *_ep,
static int dwc2_ep_enable(struct usb_ep *_ep,
const struct usb_endpoint_descriptor *desc)
{
struct s3c_ep *ep;
struct s3c_udc *dev;
struct dwc2_ep *ep;
struct dwc2_udc *dev;
unsigned long flags = 0;
debug("%s: %p\n", __func__, _ep);
ep = container_of(_ep, struct s3c_ep, ep);
ep = container_of(_ep, struct dwc2_ep, ep);
if (!_ep || !desc || ep->desc || _ep->name == ep0name
|| desc->bDescriptorType != USB_DT_ENDPOINT
|| ep->bEndpointAddress != desc->bEndpointAddress
@ -577,11 +578,11 @@ static int s3c_ep_enable(struct usb_ep *_ep,
ep->ep.maxpacket = le16_to_cpu(get_unaligned(&desc->wMaxPacketSize));
/* Reset halt state */
s3c_udc_set_nak(ep);
s3c_udc_set_halt(_ep, 0);
dwc2_udc_set_nak(ep);
dwc2_udc_set_halt(_ep, 0);
spin_lock_irqsave(&ep->dev->lock, flags);
s3c_udc_ep_activate(ep);
dwc2_udc_ep_activate(ep);
spin_unlock_irqrestore(&ep->dev->lock, flags);
debug("%s: enabled %s, stopped = %d, maxpacket = %d\n",
@ -592,14 +593,14 @@ static int s3c_ep_enable(struct usb_ep *_ep,
/*
* Disable EP
*/
static int s3c_ep_disable(struct usb_ep *_ep)
static int dwc2_ep_disable(struct usb_ep *_ep)
{
struct s3c_ep *ep;
struct dwc2_ep *ep;
unsigned long flags = 0;
debug("%s: %p\n", __func__, _ep);
ep = container_of(_ep, struct s3c_ep, ep);
ep = container_of(_ep, struct dwc2_ep, ep);
if (!_ep || !ep->desc) {
debug("%s: %s not enabled\n", __func__,
_ep ? ep->ep.name : NULL);
@ -620,10 +621,10 @@ static int s3c_ep_disable(struct usb_ep *_ep)
return 0;
}
static struct usb_request *s3c_alloc_request(struct usb_ep *ep,
static struct usb_request *dwc2_alloc_request(struct usb_ep *ep,
gfp_t gfp_flags)
{
struct s3c_request *req;
struct dwc2_request *req;
debug("%s: %s %p\n", __func__, ep->name, ep);
@ -637,27 +638,27 @@ static struct usb_request *s3c_alloc_request(struct usb_ep *ep,
return &req->req;
}
static void s3c_free_request(struct usb_ep *ep, struct usb_request *_req)
static void dwc2_free_request(struct usb_ep *ep, struct usb_request *_req)
{
struct s3c_request *req;
struct dwc2_request *req;
debug("%s: %p\n", __func__, ep);
req = container_of(_req, struct s3c_request, req);
req = container_of(_req, struct dwc2_request, req);
WARN_ON(!list_empty(&req->queue));
kfree(req);
}
/* dequeue JUST ONE request */
static int s3c_dequeue(struct usb_ep *_ep, struct usb_request *_req)
static int dwc2_dequeue(struct usb_ep *_ep, struct usb_request *_req)
{
struct s3c_ep *ep;
struct s3c_request *req;
struct dwc2_ep *ep;
struct dwc2_request *req;
unsigned long flags = 0;
debug("%s: %p\n", __func__, _ep);
ep = container_of(_ep, struct s3c_ep, ep);
ep = container_of(_ep, struct dwc2_ep, ep);
if (!_ep || ep->ep.name == ep0name)
return -EINVAL;
@ -682,12 +683,12 @@ static int s3c_dequeue(struct usb_ep *_ep, struct usb_request *_req)
/*
* Return bytes in EP FIFO
*/
static int s3c_fifo_status(struct usb_ep *_ep)
static int dwc2_fifo_status(struct usb_ep *_ep)
{
int count = 0;
struct s3c_ep *ep;
struct dwc2_ep *ep;
ep = container_of(_ep, struct s3c_ep, ep);
ep = container_of(_ep, struct dwc2_ep, ep);
if (!_ep) {
debug("%s: bad ep\n", __func__);
return -ENODEV;
@ -705,11 +706,11 @@ static int s3c_fifo_status(struct usb_ep *_ep)
/*
* Flush EP FIFO
*/
static void s3c_fifo_flush(struct usb_ep *_ep)
static void dwc2_fifo_flush(struct usb_ep *_ep)
{
struct s3c_ep *ep;
struct dwc2_ep *ep;
ep = container_of(_ep, struct s3c_ep, ep);
ep = container_of(_ep, struct dwc2_ep, ep);
if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
debug("%s: bad ep\n", __func__);
return;
@ -718,14 +719,14 @@ static void s3c_fifo_flush(struct usb_ep *_ep)
debug("%s: %d\n", __func__, ep_index(ep));
}
static const struct usb_gadget_ops s3c_udc_ops = {
static const struct usb_gadget_ops dwc2_udc_ops = {
/* current versions must always be self-powered */
};
static struct s3c_udc memory = {
static struct dwc2_udc memory = {
.usb_address = 0,
.gadget = {
.ops = &s3c_udc_ops,
.ops = &dwc2_udc_ops,
.ep0 = &memory.ep[0].ep,
.name = driver_name,
},
@ -734,7 +735,7 @@ static struct s3c_udc memory = {
.ep[0] = {
.ep = {
.name = ep0name,
.ops = &s3c_ep_ops,
.ops = &dwc2_ep_ops,
.maxpacket = EP0_FIFO_SIZE,
},
.dev = &memory,
@ -749,7 +750,7 @@ static struct s3c_udc memory = {
.ep[1] = {
.ep = {
.name = "ep1in-bulk",
.ops = &s3c_ep_ops,
.ops = &dwc2_ep_ops,
.maxpacket = EP_FIFO_SIZE,
},
.dev = &memory,
@ -764,7 +765,7 @@ static struct s3c_udc memory = {
.ep[2] = {
.ep = {
.name = "ep2out-bulk",
.ops = &s3c_ep_ops,
.ops = &dwc2_ep_ops,
.maxpacket = EP_FIFO_SIZE,
},
.dev = &memory,
@ -779,7 +780,7 @@ static struct s3c_udc memory = {
.ep[3] = {
.ep = {
.name = "ep3in-int",
.ops = &s3c_ep_ops,
.ops = &dwc2_ep_ops,
.maxpacket = EP_FIFO_SIZE,
},
.dev = &memory,
@ -796,16 +797,16 @@ static struct s3c_udc memory = {
* probe - binds to the platform device
*/
int s3c_udc_probe(struct s3c_plat_otg_data *pdata)
int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata)
{
struct s3c_udc *dev = &memory;
struct dwc2_udc *dev = &memory;
int retval = 0;
debug("%s: %p\n", __func__, pdata);
dev->pdata = pdata;
reg = (struct s3c_usbotg_reg *)pdata->regs_otg;
reg = (struct dwc2_usbotg_reg *)pdata->regs_otg;
/* regs_otg = (void *)pdata->regs_otg; */
@ -839,6 +840,6 @@ int usb_gadget_handle_interrupts(int index)
u32 gintmsk = readl(&reg->gintmsk);
if (intr_status & gintmsk)
return s3c_udc_irq(1, (void *)the_controller);
return dwc2_udc_irq(1, (void *)the_controller);
return 0;
}

21
drivers/usb/gadget/s3c_udc_otg_phy.c → drivers/usb/gadget/dwc2_udc_otg_phy.c
View file

@ -1,6 +1,6 @@
/*
* drivers/usb/gadget/s3c_udc_otg.c
* Samsung S3C on-chip full/high speed USB OTG 2.0 device controllers
* drivers/usb/gadget/dwc2_udc_otg.c
* Designware DWC2 on-chip full/high speed USB OTG 2.0 device controllers
*
* Copyright (C) 2008 for Samsung Electronics
*
@ -32,16 +32,17 @@
#include <asm/mach-types.h>
#include "regs-otg.h"
#include "dwc2_udc_otg_regs.h"
#include "dwc2_udc_otg_priv.h"
#include <usb/lin_gadget_compat.h>
#include <usb/s3c_udc.h>
#include <usb/dwc2_udc.h>
void otg_phy_init(struct s3c_udc *dev)
void otg_phy_init(struct dwc2_udc *dev)
{
unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
struct s3c_usbotg_phy *phy =
(struct s3c_usbotg_phy *)dev->pdata->regs_phy;
struct dwc2_usbotg_phy *phy =
(struct dwc2_usbotg_phy *)dev->pdata->regs_phy;
dev->pdata->phy_control(1);
@ -75,11 +76,11 @@ void otg_phy_init(struct s3c_udc *dev)
udelay(10);
}
void otg_phy_off(struct s3c_udc *dev)
void otg_phy_off(struct dwc2_udc *dev)
{
unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
struct s3c_usbotg_phy *phy =
(struct s3c_usbotg_phy *)dev->pdata->regs_phy;
struct dwc2_usbotg_phy *phy =
(struct dwc2_usbotg_phy *)dev->pdata->regs_phy;
/* reset controller just in case */
writel(PHY_SW_RST0, &phy->rstcon);

45
include/usb/s3c_udc.h → drivers/usb/gadget/dwc2_udc_otg_priv.h
View file

@ -1,13 +1,12 @@
/*
* drivers/usb/gadget/s3c_udc.h
* Samsung S3C on-chip full/high speed USB device controllers
* Designware DWC2 on-chip full/high speed USB device controllers
* Copyright (C) 2005 for Samsung Electronics
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __S3C_USB_GADGET
#define __S3C_USB_GADGET
#ifndef __DWC2_UDC_OTG_PRIV__
#define __DWC2_UDC_OTG_PRIV__
#include <asm/errno.h>
#include <linux/sizes.h>
@ -15,8 +14,7 @@
#include <linux/usb/gadget.h>
#include <linux/list.h>
#include <usb/lin_gadget_compat.h>
#define PHY0_SLEEP (1 << 5)
#include <usb/dwc2_udc.h>
/*-------------------------------------------------------------------------*/
/* DMA bounce buffer size, 16K is enough even for mass storage */
@ -26,8 +24,8 @@
#define EP_FIFO_SIZE 512
#define EP_FIFO_SIZE2 1024
/* ep0-control, ep1in-bulk, ep2out-bulk, ep3in-int */
#define S3C_MAX_ENDPOINTS 4
#define S3C_MAX_HW_ENDPOINTS 16
#define DWC2_MAX_ENDPOINTS 4
#define DWC2_MAX_HW_ENDPOINTS 16
#define WAIT_FOR_SETUP 0
#define DATA_STATE_XMIT 1
@ -53,9 +51,9 @@ enum ep_type {
ep_control, ep_bulk_in, ep_bulk_out, ep_interrupt
};
struct s3c_ep {
struct dwc2_ep {
struct usb_ep ep;
struct s3c_udc *dev;
struct dwc2_udc *dev;
const struct usb_endpoint_descriptor *desc;
struct list_head queue;
@ -71,43 +69,30 @@ struct s3c_ep {
int fifo_num;
};
struct s3c_request {
struct dwc2_request {
struct usb_request req;
struct list_head queue;
};
struct s3c_udc {
struct dwc2_udc {
struct usb_gadget gadget;
struct usb_gadget_driver *driver;
struct s3c_plat_otg_data *pdata;
struct dwc2_plat_otg_data *pdata;
int ep0state;
struct s3c_ep ep[S3C_MAX_ENDPOINTS];
struct dwc2_ep ep[DWC2_MAX_ENDPOINTS];
unsigned char usb_address;
unsigned req_pending:1, req_std:1;
};
extern struct s3c_udc *the_controller;
#define ep_is_in(EP) (((EP)->bEndpointAddress&USB_DIR_IN) == USB_DIR_IN)
#define ep_index(EP) ((EP)->bEndpointAddress&0xF)
#define ep_maxpacket(EP) ((EP)->ep.maxpacket)
extern void otg_phy_init(struct s3c_udc *dev);
extern void otg_phy_off(struct s3c_udc *dev);
void otg_phy_init(struct dwc2_udc *dev);
void otg_phy_off(struct dwc2_udc *dev);
extern void s3c_udc_ep_set_stall(struct s3c_ep *ep);
extern int s3c_udc_probe(struct s3c_plat_otg_data *pdata);
struct s3c_plat_otg_data {
int (*phy_control)(int on);
unsigned int regs_phy;
unsigned int regs_otg;
unsigned int usb_phy_ctrl;
unsigned int usb_flags;
unsigned int usb_gusbcfg;
};
#endif
#endif /* __DWC2_UDC_OTG_PRIV__ */

32
drivers/usb/gadget/regs-otg.h → drivers/usb/gadget/dwc2_udc_otg_regs.h
View file

@ -12,14 +12,14 @@
#define __ASM_ARCH_REGS_USB_OTG_HS_H
/* USB2.0 OTG Controller register */
struct s3c_usbotg_phy {
struct dwc2_usbotg_phy {
u32 phypwr;
u32 phyclk;
u32 rstcon;
};
/* Device Logical IN Endpoint-Specific Registers */
struct s3c_dev_in_endp {
struct dwc2_dev_in_endp {
u32 diepctl;
u8 res1[4];
u32 diepint;
@ -31,7 +31,7 @@ struct s3c_dev_in_endp {
};
/* Device Logical OUT Endpoint-Specific Registers */
struct s3c_dev_out_endp {
struct dwc2_dev_out_endp {
u32 doepctl;
u8 res1[4];
u32 doepint;
@ -48,7 +48,7 @@ struct ep_fifo {
};
/* USB2.0 OTG Controller register */
struct s3c_usbotg_reg {
struct dwc2_usbotg_reg {
/* Core Global Registers */
u32 gotgctl; /* OTG Control & Status */
u32 gotgint; /* OTG Interrupt */
@ -74,8 +74,8 @@ struct s3c_usbotg_reg {
u32 daint; /* Device All Endpoints Interrupt */
u32 daintmsk; /* Device All Endpoints Interrupt Mask */
u8 res4[224];
struct s3c_dev_in_endp in_endp[16];
struct s3c_dev_out_endp out_endp[16];
struct dwc2_dev_in_endp in_endp[16];
struct dwc2_dev_out_endp out_endp[16];
u8 res5[768];
struct ep_fifo ep[16];
};
@ -83,11 +83,11 @@ struct s3c_usbotg_reg {
/*===================================================================== */
/*definitions related to CSR setting */
/* S3C_UDC_OTG_GOTGCTL */
/* DWC2_UDC_OTG_GOTGCTL */
#define B_SESSION_VALID (0x1<<19)
#define A_SESSION_VALID (0x1<<18)
/* S3C_UDC_OTG_GAHBCFG */
/* DWC2_UDC_OTG_GAHBCFG */
#define PTXFE_HALF (0<<8)
#define PTXFE_ZERO (1<<8)
#define NPTXFE_HALF (0<<7)
@ -102,11 +102,11 @@ struct s3c_usbotg_reg {
#define GBL_INT_UNMASK (1<<0)
#define GBL_INT_MASK (0<<0)
/* S3C_UDC_OTG_GRSTCTL */
/* DWC2_UDC_OTG_GRSTCTL */
#define AHB_MASTER_IDLE (1u<<31)
#define CORE_SOFT_RESET (0x1<<0)
/* S3C_UDC_OTG_GINTSTS/S3C_UDC_OTG_GINTMSK core interrupt register */
/* DWC2_UDC_OTG_GINTSTS/DWC2_UDC_OTG_GINTMSK core interrupt register */
#define INT_RESUME (1u<<31)
#define INT_DISCONN (0x1<<29)
#define INT_CONN_ID_STS_CNG (0x1<<28)
@ -146,22 +146,22 @@ struct s3c_usbotg_reg {
#define USB_LOW_6MHZ (0x2<<1)
#define USB_FULL_48MHZ (0x3<<1)
/* S3C_UDC_OTG_GRXSTSP STATUS */
/* DWC2_UDC_OTG_GRXSTSP STATUS */
#define OUT_PKT_RECEIVED (0x2<<17)
#define OUT_TRANSFER_COMPLELTED (0x3<<17)
#define SETUP_TRANSACTION_COMPLETED (0x4<<17)
#define SETUP_PKT_RECEIVED (0x6<<17)
#define GLOBAL_OUT_NAK (0x1<<17)
/* S3C_UDC_OTG_DCTL device control register */
/* DWC2_UDC_OTG_DCTL device control register */
#define NORMAL_OPERATION (0x1<<0)
#define SOFT_DISCONNECT (0x1<<1)
/* S3C_UDC_OTG_DAINT device all endpoint interrupt register */
/* DWC2_UDC_OTG_DAINT device all endpoint interrupt register */
#define DAINT_OUT_BIT (16)
#define DAINT_MASK (0xFFFF)
/* S3C_UDC_OTG_DIEPCTL0/DOEPCTL0 device
/* DWC2_UDC_OTG_DIEPCTL0/DOEPCTL0 device
control IN/OUT endpoint 0 control register */
#define DEPCTL_EPENA (0x1<<31)
#define DEPCTL_EPDIS (0x1<<30)
@ -191,9 +191,9 @@ struct s3c_usbotg_reg {
#define DIEPCTL0_NEXT_EP_BIT (11)
/* S3C_UDC_OTG_DIEPMSK/DOEPMSK device IN/OUT endpoint
/* DWC2_UDC_OTG_DIEPMSK/DOEPMSK device IN/OUT endpoint
common interrupt mask register */
/* S3C_UDC_OTG_DIEPINTn/DOEPINTn device IN/OUT endpoint interrupt register */
/* DWC2_UDC_OTG_DIEPINTn/DOEPINTn device IN/OUT endpoint interrupt register */
#define BACK2BACK_SETUP_RECEIVED (0x1<<6)
#define INTKNEPMIS (0x1<<5)
#define INTKN_TXFEMP (0x1<<4)

202
drivers/usb/gadget/s3c_udc_otg_xfer_dma.c → drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
View file

@ -1,6 +1,6 @@
/*
* drivers/usb/gadget/s3c_udc_otg_xfer_dma.c
* Samsung S3C on-chip full/high speed USB OTG 2.0 device controllers
* drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
* Designware DWC2 on-chip full/high speed USB OTG 2.0 device controllers
*
* Copyright (C) 2009 for Samsung Electronics
*
@ -25,7 +25,7 @@ int clear_feature_flag;
#define GET_MAX_LUN_REQUEST 0xFE
#define BOT_RESET_REQUEST 0xFF
static inline void s3c_udc_ep0_zlp(struct s3c_udc *dev)
static inline void dwc2_udc_ep0_zlp(struct dwc2_udc *dev)
{
u32 ep_ctrl;
@ -41,7 +41,7 @@ static inline void s3c_udc_ep0_zlp(struct s3c_udc *dev)
dev->ep0state = WAIT_FOR_IN_COMPLETE;
}
void s3c_udc_pre_setup(void)
static void dwc2_udc_pre_setup(void)
{
u32 ep_ctrl;
@ -62,7 +62,7 @@ void s3c_udc_pre_setup(void)
}
static inline void s3c_ep0_complete_out(void)
static inline void dwc2_ep0_complete_out(void)
{
u32 ep_ctrl;
@ -90,7 +90,7 @@ static inline void s3c_ep0_complete_out(void)
}
static int setdma_rx(struct s3c_ep *ep, struct s3c_request *req)
static int setdma_rx(struct dwc2_ep *ep, struct dwc2_request *req)
{
u32 *buf, ctrl;
u32 length, pktcnt;
@ -128,7 +128,7 @@ static int setdma_rx(struct s3c_ep *ep, struct s3c_request *req)
}
int setdma_tx(struct s3c_ep *ep, struct s3c_request *req)
static int setdma_tx(struct dwc2_ep *ep, struct dwc2_request *req)
{
u32 *buf, ctrl = 0;
u32 length, pktcnt;
@ -186,10 +186,10 @@ int setdma_tx(struct s3c_ep *ep, struct s3c_request *req)
return length;
}
static void complete_rx(struct s3c_udc *dev, u8 ep_num)
static void complete_rx(struct dwc2_udc *dev, u8 ep_num)
{
struct s3c_ep *ep = &dev->ep[ep_num];
struct s3c_request *req = NULL;
struct dwc2_ep *ep = &dev->ep[ep_num];
struct dwc2_request *req = NULL;
u32 ep_tsr = 0, xfer_size = 0, is_short = 0;
if (list_empty(&ep->queue)) {
@ -200,7 +200,7 @@ static void complete_rx(struct s3c_udc *dev, u8 ep_num)
}
req = list_entry(ep->queue.next, struct s3c_request, queue);
req = list_entry(ep->queue.next, struct dwc2_request, queue);
ep_tsr = readl(&reg->out_endp[ep_num].doeptsiz);
if (ep_num == EP0_CON)
@ -240,7 +240,7 @@ static void complete_rx(struct s3c_udc *dev, u8 ep_num)
if (is_short || req->req.actual == req->req.length) {
if (ep_num == EP0_CON && dev->ep0state == DATA_STATE_RECV) {
debug_cond(DEBUG_OUT_EP != 0, " => Send ZLP\n");
s3c_udc_ep0_zlp(dev);
dwc2_udc_ep0_zlp(dev);
/* packet will be completed in complete_tx() */
dev->ep0state = WAIT_FOR_IN_COMPLETE;
} else {
@ -248,7 +248,7 @@ static void complete_rx(struct s3c_udc *dev, u8 ep_num)
if (!list_empty(&ep->queue)) {
req = list_entry(ep->queue.next,
struct s3c_request, queue);
struct dwc2_request, queue);
debug_cond(DEBUG_OUT_EP != 0,
"%s: Next Rx request start...\n",
__func__);
@ -259,16 +259,16 @@ static void complete_rx(struct s3c_udc *dev, u8 ep_num)
setdma_rx(ep, req);
}
static void complete_tx(struct s3c_udc *dev, u8 ep_num)
static void complete_tx(struct dwc2_udc *dev, u8 ep_num)
{
struct s3c_ep *ep = &dev->ep[ep_num];
struct s3c_request *req;
struct dwc2_ep *ep = &dev->ep[ep_num];
struct dwc2_request *req;
u32 ep_tsr = 0, xfer_size = 0, is_short = 0;
u32 last;
if (dev->ep0state == WAIT_FOR_NULL_COMPLETE) {
dev->ep0state = WAIT_FOR_OUT_COMPLETE;
s3c_ep0_complete_out();
dwc2_ep0_complete_out();
return;
}
@ -280,7 +280,7 @@ static void complete_tx(struct s3c_udc *dev, u8 ep_num)
}
req = list_entry(ep->queue.next, struct s3c_request, queue);
req = list_entry(ep->queue.next, struct dwc2_request, queue);
ep_tsr = readl(&reg->in_endp[ep_num].dieptsiz);
@ -315,7 +315,7 @@ static void complete_tx(struct s3c_udc *dev, u8 ep_num)
__func__, ep_num);
done(ep, req, 0);
dev->ep0state = WAIT_FOR_OUT_COMPLETE;
s3c_ep0_complete_out();
dwc2_ep0_complete_out();
} else {
debug_cond(DEBUG_IN_EP,
"%s: ep_num = %d, invalid ep state\n",
@ -328,23 +328,23 @@ static void complete_tx(struct s3c_udc *dev, u8 ep_num)
done(ep, req, 0);
if (!list_empty(&ep->queue)) {
req = list_entry(ep->queue.next, struct s3c_request, queue);
req = list_entry(ep->queue.next, struct dwc2_request, queue);
debug_cond(DEBUG_IN_EP,
"%s: Next Tx request start...\n", __func__);
setdma_tx(ep, req);
}
}
static inline void s3c_udc_check_tx_queue(struct s3c_udc *dev, u8 ep_num)
static inline void dwc2_udc_check_tx_queue(struct dwc2_udc *dev, u8 ep_num)
{
struct s3c_ep *ep = &dev->ep[ep_num];
struct s3c_request *req;
struct dwc2_ep *ep = &dev->ep[ep_num];
struct dwc2_request *req;
debug_cond(DEBUG_IN_EP,
"%s: Check queue, ep_num = %d\n", __func__, ep_num);
if (!list_empty(&ep->queue)) {
req = list_entry(ep->queue.next, struct s3c_request, queue);
req = list_entry(ep->queue.next, struct dwc2_request, queue);
debug_cond(DEBUG_IN_EP,
"%s: Next Tx request(0x%p) start...\n",
__func__, req);
@ -362,7 +362,7 @@ static inline void s3c_udc_check_tx_queue(struct s3c_udc *dev, u8 ep_num)
}
static void process_ep_in_intr(struct s3c_udc *dev)
static void process_ep_in_intr(struct dwc2_udc *dev)
{
u32 ep_intr, ep_intr_status;
u8 ep_num = 0;
@ -392,12 +392,12 @@ static void process_ep_in_intr(struct s3c_udc *dev)
dev->ep0state = WAIT_FOR_SETUP;
if (dev->ep0state == WAIT_FOR_SETUP)
s3c_udc_pre_setup();
dwc2_udc_pre_setup();
/* continue transfer after
set_clear_halt for DMA mode */
if (clear_feature_flag == 1) {
s3c_udc_check_tx_queue(dev,
dwc2_udc_check_tx_queue(dev,
clear_feature_num);
clear_feature_flag = 0;
}
@ -409,7 +409,7 @@ static void process_ep_in_intr(struct s3c_udc *dev)
}
}
static void process_ep_out_intr(struct s3c_udc *dev)
static void process_ep_out_intr(struct dwc2_udc *dev)
{
u32 ep_intr, ep_intr_status;
u8 ep_num = 0;
@ -438,7 +438,7 @@ static void process_ep_out_intr(struct s3c_udc *dev)
complete_rx(dev, ep_num);
else {
dev->ep0state = WAIT_FOR_SETUP;
s3c_udc_pre_setup();
dwc2_udc_pre_setup();
}
}
@ -446,7 +446,7 @@ static void process_ep_out_intr(struct s3c_udc *dev)
CTRL_OUT_EP_SETUP_PHASE_DONE) {
debug_cond(DEBUG_OUT_EP != 0,
"SETUP packet arrived\n");
s3c_handle_ep0(dev);
dwc2_handle_ep0(dev);
}
} else {
if (ep_intr_status & TRANSFER_DONE)
@ -461,9 +461,9 @@ static void process_ep_out_intr(struct s3c_udc *dev)
/*
* usb client interrupt handler.
*/
static int s3c_udc_irq(int irq, void *_dev)
static int dwc2_udc_irq(int irq, void *_dev)
{
struct s3c_udc *dev = _dev;
struct dwc2_udc *dev = _dev;
u32 intr_status;
u32 usb_status, gintmsk;
unsigned long flags = 0;
@ -554,7 +554,7 @@ static int s3c_udc_irq(int irq, void *_dev)
reconfig_usbd(dev);
dev->ep0state = WAIT_FOR_SETUP;
reset_available = 0;
s3c_udc_pre_setup();
dwc2_udc_pre_setup();
} else
reset_available = 1;
@ -579,16 +579,16 @@ static int s3c_udc_irq(int irq, void *_dev)
/** Queue one request
* Kickstart transfer if needed
*/
static int s3c_queue(struct usb_ep *_ep, struct usb_request *_req,
static int dwc2_queue(struct usb_ep *_ep, struct usb_request *_req,
gfp_t gfp_flags)
{
struct s3c_request *req;
struct s3c_ep *ep;
struct s3c_udc *dev;
struct dwc2_request *req;
struct dwc2_ep *ep;
struct dwc2_udc *dev;
unsigned long flags = 0;
u32 ep_num, gintsts;
req = container_of(_req, struct s3c_request, req);
req = container_of(_req, struct dwc2_request, req);
if (unlikely(!_req || !_req->complete || !_req->buf
|| !list_empty(&req->queue))) {
@ -596,7 +596,7 @@ static int s3c_queue(struct usb_ep *_ep, struct usb_request *_req,
return -EINVAL;
}
ep = container_of(_ep, struct s3c_ep, ep);
ep = container_of(_ep, struct dwc2_ep, ep);
if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
@ -646,20 +646,20 @@ static int s3c_queue(struct usb_ep *_ep, struct usb_request *_req,
if (ep_num == 0) {
/* EP0 */
list_add_tail(&req->queue, &ep->queue);
s3c_ep0_kick(dev, ep);
dwc2_ep0_kick(dev, ep);
req = 0;
} else if (ep_is_in(ep)) {
gintsts = readl(&reg->gintsts);
debug_cond(DEBUG_IN_EP,
"%s: ep_is_in, S3C_UDC_OTG_GINTSTS=0x%x\n",
"%s: ep_is_in, DWC2_UDC_OTG_GINTSTS=0x%x\n",
__func__, gintsts);
setdma_tx(ep, req);
} else {
gintsts = readl(&reg->gintsts);
debug_cond(DEBUG_OUT_EP != 0,
"%s:ep_is_out, S3C_UDC_OTG_GINTSTS=0x%x\n",
"%s:ep_is_out, DWC2_UDC_OTG_GINTSTS=0x%x\n",
__func__, gintsts);
setdma_rx(ep, req);
@ -680,7 +680,7 @@ static int s3c_queue(struct usb_ep *_ep, struct usb_request *_req,
/****************************************************************/
/* return: 0 = still running, 1 = completed, negative = errno */
static int write_fifo_ep0(struct s3c_ep *ep, struct s3c_request *req)
static int write_fifo_ep0(struct dwc2_ep *ep, struct dwc2_request *req)
{
u32 max;
unsigned count;
@ -718,7 +718,7 @@ static int write_fifo_ep0(struct s3c_ep *ep, struct s3c_request *req)
return 0;
}
int s3c_fifo_read(struct s3c_ep *ep, u32 *cp, int max)
static int dwc2_fifo_read(struct dwc2_ep *ep, u32 *cp, int max)
{
invalidate_dcache_range((unsigned long)cp, (unsigned long)cp +
ROUND(max, CONFIG_SYS_CACHELINE_SIZE));
@ -737,12 +737,12 @@ int s3c_fifo_read(struct s3c_ep *ep, u32 *cp, int max)
* Called from control endpoint function
* after it decodes a set address setup packet.
*/
static void udc_set_address(struct s3c_udc *dev, unsigned char address)
static void udc_set_address(struct dwc2_udc *dev, unsigned char address)
{
u32 ctrl = readl(&reg->dcfg);
writel(DEVICE_ADDRESS(address) | ctrl, &reg->dcfg);
s3c_udc_ep0_zlp(dev);
dwc2_udc_ep0_zlp(dev);
debug_cond(DEBUG_EP0 != 0,
"%s: USB OTG 2.0 Device address=%d, DCFG=0x%x\n",
@ -751,9 +751,9 @@ static void udc_set_address(struct s3c_udc *dev, unsigned char address)
dev->usb_address = address;
}
static inline void s3c_udc_ep0_set_stall(struct s3c_ep *ep)
static inline void dwc2_udc_ep0_set_stall(struct dwc2_ep *ep)
{
struct s3c_udc *dev;
struct dwc2_udc *dev;
u32 ep_ctrl = 0;
dev = ep->dev;
@ -776,16 +776,16 @@ static inline void s3c_udc_ep0_set_stall(struct s3c_ep *ep)
*/
dev->ep0state = WAIT_FOR_SETUP;
s3c_udc_pre_setup();
dwc2_udc_pre_setup();
}
static void s3c_ep0_read(struct s3c_udc *dev)
static void dwc2_ep0_read(struct dwc2_udc *dev)
{
struct s3c_request *req;
struct s3c_ep *ep = &dev->ep[0];
struct dwc2_request *req;
struct dwc2_ep *ep = &dev->ep[0];
if (!list_empty(&ep->queue)) {
req = list_entry(ep->queue.next, struct s3c_request, queue);
req = list_entry(ep->queue.next, struct dwc2_request, queue);
} else {
debug("%s: ---> BUG\n", __func__);
@ -802,7 +802,7 @@ static void s3c_ep0_read(struct s3c_udc *dev)
* or Bulk-Only mass storge reset */
ep->len = 0;
s3c_udc_ep0_zlp(dev);
dwc2_udc_ep0_zlp(dev);
debug_cond(DEBUG_EP0 != 0,
"%s: req.length = 0, bRequest = %d\n",
@ -816,16 +816,16 @@ static void s3c_ep0_read(struct s3c_udc *dev)
/*
* DATA_STATE_XMIT
*/
static int s3c_ep0_write(struct s3c_udc *dev)
static int dwc2_ep0_write(struct dwc2_udc *dev)
{
struct s3c_request *req;
struct s3c_ep *ep = &dev->ep[0];
struct dwc2_request *req;
struct dwc2_ep *ep = &dev->ep[0];
int ret, need_zlp = 0;
if (list_empty(&ep->queue))
req = 0;
else
req = list_entry(ep->queue.next, struct s3c_request, queue);
req = list_entry(ep->queue.next, struct dwc2_request, queue);
if (!req) {
debug_cond(DEBUG_EP0 != 0, "%s: NULL REQ\n", __func__);
@ -859,7 +859,7 @@ static int s3c_ep0_write(struct s3c_udc *dev)
return 1;
}
int s3c_udc_get_status(struct s3c_udc *dev,
static int dwc2_udc_get_status(struct dwc2_udc *dev,
struct usb_ctrlrequest *crq)
{
u8 ep_num = crq->wIndex & 0x7F;
@ -920,7 +920,7 @@ int s3c_udc_get_status(struct s3c_udc *dev,
return 0;
}
static void s3c_udc_set_nak(struct s3c_ep *ep)
static void dwc2_udc_set_nak(struct dwc2_ep *ep)
{
u8 ep_num;
u32 ep_ctrl = 0;
@ -946,7 +946,7 @@ static void s3c_udc_set_nak(struct s3c_ep *ep)
}
void s3c_udc_ep_set_stall(struct s3c_ep *ep)
static void dwc2_udc_ep_set_stall(struct dwc2_ep *ep)
{
u8 ep_num;
u32 ep_ctrl = 0;
@ -981,7 +981,7 @@ void s3c_udc_ep_set_stall(struct s3c_ep *ep)
return;
}
void s3c_udc_ep_clear_stall(struct s3c_ep *ep)
static void dwc2_udc_ep_clear_stall(struct dwc2_ep *ep)
{
u8 ep_num;
u32 ep_ctrl = 0;
@ -1029,14 +1029,14 @@ void s3c_udc_ep_clear_stall(struct s3c_ep *ep)
return;
}
static int s3c_udc_set_halt(struct usb_ep *_ep, int value)
static int dwc2_udc_set_halt(struct usb_ep *_ep, int value)
{
struct s3c_ep *ep;
struct s3c_udc *dev;
struct dwc2_ep *ep;
struct dwc2_udc *dev;
unsigned long flags = 0;
u8 ep_num;
ep = container_of(_ep, struct s3c_ep, ep);
ep = container_of(_ep, struct dwc2_ep, ep);
ep_num = ep_index(ep);
if (unlikely(!_ep || !ep->desc || ep_num == EP0_CON ||
@ -1050,7 +1050,7 @@ static int s3c_udc_set_halt(struct usb_ep *_ep, int value)
if (value && ep_is_in(ep) && !list_empty(&ep->queue)) {
debug("%s: %s queue not empty, req = %p\n",
__func__, ep->ep.name,
list_entry(ep->queue.next, struct s3c_request, queue));
list_entry(ep->queue.next, struct dwc2_request, queue));
return -EAGAIN;
}
@ -1062,13 +1062,13 @@ static int s3c_udc_set_halt(struct usb_ep *_ep, int value)
if (value == 0) {
ep->stopped = 0;
s3c_udc_ep_clear_stall(ep);
dwc2_udc_ep_clear_stall(ep);
} else {
if (ep_num == 0)
dev->ep0state = WAIT_FOR_SETUP;
ep->stopped = 1;
s3c_udc_ep_set_stall(ep);
dwc2_udc_ep_set_stall(ep);
}
spin_unlock_irqrestore(&dev->lock, flags);
@ -1076,7 +1076,7 @@ static int s3c_udc_set_halt(struct usb_ep *_ep, int value)
return 0;
}
void s3c_udc_ep_activate(struct s3c_ep *ep)
static void dwc2_udc_ep_activate(struct dwc2_ep *ep)
{
u8 ep_num;
u32 ep_ctrl = 0, daintmsk = 0;
@ -1123,13 +1123,13 @@ void s3c_udc_ep_activate(struct s3c_ep *ep)
}
static int s3c_udc_clear_feature(struct usb_ep *_ep)
static int dwc2_udc_clear_feature(struct usb_ep *_ep)
{
struct s3c_udc *dev;
struct s3c_ep *ep;
struct dwc2_udc *dev;
struct dwc2_ep *ep;
u8 ep_num;
ep = container_of(_ep, struct s3c_ep, ep);
ep = container_of(_ep, struct dwc2_ep, ep);
ep_num = ep_index(ep);
dev = ep->dev;
@ -1158,7 +1158,7 @@ static int s3c_udc_clear_feature(struct usb_ep *_ep)
break;
}
s3c_udc_ep0_zlp(dev);
dwc2_udc_ep0_zlp(dev);
break;
case USB_RECIP_ENDPOINT:
@ -1168,14 +1168,14 @@ static int s3c_udc_clear_feature(struct usb_ep *_ep)
if (usb_ctrl->wValue == USB_ENDPOINT_HALT) {
if (ep_num == 0) {
s3c_udc_ep0_set_stall(ep);
dwc2_udc_ep0_set_stall(ep);
return 0;
}
s3c_udc_ep0_zlp(dev);
dwc2_udc_ep0_zlp(dev);
s3c_udc_ep_clear_stall(ep);
s3c_udc_ep_activate(ep);
dwc2_udc_ep_clear_stall(ep);
dwc2_udc_ep_activate(ep);
ep->stopped = 0;
clear_feature_num = ep_num;
@ -1187,13 +1187,13 @@ static int s3c_udc_clear_feature(struct usb_ep *_ep)
return 0;
}
static int s3c_udc_set_feature(struct usb_ep *_ep)
static int dwc2_udc_set_feature(struct usb_ep *_ep)
{
struct s3c_udc *dev;
struct s3c_ep *ep;
struct dwc2_udc *dev;
struct dwc2_ep *ep;
u8 ep_num;
ep = container_of(_ep, struct s3c_ep, ep);
ep = container_of(_ep, struct dwc2_ep, ep);
ep_num = ep_index(ep);
dev = ep->dev;
@ -1232,7 +1232,7 @@ static int s3c_udc_set_feature(struct usb_ep *_ep)
break;
}
s3c_udc_ep0_zlp(dev);
dwc2_udc_ep0_zlp(dev);
return 0;
case USB_RECIP_INTERFACE:
@ -1245,14 +1245,14 @@ static int s3c_udc_set_feature(struct usb_ep *_ep)
"\tSET_FEATURE: USB_RECIP_ENDPOINT\n");
if (usb_ctrl->wValue == USB_ENDPOINT_HALT) {
if (ep_num == 0) {
s3c_udc_ep0_set_stall(ep);
dwc2_udc_ep0_set_stall(ep);
return 0;
}
ep->stopped = 1;
s3c_udc_ep_set_stall(ep);
dwc2_udc_ep_set_stall(ep);
}
s3c_udc_ep0_zlp(dev);
dwc2_udc_ep0_zlp(dev);
return 0;
}
@ -1262,9 +1262,9 @@ static int s3c_udc_set_feature(struct usb_ep *_ep)
/*
* WAIT_FOR_SETUP (OUT_PKT_RDY)
*/
void s3c_ep0_setup(struct s3c_udc *dev)
static void dwc2_ep0_setup(struct dwc2_udc *dev)
{
struct s3c_ep *ep = &dev->ep[0];
struct dwc2_ep *ep = &dev->ep[0];
int i;
u8 ep_num;
@ -1272,7 +1272,7 @@ void s3c_ep0_setup(struct s3c_udc *dev)
nuke(ep, -EPROTO);
/* read control req from fifo (8 bytes) */
s3c_fifo_read(ep, (u32 *)usb_ctrl, 8);
dwc2_fifo_read(ep, (u32 *)usb_ctrl, 8);
debug_cond(DEBUG_SETUP != 0,
"%s: bRequestType = 0x%x(%s), bRequest = 0x%x"
@ -1306,7 +1306,7 @@ void s3c_ep0_setup(struct s3c_udc *dev)
"wLength = %d, setup returned\n",
usb_ctrl->wLength);
s3c_udc_ep0_set_stall(ep);
dwc2_udc_ep0_set_stall(ep);
dev->ep0state = WAIT_FOR_SETUP;
return;
@ -1317,7 +1317,7 @@ void s3c_ep0_setup(struct s3c_udc *dev)
"%s:BOT Rest:invalid wLength =%d, setup returned\n",
__func__, usb_ctrl->wLength);
s3c_udc_ep0_set_stall(ep);
dwc2_udc_ep0_set_stall(ep);
dev->ep0state = WAIT_FOR_SETUP;
return;
@ -1384,7 +1384,7 @@ void s3c_ep0_setup(struct s3c_udc *dev)
break;
case USB_REQ_GET_STATUS:
if (!s3c_udc_get_status(dev, usb_ctrl))
if (!dwc2_udc_get_status(dev, usb_ctrl))
return;
break;
@ -1392,7 +1392,7 @@ void s3c_ep0_setup(struct s3c_udc *dev)
case USB_REQ_CLEAR_FEATURE:
ep_num = usb_ctrl->wIndex & 0x7f;
if (!s3c_udc_clear_feature(&dev->ep[ep_num].ep))
if (!dwc2_udc_clear_feature(&dev->ep[ep_num].ep))
return;
break;
@ -1400,7 +1400,7 @@ void s3c_ep0_setup(struct s3c_udc *dev)
case USB_REQ_SET_FEATURE:
ep_num = usb_ctrl->wIndex & 0x7f;
if (!s3c_udc_set_feature(&dev->ep[ep_num].ep))
if (!dwc2_udc_set_feature(&dev->ep[ep_num].ep))
return;
break;
@ -1427,7 +1427,7 @@ void s3c_ep0_setup(struct s3c_udc *dev)
if (i < 0) {
/* setup processing failed, force stall */
s3c_udc_ep0_set_stall(ep);
dwc2_udc_ep0_set_stall(ep);
dev->ep0state = WAIT_FOR_SETUP;
debug_cond(DEBUG_SETUP != 0,
@ -1451,12 +1451,12 @@ void s3c_ep0_setup(struct s3c_udc *dev)
/*
* handle ep0 interrupt
*/
static void s3c_handle_ep0(struct s3c_udc *dev)
static void dwc2_handle_ep0(struct dwc2_udc *dev)
{
if (dev->ep0state == WAIT_FOR_SETUP) {
debug_cond(DEBUG_OUT_EP != 0,
"%s: WAIT_FOR_SETUP\n", __func__);
s3c_ep0_setup(dev);
dwc2_ep0_setup(dev);
} else {
debug_cond(DEBUG_OUT_EP != 0,
@ -1465,16 +1465,16 @@ static void s3c_handle_ep0(struct s3c_udc *dev)
}
}
static void s3c_ep0_kick(struct s3c_udc *dev, struct s3c_ep *ep)
static void dwc2_ep0_kick(struct dwc2_udc *dev, struct dwc2_ep *ep)
{
debug_cond(DEBUG_EP0 != 0,
"%s: ep_is_in = %d\n", __func__, ep_is_in(ep));
if (ep_is_in(ep)) {
dev->ep0state = DATA_STATE_XMIT;
s3c_ep0_write(dev);
dwc2_ep0_write(dev);
} else {
dev->ep0state = DATA_STATE_RECV;
s3c_ep0_read(dev);
dwc2_ep0_read(dev);
}
}

8
drivers/usb/host/Kconfig
View file

@ -26,6 +26,14 @@ config USB_XHCI_UNIPHIER
endif
config USB_OHCI_GENERIC
bool "Support for generic OHCI USB controller"
depends on OF_CONTROL
depends on DM_USB
default n
---help---
Enables support for generic OHCI controller.
config USB_EHCI_HCD
bool "EHCI HCD (USB 2.0) support"
---help---

1
drivers/usb/host/Makefile
View file

@ -21,6 +21,7 @@ obj-$(CONFIG_USB_OHCI_S3C24XX) += ohci-s3c24xx.o
obj-$(CONFIG_USB_OHCI_EP93XX) += ohci-ep93xx.o
obj-$(CONFIG_USB_OHCI_SUNXI) += ohci-sunxi.o
obj-$(CONFIG_USB_OHCI_LPC32XX) += ohci-lpc32xx.o
obj-$(CONFIG_USB_OHCI_GENERIC) += ohci-generic.o
# echi
obj-$(CONFIG_USB_EHCI) += ehci-hcd.o

4
drivers/usb/host/ehci-exynos.c
View file

@ -219,14 +219,14 @@ static int ehci_usb_probe(struct udevice *dev)
ctx->hcd = (struct ehci_hccr *)plat->hcd_base;
ctx->usb = (struct exynos_usb_phy *)plat->phy_base;
hcor = (struct ehci_hcor *)((uint32_t)ctx->hcd +
HC_LENGTH(ehci_readl(&ctx->hcd->cr_capbase)));
/* setup the Vbus gpio here */
if (dm_gpio_is_valid(&plat->vbus_gpio))
dm_gpio_set_value(&plat->vbus_gpio, 1);
setup_usb_phy(ctx->usb);
hcor = (struct ehci_hcor *)((uint32_t)ctx->hcd +
HC_LENGTH(ehci_readl(&ctx->hcd->cr_capbase)));
return ehci_register(dev, ctx->hcd, hcor, NULL, 0, USB_INIT_HOST);
}

45
drivers/usb/host/ohci-generic.c Normal file
View file

@ -0,0 +1,45 @@
/*
* Copyright (C) 2015 Alexey Brodkin <abrodkin@synopsys.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <dm.h>
#include "ohci.h"
#if !defined(CONFIG_USB_OHCI_NEW)
# error "Generic OHCI driver requires CONFIG_USB_OHCI_NEW"
#endif
struct generic_ohci {
ohci_t ohci;
};
static int ohci_usb_probe(struct udevice *dev)
{
struct ohci_regs *regs = (struct ohci_regs *)dev_get_addr(dev);
return ohci_register(dev, regs);
}
static int ohci_usb_remove(struct udevice *dev)
{
return ohci_deregister(dev);
}
static const struct udevice_id ohci_usb_ids[] = {
{ .compatible = "generic-ohci" },
{ }
};
U_BOOT_DRIVER(ohci_generic) = {
.name = "ohci_generic",
.id = UCLASS_USB,
.of_match = ohci_usb_ids,
.probe = ohci_usb_probe,
.remove = ohci_usb_remove,
.ops = &ohci_usb_ops,
.priv_auto_alloc_size = sizeof(struct generic_ohci),
.flags = DM_FLAG_ALLOC_PRIV_DMA,
};

2
include/configs/bcm28155_ap.h
View file

@ -142,7 +142,7 @@
#define CONFIG_USB_GADGET
#define CONFIG_USB_GADGET_DUALSPEED
#define CONFIG_USB_GADGET_VBUS_DRAW 0
#define CONFIG_USB_GADGET_S3C_UDC_OTG
#define CONFIG_USB_GADGET_DWC2_OTG
#define CONFIG_USB_GADGET_BCM_UDC_OTG_PHY
#define CONFIG_USB_GADGET_DOWNLOAD
#define CONFIG_USBID_ADDR 0x34052c46

4
include/configs/exynos4-common.h
View file

@ -51,8 +51,8 @@
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
#define CONFIG_USB_GADGET
#define CONFIG_USB_GADGET_S3C_UDC_OTG
#define CONFIG_USB_GADGET_S3C_UDC_OTG_PHY
#define CONFIG_USB_GADGET_DWC2_OTG
#define CONFIG_USB_GADGET_DWC2_OTG_PHY
#define CONFIG_USB_GADGET_DUALSPEED
#define CONFIG_USB_GADGET_VBUS_DRAW 2

4
include/configs/s5p_goni.h
View file

@ -269,8 +269,8 @@
#define CONFIG_SYS_MAX_I2C_BUS 7
#define CONFIG_USB_GADGET
#define CONFIG_USB_GADGET_S3C_UDC_OTG
#define CONFIG_USB_GADGET_S3C_UDC_OTG_PHY
#define CONFIG_USB_GADGET_DWC2_OTG
#define CONFIG_USB_GADGET_DWC2_OTG_PHY
#define CONFIG_USB_GADGET_DUALSPEED
#define CONFIG_USB_GADGET_VBUS_DRAW 2
#define CONFIG_CMD_USB_MASS_STORAGE

4
include/configs/s5pc210_universal.h
View file

@ -177,8 +177,8 @@
#define CONFIG_POWER_MAX8998
#define CONFIG_USB_GADGET
#define CONFIG_USB_GADGET_S3C_UDC_OTG
#define CONFIG_USB_GADGET_S3C_UDC_OTG_PHY
#define CONFIG_USB_GADGET_DWC2_OTG
#define CONFIG_USB_GADGET_DWC2_OTG_PHY
#define CONFIG_USB_GADGET_DUALSPEED
/*

4
include/configs/smdkv310.h
View file

@ -13,8 +13,8 @@
#undef CONFIG_BOARD_COMMON
#undef CONFIG_USB_GADGET
#undef CONFIG_USB_GADGET_S3C_UDC_OTG
#undef CONFIG_USB_GADGET_S3C_UDC_OTG_PHY
#undef CONFIG_USB_GADGET_DWC2_OTG
#undef CONFIG_USB_GADGET_DWC2_OTG_PHY
#undef CONFIG_CMD_USB_MASS_STORAGE
#undef CONFIG_REVISION_TAG
#undef CONFIG_CMD_THOR_DOWNLOAD

2
include/configs/socfpga_common.h
View file

@ -243,7 +243,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
*/
#if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE)
#define CONFIG_USB_GADGET
#define CONFIG_USB_GADGET_S3C_UDC_OTG
#define CONFIG_USB_GADGET_DWC2_OTG
#define CONFIG_USB_GADGET_DUALSPEED
#define CONFIG_USB_GADGET_VBUS_DRAW 2

25
include/usb/dwc2_udc.h Normal file
View file

@ -0,0 +1,25 @@
/*
* drivers/usb/gadget/dwc2_udc.h
* Designware DWC2 on-chip full/high speed USB device controllers
* Copyright (C) 2005 for Samsung Electronics
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __DWC2_USB_GADGET
#define __DWC2_USB_GADGET
#define PHY0_SLEEP (1 << 5)
struct dwc2_plat_otg_data {
int (*phy_control)(int on);
unsigned int regs_phy;
unsigned int regs_otg;
unsigned int usb_phy_ctrl;
unsigned int usb_flags;
unsigned int usb_gusbcfg;
};
int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata);
#endif /* __DWC2_USB_GADGET */